This special issue of Analog Integrated Circuits and Signal Processing presents the extended versions of selected papers from the 30th NORCHIP conference which was held in Copenhagen, Denmark, November 12–13, 2012. The 30th NORCHIP conference had about 70 participants and 57 papers were presented during the 2 days the conference lasted whereof 37 papers were presented in 13 lecture sessions, 16 papers were presented in two poster sessions and four invited presentations were given. From the contributed papers seven papers have been selected for this special issue. The selection of the papers for this special issue is based on quality criteria and they reflect the topics in analog circuit design highlighted during the conference and the selected papers all contain contributions that will be of interest to the reader. The two first papers present two RF receivers. In the first paper I. Din, J. Wernehag, S. Andersson, H. Sjoland and S. Mattisson present a SAW-less receiver based on a new architecture for the noise amplification including a new technique for harmonic rejection. The receiver operates in the frequency range 500 MHz–2.5 GHz and shows a NF comparable to state-of-the art. In second paper S. Sudalaiyandi, H. A. Hjortland and T. S. Lande describe a continuous time RAKE receiver for an ultra-wide band impulse radio system. The receiver uses a continuous time coding scheme that uses coherent symbol detection. A demonstrator IC shows that the system can achieve a high precision localization of *1.4 cm without any clock synchronization and consumes 5.29 mW. The third paper by D. Svard, C. Jansson and A. Alvandpour present an IC for reading out the content from an infrared focal array. The chip demonstrates a complete readout circuitry for a 32 9 32 array with a dynamic range of 97 dB and using 170 mW at 60 frames per second. The fourth paper deals with a low power current reference. In the paper by F. Cucchi, S. Pascoli and G. Iannaccone a current reference that consumes 288 nA from a 1 V supply is presented. The circuit is based on a conventional bipolar bandgap reference and shows a trade-off between power consumption and process variability. The paper describes how to design the bandgap reference to achieve low spread in the reference current and a prototype IC demonstrates 1.4 % variation in the reference current over 23 samples from a single batch. The remaining papers all concern data conversion. In the fifth paper S. Balasubramanian and W. Khalil present the architectural trends in current steering digital-to-analog converters. Some of the fundamental challenges designing such digital-to-analog converters are highlighted and the latest research that address these are discussed. The next papers also concern data conversion but they present specific implementations of data converters. In the sixth paper A. F, Yeknami and A. Alvandpour present a low power discrete time sigma-delta modulator. The analog-to-digital data converter is intended for medical implant and shows a SNDR of 76 dB using only 2.1 lW. The last paper selected from the NORCHIP conference ‘‘A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency’’ by P. Lu, A. Liscidini and P. Andreaniaaa has been printed in the August 2013 volume of the Journal and thus the reader is referred hereto. The paper presents a GRO-based Vernier time-to-digital converter with reduced I. Jorgensen (&) Technical University of Denmark, Department of Electrical Engineering, Orsteds Plads, Building 349, 2800 Kongens Lyngby, Denmark e-mail: ihhj@elektro.dtu.dk URL: www.elektro.dtu.dk
Read full abstract