Improve Noise Immunity Research Articles

Improving noise immunity of "sliding" correlation algorithm for printable characters recognition

Solving the problem of character information recognition is relevant in the analysis of text documents, identification of the character information on printed circuit boards and electronic components, recognition of labels on containers and railway cars, etc.Optimal matching algorithm, which provides the highest probability of a correct distinction, lies in calculating the correlation coefficient between the recognizable character and a set of all templates.A simple noise-immune algorithm for character information recognition that does not use the procedure of pre-segmentation and contour filtering, based on the combination of the correlation method and the minimum code distance criterion was proposed in the paper.The proposed algorithm allows significantly improve the probability of correct character recognition by slight complication of the processing algorithm and allows to determine the coordinates of characters, corresponding to one given pattern for one iteration.The obvious advantage of this algorithm is the absence of multiplication operations. Herewith, the computational complexity of the algorithm is reduced due to the lack of multiplication operations and decrease in the total number of addition operations.

Design and Implementation of Sensor for Velocity of Detonation Measurement

Velocity of Detonation (VOD) is the most important property to consider when rating an explosive. It is an established fact that VOD gives a good indication of the strength and hence the performance of the explosive. Detonation Sensor is the most critical part of the VOD measurement system. This paper presents and discusses various practical and field implemental techniques for sensing detonation wave with detailed study of electrical ionization principle using resistance sensor for VOD measurement. In this technique effort is made to overcome the limitation of continuous wire sensor and discrete points sensor under various practical conditions. Step change in resistance is utilised to increase the system reliability, improve noise immunity as well as to reduce the system complexity.

Low power wide gates for modern power efficient processors

In this paper, a low power register file and tag comparator is proposed which has lower leakage and higher noise immunity without dramatic speed degradation due to the wide fan-in gates. Simulation of register files and tag comparators designed is done using low-Vth 90nm CMOS process technology model in all process corners. The results demonstrate 20% power reduction and 2× noise-immunity improvement in the implemented register file using the proposed circuit at the same delay compared to the standard domino circuits. On the other hand, simulation of tag comparators implemented using the other proposed circuit shows 41%, 22% and 7.5% reduction in power, delay and area, respectively compared to the standard footless domino at the same robustness condition. Moreover, the register file and the tag comparator designed with the proposed circuits respectively show 2.48 and 3 times improvement in the defined figure of merit compared to the counterpart circuits designed with the conventional domino circuit. Thus, the proposed are power efficient and suitable approaches for embedded processors with multi-ported register file and fully-associative caches with large number of tag comparators.

Current-Comparison-Based Domino: New Low-Leakage High-Speed Domino Circuit for Wide Fan-In Gates

In this paper, a new domino circuit is proposed, which has a lower leakage and higher noise immunity without dramatic speed degradation for wide fan-in gates. The technique which is utilized in this paper is based on comparison of mirrored current of the pull-up network with its worst case leakage current. The proposed circuit technique decreases the parasitic capacitance on the dynamic node, yielding a smaller keeper for wide fan-in gates to implement fast and robust circuits. Thus, the contention current and consequently power consumption and delay are reduced. The leakage current is also decreased by exploiting the footer transistor in diode configuration, which results in increased noise immunity. Simulation results of wide fan-in gates designed using a 16-nm high-performance predictive technology model demonstrate 51% power reduction and at least 2.41t noise-immunity improvement at the same delay compared to the standard domino circuits for 64-bit OR gates.

Space Diversity Knotted with WiMAX- A Way for Undistorted and Anti-Corruptive Channel

The principal aim of this research article is to develop an apt transmission scheme which will completely accomplish the goal of eliminating channel distortion. The effort on this work signifies and delivers a combined transmit diversity scheme that scatters the transmitter signal in multi dimension to comprehend the need to improve noise immunity. Extrapolating the diversity combining techniques, it is possible to perceive the same in the case of receivers. Space diversity is intertwined with WiMAX and the benefits have been demonstrated by incorporating various space diversity techniques and the analysis is done with respect to Bit Error Rate. Performance comparison is presented for Multiple Input Single Output and Multiple Input Multiple Output configurations.

High-performance dynamic circuit techniques with improved noise immunity for address decoders

Dynamic circuits are extensively employed in very-large-scale integration chips because of their high performance. Unfortunately, they are more susceptible to noise than static complementary metal oxide semiconductor circuits. With the continuous down-scaling of process technology and the supply voltage, improved noise immunity in dynamic circuits is essential. In this study, two new schemes are proposed to enhance the noise tolerance of dynamic address decoders, and their performance, noise tolerance and power consumption are compared with those of a conventional dynamic decoding circuit and a previous scheme. A dynamic 4–16 decoder employing the proposed delay technique exhibits 131.5 and 2.6% improvements in noise tolerance and performance, respectively, whereas a 4–16 decoder exploiting the proposed mirror scheme achieves 291.2 and 25.2% improvements; both used 65 nm process technology. Moreover, the proposed techniques are more resistant to process variations and more tolerant of a lower power supply.

Channel Measurement and Markov Modeling of an Urban Free-Space Optical Link

Free-space optical (FSO) communication links provide high data rates; however, their reliability is heavily dependent on weather conditions. This paper presents our experimental urban 1.87 km FSO link based on a customized commercial system and develops a library of channel measurements in clear and light rain weather conditions. A channel model for the link is proposed and experimentally quantified. Channel measurements are obtained by modulating a 60 mW laser source. At the receiver, a 2 GSa/s data converter is used and 16 fast-Fourier transform cores are implemented in the hardware to improve noise immunity. The resulting signal-to-noise ratio of the channel samples is around 40 dB under clear weather conditions. Fittings with log-normal, gamma-gamma, and Erlang distributions are presented, and the scintillation index and coherence time are measured. A computationally efficient finite-state Markov chain is derived for the channel to model both the distribution and the autocorrelation of the fading and is verified by the measurements. The Markov models and channel measurements in a variety of atmospheric conditions are available for download to permit easy verification of communication algorithms on this urban FSO channel.

Method of synthesis of gaussian noise signal in dynamic chaos systems

The discrete representation of the Gaussian noise signal in the dynamic chaos systems was achieved. To improve noise immunity and secrecy of the transmitted signals the statistical characteristics were discussed and noise signal synthesis algorithm for use in confidential communication systems was shown

Experimental investigation of potentialities of seismoacoustic sea-bottom sounding using coherent pulse signals

We describe the results of experimental investigations of the seismoacoustical sounding of the bottom structure of the Caspian Sea. They were obtained using a ship towed hydroacoustic emitter of LFM pulse signals in several frequency ranges of frequency band from 100 to 1000 Hz. Based on the high coherence and relatively high frequencies of emitted signals, the results point to feasibility of substantial improvement in noise immunity and resolution of sounding the bottom rocks’ structure at depths of up to 1000 m thanks to combined application of a series of procedures of coherent processing of incoming signals. The processing involves matched filtering of individual pulses, coherent accumulation of pulse trains within the horizontally uniform bottom area, and adaptive path accumulation of pulses accounted for inclination of individual reflecting layers. The resulting gain in noise immunity came to about 30 dB, which points to possibility of efficient use of relatively low-power (up to 100 W) coherent sources for seismoacoustic sounding of sea bottom at minimal damage to local ecology.

求解粒子群粒度分布的改进Projection算法

In consideration of the serious size distribution broadening and tailing phenomena come from improper iterative steps in inversing laser particle size distribution,this paper presents a method to select the iterative step for Projection algorithms to improve measurement accuracy.Based on the similarity theory,this method obtains the similarity between the row vector of light energy distribution and the course quantity of light energy coefficient matrix.Then,it gets the predict distribution of particle size after filtering and normalized processing.Furthermore,according to the predicted result,the iteration step can be calculated.The measurement results for national standard particles GWB(E)120046 show that the measuring errors for D50,D10,and D90 are-0.6%,-1.1% and-0.6%,respectively,and the light energy logarithm error of mix standard particles GWB(E)120041 and GWB(E)120049 is 2.167.Results demonstrate that the algorithm can effectively improve noise immunity,measurement accuracy and resolution.

A Spatio-Temporal Video Segmentation Method Based on Motion Detection

In the paper, a new spatio-temporal segmentation algorithm is proposed to extract moving objects from video sequences, the sequences were taken by stationary cameras. First, the motion detection is used to achieve the mask representing moving regions with a estimation noise parameter. Which can effectively improve noise immunity. Due to the shortage of the moving video object textures, the eight-neighbor motion detection is present, which is used to smooth the mask boundary and fill the interior holes. Then a morphological filter is applied to refine the moving mask. Second, spatial segmentation is detected by the Canny operator. Then utilize the gradient histogram to select the high threshold to increase the adaptivity of Canny algorithm. Finally, merge the temporal and spatial mask by neighborhood matching algorithm to ensure further reliability and efficiency of our algorithm. Experiments on typical sequences have successfully demonstrated the validity of the proposed algorithm.

Robust low leakage controlled keeper by current-comparison domino for wide fan-in gates

In this paper, a new design for low leakage and noise immune wide fan-in domino circuits is presented. The proposed technique uses the difference and the comparison between the leakage current of the OFF transistors and the switching current of the ON transistors of the pull down network to control the PMOS keeper transistor, yielding reduction of the contention between keeper transistor and the pull down network from which previously proposed techniques have suffered. Moreover, using the stacking effect, leakage current is reduced and the performance of the current mirror is improved. Results of simulation in high performance 16 nm predictive technology model (PTM) demonstrate that the proposed circuit exhibits about 39% less power consumption, and nearly 2.57 times improvement in noise immunity with a 41% die area overhead for a 64-bit OR gate compared to a standard domino circuit.

A Novel Approach to Analog Signal Isolation through Digital Opto-coupler (YOUTAB)

Major concerns which clearly express necessity of analog isolator applications, are removing ground loop, increasing common-mode voltage rejection, improving noise immunity and protecting operator, expensive equipment and data from transient voltages. Optical coupling is an approach to signal isolation in which all mentioned benefits are covered. This paper is going to propose a novel idea of a particular optical analog signal isolator. It is introduced for the first time and therefore the authors named it YOUTAB. The digital photocoupler NEC-PS2501 constitutes the main structure of this new isolator. In general, the proposed configuration consist of two different parts that one of them transfers the signal and the other establishes a negative feedback to ensure that the output signal has the same features of the input signal. The operation, analysis and computer simulation results are shown. The simulation results show that this novel proposed analog isolator is linear in a wide range of inputs.

Fairchild semiconductor’s high voltage gate driver ICs provide improved noise immunity and performance

Fairchild semiconductor’s high voltage gate driver ICs provide improved noise immunity and performance

Optimized synchronization of chaotic and hyperchaotic systems

A method of synchronization is presented which, unlike existing methods, can, for generic dynamical systems, force all conditional Lyapunov exponents to go to -∞ . It also has improved noise immunity compared to existing methods, and unlike most of them it can synchronize hyperchaotic systems with almost any single coupling variable from the drive system. Results are presented for the Rossler hyperchaos system and the Lorenz system.

Reduction in ordered decision system based on spearman rank correlations

Reduction is an important knowledge discovery process.The original rough set theory based on equivalence relations does not consider attributes with preference-ordered domains and is sensitive to data noise.Based on spearman rank correlation analysis,a method was introduced to reduction ordered decision systems.This method computes the reduction according to the impact of certain attributes on the spearman rank correlations between objects.Experimental results show that this method is effective as it not only takes into account the preference relationship,but also improves noise immunity,and thus is more suitable for practical application.

50 GHz S-shaped rat-race balun with 1.4 dB insertion loss in a wafer-level chip-size package process

In millimeter-wave CMOS circuits, a balun is useful for connecting off-chip single-end devices and on-chip differential circuits to improve noise immunity. However, an on-chip balun occupies a large chip area. To reduce the chip area required for the on-chip balun, a new rat-race balun using a rewiring technology with a wafer-level chip-size package (W-CSP) is proposed. The W-CSP balun occupies no area in a die because it is placed over integrated circuits. In the proposed balun, an S-shaped structure is adopted in order to directly connect the balun to differential GSGSG pads on a chip with a small area. The S-shaped W-CSP balun was fabricated on a silicon-on-insulator (SOI) substrate. The core area of the S-shaped rat-race balun is 480×735 µm, which is 22.4% that of a square rat-race balun. As a result of measurement, we found that the minimum insertion loss is 1.4 dB and the operating frequency ranges from 40 to 61 GHz.

다중전원 SoC용 저전력 단일전원 Level-Up/Down Shifter

본 논문은 다중전원공급 SoC(System-on-Chip)에 사용될 저전력 단일전원 level-up/down shifter를 제안한다. 제안된 회로는 다양한 전원을 사용하는 IP간의 신호의 인터페이스 회로로 사용할 수 있으며, 단일전원을 사용함으로써 저전력으로 동작하고 시스템의 전원배선과 레이아웃의 복잡도 및 지연시간이 감소하는 장점을 가지고 있다. 제안된 level-up/down shifter는 각각 IP간에 신호들이 level-up 일 때는 500MHz 입력 주파수에서 동작하고 level-down일 때는 1GHz에서 동작하도록 설계했다. I/O 회로에 level-up/down shifter를 사용하면 시스템간의 신호를 연결할 때 잡음에 강하다는 사실도 검증했다. 시뮬레이션 결과는 0.18um CMOS 공정에서 각각 1.8V, 2.5V, 3.3V의 전원을 사용하여 검증했다. We propose a low power level-up/down shifter with single supply that can be used at SoC with multiple supply. The proposed circuit interfaces IPs which are operated on the different supply voltages. The circuit is designed with a single supply that decreases the low power consumption and the complexity of supply routing and layout. The proposed circuit operated at 500MHz for level-up and at 1GHz for level-down. The level-up/down shifter improves noise immunity of the system at I/O circuit. The circuit is evaluated for 1.8V, 2.5V, 3.3V supply with 0.18um CMOS technology, respectively.

Noise immunity of automatic GTE control systems with a selector at channel switching modes

Noise immunity analysis was carried out for different variants of constructing automatic GTE control systems with an algebraic selector at channel switching modes. It is shown that regular or random noises available lead to multiple switching of channels in the transient and steady-state conditions. A method for improving noise immunity is considered, and the results of simulating the algorithms proposed are presented.

Complex approach to choosing algorithms of compression and error-correcting coding in digital image transmission via communication channels

The problem of choosing the algorithms of compression and error-correcting coding for transmission of digital images via communication channels is considered. The quality criteria for output images are analyzed and a technique for simulating errors (faults) in a communication channel is proposed. The possibility of considerable improvement of noise immunity of compressed images is demonstrated for the compression method based on hierarchical grid interpolation.