Improvement In Execution Speed Research Articles

A Genetically Based Algorithm to Improve Execution Speed in Multipactor Simulations in Parallel-Plate Waveguides

A Genetically Based Algorithm to Improve Execution Speed in Multipactor Simulations in Parallel-Plate Waveguides

OECS: a deep convolutional neural network accelerator based on a 3D hybrid optical-electrical NoC

Various emerging technologies have been proposed and applied to deep convolutional neural networks (DCNNs) to enhance their execution efficiency and accuracy while reducing the number of parameters. However, previous dataflow-based DCNN accelerators have primarily focused on accelerating the convolution (CONV) layer while reducing the overhead of data movement through specific data reuse strategies to improve performance. When deploying these emerging DCNNs in conventional accelerators, frequent data access from both the external memory and internal processing units of the accelerator can result in significant data movement overhead, leading to decreased acceleration performance. To address these challenges, this paper proposes a novel three-dimensional hybrid optical-electrical network-on-chip (NoC) accelerator called the optical-electronic channel-stationary system (OECS). OECS leverages a channel stationary (CS) calculation mode and stay-at-local data storage strategy to minimize the movement and processing of all data in the local processing element (PE). This strategy reduces data movement between each PE in the accelerator and between the accelerator and external memory, resulting in improved acceleration performance. Simulation results demonstrate that, compared to state-of-the-art accelerators, OECS achieves a 53% improvement in execution speed and saves approximately 44% of energy consumption associated with data movement.

Facial expression recognition in videos using hybrid CNN & ConvLSTM.

The three-dimensional convolutional neural network (3D-CNN) and long short-term memory (LSTM) have consistently outperformed many approaches in video-based facial expression recognition (VFER). The image is unrolled to a one-dimensional vector by the vanilla version of the fully-connected LSTM (FC-LSTM), which leads to the loss of crucial spatial information. Convolutional LSTM (ConvLSTM) overcomes this limitation by performing LSTM operations in convolutions without unrolling, thus retaining useful spatial information. Motivated by this, in this paper, we propose a neural network architecture that consists of a blend of 3D-CNN and ConvLSTM for VFER. The proposed hybrid architecture captures spatiotemporal information from the video sequences of emotions and attains competitive accuracy on three FER datasets open to the public, namely the SAVEE, CK + , and AFEW. The experimental results demonstrate excellent performance without external emotional data with the added advantage of having a simple model with fewer parameters. Moreover, unlike the state-of-the-art deep learning models, our designed FER pipeline improves execution speed by many factors while achieving competitive recognition accuracy. Hence, the proposed FER pipeline is an appropriate candidate for recognizing facial expressions on resource-limited embedded platforms for real-time applications.

NDTAEP: Design of a novel deadline-aware task scheduling model using augmented ensemble pattern analysis

A wide variety of scheduling models have been proposed by researchers over the years, and each of them has varying performance in terms of deadline hit ratio, scheduling effort, efficiency of task mapping, etc. However, these models are highly context-sensitive and cannot be scaled to heterogeneous task types due to their internal mapping characteristics. To improve task scalability, this work proposes a design of a novel deadline-aware task scheduling model that uses augmented ensemble pattern analysis for task clustering. The pattern analysis module uses a combination of K-means, hierarchical, and Fuzzy C Means (FCM) clustering to effectively segregate tasks depending on their completion and deadline parameters. These tasks are given to a modified deadline-aware League Championship Algorithm (LCA) optimizer, which assists in mapping the clustered tasks with worker threads. The modified LCA model uses a combination of task priority, task deadline, and worker capacity for scheduling. The model maps tasks that require higher execution effort with moderately performing worker nodes, while tasks with nearer deadlines are allotted to higher-performance workers. Due to the use of an ensemble augmented pattern analyzer with a modified LCA optimizer, the proposed model can improve execution speed by 8%, deadline hit ratio by 1.5%, and scheduling efficiency by 6.5% when compared with various state-of-the-art scheduling approaches. The proposed model was evaluated and showcased a deadline hit ratio of 99.95%, computational efficiency of 96.26%, and average task-scheduling delay of less than 0.1 ms, which makes it highly useful for a wide variety of task scheduling application scenarios.

A Novel Compressed Sensing-Based Graph Isomorphic Network for Key Node Recognition and Entity Alignment

In recent years, the related research of entity alignment has mainly focused on entity alignment via knowledge embeddings and graph neural networks; however, these proposed models usually suffer from structural heterogeneity and the large-scale problem of knowledge graph. A novel entity alignment model based on graph isomorphic network and compressed sensing is proposed. First, for the problem of structural heterogeneity, graph isomorphic network encoder is applied in knowledge graph to capture structural similarity of entity relation. Second, for the problem of large scale, key node and community are integrated for priority entity alignment to improve execution speed. However, the exiting node importance ranking algorithm cannot accurately identify key node in knowledge graph. So the compressed sensing is adopted in node importance ranking to improve the accuracy of identifying key node. The authors have carried out several experiments to test the effect and efficiency of the proposed entity alignment model.

Real-Time ML-Assisted Hardware-in-the-Loop Electro-Thermal Emulation of LVDC Microgrid on the International Space Station

For being the world’s largest low voltage direct current (LVDC) microgrid (MG) in space, the power generation and distribution systems aboard the International Space Station (ISS) employ a hierarchical assortment of electric power sources, energy storage, control devices, power electronics, and loads operating cooperatively at multifarious system dispositions and multi-stage configurations. At the early phase of design, for such time-critical systems, the trade-off between reliability and convergence rate of device modeling, varying accuracy requirements of control flows, and especially the implementation for real-time performance have brought new challenges and problems for testing and validation of the MG. One of the solutions presented by this paper is to use the hardware-in-the-loop (HIL) emulation, where the MG is emulated using the field-programmable gate array (FPGA) hardware platform. In parallel with the emulation effort, comprehensive modeling solutions for both large-scale photovoltaic (PV) solar array wings (SAWs) and nonlinear behavior model (NBM) of insulated-gate bipolar transistors (IGBTs) have been utilized based on machine learning (ML) concepts of artificial neural network (ANN) and recurrent neural network (RNN). Both system-level (validated by Matlab/Simulink) and device-level (validated by SaberRD) transient simulations are carried out, and the results exhibit high accuracy and fidelity of the models and significant improvements in execution speed and hardware resource consumption.

Distance-aware Approximate Nanophotonic Interconnect

The energy consumption of manycore architectures is dominated by data movement, which calls for energy-efficient and high-bandwidth interconnects. To overcome the bandwidth limitation of electrical interconnects, integrated optics appear as a promising technology. However, it suffers from high power overhead related to low laser efficiency, which calls for the use of techniques and methods to improve its energy costs. Besides, approximate computing is emerging as an efficient method to reduce energy consumption and improve execution speed of embedded computing systems. It relies on allowing accuracy reduction on data at the cost of tolerable application output error. In this context, the work presented in this article exploits both features by defining approximate communications for error-tolerant applications. We propose a method to design realistic and scalable nanophotonic interconnect supporting approximate data transmission and power adaption according to the communication distance to improve the energy efficiency. For this purpose, the data can be sent by mixing low optical power signal and truncation for the Least Significant Bits (LSB) of the floating-point numbers, while the overall power is adapted according to the communication distance. We define two ranges of communications, short and long, which require only four power levels. This reduces area and power overhead to control the laser output power. A transmission model allows estimating the laser power according to the targeted BER and the number of truncated bits, while the optical network interface allows configuring, at runtime, the number of approximated and truncated bits and the laser output powers. We explore the energy efficiency provided by each communication scheme, and we investigate the error resilience of the benchmarks over several approximation and truncation schemes. The simulation results of ApproxBench applications show that, compared to an interconnect involving only robust communications, approximations in the optical transmission led to up to 53% laser power reduction with a limited degradation at the application level with less than 9% of output error. Finally, we show that our solution is scalable and leads to 10% reduction in the total energy consumption, 35× reduction in the laser driver size, and 10× reduction in the laser controller compared to state-of-the-art solution.

PeriPy - A high performance OpenCL peridynamics package

This paper presents a lightweight, open-source and high-performance python package for solving peridynamics problems in solid mechanics. The development of this solver is motivated by the need for fast analysis tools to achieve the large number of simulations required for ‘outer-loop’ applications, including sensitivity analysis, uncertainty quantification and optimisation. Our python software toolbox utilises the heterogeneous nature of OpenCL so that it can be executed on any platform with CPU or GPU cores. We illustrate the package use through a range of industrially motivated examples, which should enable other researchers to build on and extend the solver for use in their own applications. Step improvements in execution speed and functionality over existing techniques are presented. A comparison between this solver and an existing OpenCL implementation in the literature is presented, tested on benchmarks with hundreds of thousands to tens of millions of nodes. We demonstrate the scalability of the solver on the GeForce RTX 2080 TiGPU from NVIDIA, and the memory-bound limitations are analysed. In all test cases, the implementation is between 1.4 and 10.0 times faster than a similar existing GPU implementation in the literature. In particular, this improvement has been achieved by utilising local memory on the GPU.

Cerebellar Transcranial Direct Current Stimulation in Children with Developmental Coordination Disorder: A Randomized, Double-Blind, Sham-Controlled Pilot Study

Evidence-based therapeutic options for children with developmental coordination disorder (DCD) are scarce. This work explored the effects of cerebellar anodal transcranial direct current stimulation (atDCS) on three 48 h-apart motor sequence learning and upper limb coordination sessions in children with DCD. The results revealed that, as compared to a Sham intervention (n = 10), cerebellar atDCS (n = 10) did not meaningfully improve execution speed but tended to reduce the number of execution errors during motor sequence learning. However, cerebellar atDCS did neither meaningfully influence offline learning nor upper limb coordination, suggesting that atDCS’ effects are circumscribed to its application duration. These results suggest that cerebellar atDCS could have beneficial effects as a complementary therapeutic tool for children with DCD.

Empirical Evidence of Socially-Engineered Attack Menace Among Undergraduate Smartphone Users in Selected Universities in Nigeria

Smartphone proliferation today, have up-scaled user adoption of Internet-based processing activities. These include (not limited to) e-learning, e-commerce, mobile-banking and others –all aimed at better performance, service delivery at improved execution speed, greater portability, flexibility and accessibility ease. Thus, necessitating growth expansion in mobile-app development across varying platforms that are poised to help users accomplish processing tasks while harnessing the benefits of the technology. Conversely, these techs have also allowed users to be constantly besieged by threats and security breaches. In lieu of residence, sensitive and proprietary –users have become bothered with smartphone exposure to possible data loss and theft –if they are to further adopt these new paradigms. With doubt in their minds, trust levels in user adoption continues to reduce. We seek to investigate social-engineered threats and attacks amongst undergraduates in Nigerian Universities. Result shows that phishing hits a higher successrate against smartphone users in Nigeria, which has decreased client’s trust level in Internet-based services

Data Hiding in Digital Image for Efficient Information Safety Based on Residue Number System

The mass dispersal of digital communication requires the special measures of safety. The need for safe communication is greater than ever before, with computer networks now managing almost all of our business and personal affairs. Information security has become a major concern in our digital lives. The creation of new transmission technologies forces a specific protection mechanisms strategy particularly in data communication state.
 We proposed a steganography method in this paper, which reads the message, converting it into its Residue Number System equivalent using the Chinese Remainder Theorem (CRT), encrypting it using the Rivest Shamir Adleman (RSA) algorithm before embedding it in a digital image using the Least Significant Bit algorithm of steganography and then transmitting it through to the appropriate destination and from which the information required to reconstruct the original message is extracted. These techniques will enhance the ability to hide data and the hiding of ciphers in steganographic image and the implementation of CRT will make the device more efficient and stronger. It reduces complexity problems and improved execution speed and reduced the time taken for processing the encryption and embedding competencies.

Performance Analysis of the χMD Matrix Solver Package for MODFLOW-USG.

The χMD matrix solver package is incorporated into USGS groundwater modeling software, such as MODFLOW-NWT, MODFLOW-USG, and MT3D. The solver is used to solve matrices assembled through numerical discretization of the groundwater flow equation, and solute transport equations. χMD has demonstrated its higher robustness, faster execution speed, and more efficient memory usage compared to the existing solvers for many types of groundwater flow problems. χMD uses preconditioned iterative Krylov-subspace methods and consists of preconditioning and acceleration modules. Because the solver package uses a variety of preconditioning features including level-based incomplete lower-upper (ILU) factorization method with a drop tolerance scheme, users must choose optimal preconditioning parameters to improve execution speed and robustness. In order to examine how the preconditioning parameters, ILU factorization level, and drop tolerance values affect the overall performance of the matrix solver, we evaluated five different groundwater model applications using MODFLOW-USG that include different numerical complexities. For those five cases, the number of discretization nodes varied from 10,000 cells to 730,300 cells. From the analysis, we found that the preconditioning parameters greatly affect execution times and memory usage of the preconditioning and acceleration procedures. In addition, a combination of the ILU level between five to seven and the drop tolerance value between 10-2 and 10-3 usually resulted in shorter overall execution time. Our study suggests that the users can elicit higher performance and robustness of the χMD matrix solver using this combination of the parameters and enhance computational efficiency of solving groundwater and solute transport problems.

TWO-STREAM CONVOLUTIONAL NETWORK FOR DYNAMIC HAND GESTURE RECOGNITION USING CONVOLUTIONAL LONG SHORT-TERM MEMORY NETWORKS

Human action and gesture recognition provides important and worth information for interaction between human and device ambient that monitors living, healthcare facilities or entertainment activities in smart homes. Recent years, there were many machine learning model application studies to recognize human action and gesture. In this paper, we propose a dynamic hand gesture recognition system in video based on two stream-convolution network (ConvNet) architecture. Specifically, we research the state-of-the-art approaches using to recognize dynamic hand gesture in video and propose an improvement method to enhance performance of model which is suitable for uses such as indoor environment in this paper. Our contribution is improvement of two stream ConvNet to achieve better performance. The results show that the proposal model improves execution speed and memory resource usage comparing to existing models.

A Fast and Accurate Analytical Method for Parameter Determination of a Photovoltaic System Based on Manufacturer’s Data

Modeling and simulation of a photovoltaic solar system play a significant role in understanding its behavior in various environmental conditions. Utilization of the datasheet information in modeling and simulation of the PV system correlates the experimental data and the theory that instigate the mathematical predictions of an actual system. A single-diode model gives a simple, fast, and straightforward way of depicting the PV system performance. We have developed a new approach of determining the five unknown parameters of a single-diode model using manufacturer’s data at three main points: the open circuit point (OCP), short circuit point (SCP), and the maximum power point (MPP) of the IV and PV curves. The ideality factor (A) and the diode saturation current (Io) are the key unknown parameters that greatly affect the reduplication of the three main points. The purpose of this study is to evaluate the ideality factor using simple calculation procedure starting from its optimal value (Ao) and other values within the proximity of Ao. The optimal value is obtained by assumptions of negligible series resistance (Rs) and very large shunt resistance (Rsh). Therefore, the choice of the other ideality factors in the neighborhood of its optimal value gives rise to different values of Rs, Rsh, and Iph that are more realistic in an experimental setup. Positive values of Rsh and Rs have been iteratively obtained by utilizing data at maximum power point combined with open and short circuit data. The five unknown parameters have been determined in the proximity of Ao and have been used to plot the PV curve with accuracy and precision of less than 0.5% error of maximum power and less than 0.1% error of Voc of manufacturer’s data. The proposed method has been implemented using fast, simple, and accurate procedures using GNU Octave programming software to calculate Ao, Io, Rs, Rsh, and Iph and to execute both Rs-Rsh and PV characteristic equations of BP3235T, KC200GT, BP-SX 150, and MSX60 PV modules. The reduced steps employed in the algorithm improve execution speed, thereby reducing the computation time.

Static Profiling of Assembly Code Performance and Optimization Effectiveness using Instructions Performed and Program Latency

Software program optimization for improved execution speed can be achieved through modifying the program. Programs are usually written in high level languages then translated into low level assembly language. More coverage of optimization and performance analysis can be performed on low level than high level language. Optimization improvement is measured in the difference in program execution performance. Several methods are available for measuring program performance are classified into static approaches and dynamic approaches. This paper presents an alternative method of more accurately measuring code performance statically than commonly used code analysis metrics. New metrics proposed are designed to expose effectiveness of optimization performed on code, specifically unroll optimizations. An optimization method, loop unroll is used to demonstrate the effectiveness of the increased accuracy of the proposed metric. The results of the study show that measuring Instructions Performed and Instruction Latency is a more accurate static metric than Instruction Count and subsequently those based on it.

Make in India - a great path forward for operational excellence and cost reduction opportunities for electronics industry

Electronic device industry in India is growing with increase of demand in local and overseas market. Many top semiconductor MNCs have their design houses located in India, however boards/systems are preferred to be manufactured either in China, Taiwan and Malaysia. Rising manufacturing costs in China enabling India as alternate destination. Currently design centres from India support both chip design and validation activities for products delivered across the world. Indian government's 'Make in India' initiatives promote industry players to come up with plans to invest in India. In this study we attempt to establish new engagement model to enable EMS partner in India for IoT and other sectors. If companies manufacture boards in India, the schedule and cost can be brought down drastically. Moreover engaging local EMS partner starting from the design phase of product reduces the overall cost, improves execution speed and brings agility to the system.

The gammawarp filterbank: A frequency-warped implementation of the dynamic compressive gammachirp filter

This paper presents an alternative method for implementing a dynamic compressive gammachirp (dcGC) auditory filterbank. Instead of using a cascade of second-order sections, the new approach uses digital frequency warping to give the gammawarp filterbank. In the warped implementation, the unit delays in a conventional finite impulse-response (FIR) filter are replaced by first-order allpass filters. The set of warped FIR filter coefficients is constrained to be symmetrical, which results in a filter phase response that is identical for all filters in the filterbank. The dynamic variation in filter response is provided by interpolating the outputs of three linear filters adjusted for low-, medium-, and high-input signal levels. The gammawarp filterbank offers a substantial improvement in execution speed compared to previous dynamic gammachirp filter implementations. For a linear filterbank, the gammawarp execution time is comparable to that of a gammatone or linear second-order section gammachirp implementation for 32 bands, but there is a processing time advantage that increases as the number of bands is increased. For a dynamic compressive gammachirp filterbank, the gammawarp implementation is 27 to 47 times faster than the dcGC MATLAB code of Irino.

The dynamic gammawarp auditory filterbank.

Auditory filterbanks are an integral part of many metrics designed to predict speech intelligibility and speech quality. Considerations in these applications include accurate reproduction of auditory filter shapes, the ability to reproduce the impact of hearing loss as well as normal hearing, and computational efficiency. This paper presents an alternative method for implementing a dynamic compressive gammachirp (dcGC) auditory filterbank [Irino and Patterson (2006). IEEE Trans. Audio Speech Lang. Proc. 14, 2222-2232]. Instead of using a cascade of second-order sections, this approach uses digital frequency warping to give the gammawarp filterbank. The set of warped finite impulse response filter coefficients is constrained to be symmetrical, which results in the same phase response for all filters in the filterbank. The identical phase responses allow the dynamic variation in the gammachirp filter magnitude response to be realized as a sum, using time-varying weights, of three filters that provide the responses for high-, mid-, and low-intensity input signals, respectively. The gammawarp filterbank offers a substantial improvement in execution speed compared to previous dcGC implementations; for a dcGC filterbank, the gammawarp implementation is 24 to 38 times faster than the dcGC Matlab code of Irino.

Remark on Algorithm 539

We propose a set of new Fortran reference implementations, based on an algorithm proposed by Kahan, for the Level 1 BLAS routines *NRM2 that compute the Euclidean norm of a real or complex input vector. The principal advantage of these routines over the current offerings is that, rather than losing accuracy as the length of the vector increases, they generate results that are accurate to almost machine precision for vectors of length N < N max where N max depends upon the precision of the floating point arithmetic being used. In addition, we make use of intrinsic modules, introduced in the latest Fortran standards, to detect occurrences of non-finite numbers in the input data and return suitable values as well as setting IEEE floating point status flags as appropriate. A set of C interface routines is also provided to allow simple, portable access to the new routines. To improve execution speed, we advocate a hybrid algorithm; a simple loop is used first and, only if IEEE floating point exception flags signal, do we fall back on Kahan’s algorithm. Since most input vectors are “easy,” i.e., they do not require the sophistication of Kahan’s algorithm, the simple loop improves performance while the use of compensated summation ensures high accuracy. We also report on a comprehensive suite of test problems that has been developed to test both our new implementation and existing codes for both accuracy and the appropriate settings of the IEEE arithmetic status flags.

Interactive reconstruction of Monte Carlo image sequences using a recurrent denoising autoencoder

We describe a machine learning technique for reconstructing image sequences rendered using Monte Carlo methods. Our primary focus is on reconstruction of global illumination with extremely low sampling budgets at interactive rates. Motivated by recent advances in image restoration with deep convolutional networks, we propose a variant of these networks better suited to the class of noise present in Monte Carlo rendering. We allow for much larger pixel neighborhoods to be taken into account, while also improving execution speed by an order of magnitude. Our primary contribution is the addition of recurrent connections to the network in order to drastically improve temporal stability for sequences of sparsely sampled input images. Our method also has the desirable property of automatically modeling relationships based on auxiliary per-pixel input channels, such as depth and normals. We show significantly higher quality results compared to existing methods that run at comparable speeds, and furthermore argue a clear path for making our method run at realtime rates in the near future.