Impedance Attenuation Research Articles

A low power LDO with high PSR over a wide frequency range based on an impedance attenuation buffer

A low power LDO with high PSR over a wide frequency range based on an impedance attenuation buffer

A stacked LDO regulator and its application in synchronous Bi-directional converter

A stacked LDO regulator is presented and its applications in a synchronous Bi-directional converter is investigated. This stacked LDO concurrently provide 5.1 V and 3.3 V power supplies by VCC and VDD regulator respectively. The VCC regulator adopts a buffer impedance attenuation technique to enhance the system stability. VDD regulator, powered by VCC regulator, utilizes a PSRR improvement circuit to eliminate noise. The chip is fabricated in 0.18 μm CMOS process with 1.45 mm2. The test results show that at input voltage of 5∼12 V, the VCC regulator supports at least 70 mA capability with 1 μF capacitor, and the VDD regulator supports at least 50 mA capability with 1 μF capacitor. Their load regulations are 2.173 mV/mA and 2.45 μV/mA, respectively. PSRR of VCC regulator and VDD regulator are −67.9 dB and −138 dB at 1 Hz. The line regulations are 1.66 % and 0.0025 %, respectively. The total converter achieves a high peak efficiency of 95 % with the 0.25 mA quiescent current.

Unmasking the delamination mechanisms of a defective coating under the co-existence of alternating stress and corrosion

The coating delamination occurring in the conditions where alternating stress and corrosion co-exist threatens the coating integrity and operating life. Therefore, the corresponding investigation is highly significant. In this work, the delamination behavior of a defective coating in the coexistence of alternating stress and electrochemical corrosion was studied in a novel experimental setup in which the electrochemical measurement and fatigue test could be conducted simultaneously. The electrochemical impedance spectroscopy and scanning electron microscope coupled with X-ray energy dispersive spectroscopy were employed to analyze the degree and mechanism of coating delamination, as well as the ABAQUS software was used to simulate the stress distribution on the substrate surface. The results show that in a corrosive environment, the rate of the coating delamination increases dramatically once the alternating stress is applied. The coating delamination occurs first at the stress concentration and expands rapidly to the surrounding area. When the alternating stress is 460 MPa, the impedance attenuation coefficient, delamination width and delamination length are even 4.7 times, 8.1 times and 5.5 times bigger than the case under the static condition without alternating stress, respectively. The interfacial adhesion of the coating-substrate is weakened by the joint action from accumulated fatigue and local alkalization. Accumulated fatigue and local alkalization are resulted from alternating stress and corrosion, respectively. As a result, the coating delamination occurs rapidly. Meanwhile, alternating stress and corrosion show a synergistic effect on coating delamination, i.e., alternating stress accelerates corrosion process, while corrosion exacerbates the mechanical damage of alternating stress. Therefore, it is necessary to pay high attention to the risk of coating delamination in application scenarios, where alternating stress and corrosion are simultaneously present.

Design of 1.2 V CMOS flipped voltage follower based output-capacitor-less low dropout regulator with improved voltage buffer for impedance attenuation

Design of 1.2 V CMOS flipped voltage follower based output-capacitor-less low dropout regulator with improved voltage buffer for impedance attenuation

Exploring Low-Loss Surface Acoustic Wave Devices on Heterogeneous Substrates.

This article presents shear horizontal surface acoustic wave (SH-SAW) devices with excellent temperature stability and low loss on ultrathin Y42-cut lithium tantalate film on sapphire substrate (LiTaO3-on-sapphire, LTOS). The demonstrated resonators exhibit scalable resonances from 1.76 to 3.17 GHz, effective electromechanical coupling coefficients between 5.1% and 7.6%, and quality factors (Bode-Q) between 419 and 3019. The filter with a center frequency of 3.26 GHz features a suppressed spurious passband, a 3-dB fractional bandwidth (FBW) of 3%, and a minimum insertion loss (IL) of 2.39 dB. In addition, coplanar waveguides (CPWs) and SH-SAW resonators built on LTOS and LiTaO3-on-insulator (LTOI) substrates were compared over a temperature range of 25 °C-150 °C. Due to the extremely high resistivity of the sapphire and the excellent thermal stability of the LiTaO3/sapphire interface, the IL of the CPW and the impedance ratio (in addition to Bode-Q) of the SH-SAW on the LTOS are maintained well even at 150 °C, while those on the LTOI seriously deteriorate. Of these, the impedance attenuation of LTOS-SAW at the antiresonant frequency is only 3.7 dB at 150 °C, whereas that of LTOI-SAW reaches 9.6 dB, demonstrating excellent temperature stability of the LTOS substrate's radio frequency (RF) performance. Overall, the SAW devices on LTOS substrates show great potential for temperature-sensitive and low-loss applications in RF wireless communications.

An output-capacitor-less flipped voltage follower based low dropout regulator with improved buffer impedance attenuation in 45 nm CMOS technology

A flipped voltage follower (FVF) based low drop out (LDO) with fast transient response is presented here. A simple fast FVF stage is associated with an output impedance enhanced source follower driving gate of pass element for faster recovery during load transients. The proposed LDO is capable of driving 10’s of pF to 1nF capacitive loads while maintaining enough phase margin for stability. This LDO offers stable regulation upto 30 mA producing a regulated voltage of 1.10V with 1.2V dc supply. The LDO is implemented in 45 nm CMOS technology which consumes 72μA of quiescent current under full load of 30 mA. LDO achieves -18-22 dB of PSRR over the band of 1-1MHz, over entire range load current drive of 200A-30 mA. 1% settling time of 32.4 ns is achieved with 1nF capacitive for rising load transition of 30mA-200uA and 47.52 ns settling time for falling load transition of 200μA-30 mA. DC line and load regulations for a typical 100pF load are respectively around 0.018V/V and 1.8mV/30 mA. The regulated voltage of 1.1V is maintained during process corners and wide temperature ranges (-60 °C to 60 °C) for 1.2V supply.

Global impedance attenuation network for multistage OTAs driving a broad range of load capacitor

SummaryAdvanced multistage amplifiers suffer from load‐dependent stability issues, which limit the load capacitor range they can drive. In this work, the concept of global impedance attenuation (GIA) network is introduced to improve an amplifier's stability in the presence of significant load capacitor variations. Composed of multiple parallel resistor‐capacitor (RC) branches, the equivalent high‐frequency output impedance of gain stages is shaped by the GIA network such that a desired frequency spectrum is obtained over a wide range of load capacitor. The parasitic poles at the output of the gain stages are nullified by the proposed network, thereby simplifying the amplifier's transfer function and reducing the minimum load capacitor it can drive. The idea is applied to design a three‐stage operational transconductance amplifier (OTA) with cascode global impedance attenuation (CGIA). Small‐signal analysis shows that the OTA is stable regardless of the load capacitor, and it can drive very small to ultra‐large load capacitors. This feature is verified by the post‐layout simulations of a CGIA amplifier in 0.18‐μm complementary metal‐oxide semiconductor (CMOS) process. The core occupies a die area of 0.0053 mm2 while consuming a static current of 10.97 μA from 1.8‐V voltage supply. The unity‐feedback configuration is unconditionally stable for any load capacitor higher than 10 pF. To the best of our knowledge, this corresponds to the widest range of load capacitance reported for prior‐art three‐stage amplifiers.

A transconductance-enhancement cascode Miller compensation for low-power multistage amplifiers

A transconductance-enhancement cascode Miller compensation technique is proposed for low supply-power, large or very large capacitive load multistage amplifiers. By using the transconductance-enhancement operational amplifiers and the local impedance attenuation network, both the gain bandwidth and setting time are thus significantly improved. The effectiveness of the method has been verified in a 0.18 μm CMOS process, the proposed three-stage amplifier has over 100 dB gain, 6.5 MHz gain-bandwidth product, and 0.83 V/μs slew rate while consuming 23 μW power from a 1.2 V supply while driving a 560 pF load.

A DAC With an Impedance Attenuator and Distortion Analysis Using Volterra Series

An impedance attenuator is implemented to reduce digital-to-analog converter (DAC) distortion, and two techniques to further reduce the distortion are discussed: the first is to use cross-coupled capacitors to cancel nonlinear currents; the second is to optimize the common-mode bandwidth of the differential amplifier for cancellation of distortion. To support these techniques, DAC distortion has been analyzed with the Volterra series, and the analysis is compared with simulation results and measurement data. The analysis uncovers a previously unknown nonlinear cancellation mechanism for the DAC and confirms the proposed techniques. Each technique can contribute 3–6 dB of improvement, and about a 6-dB improvement when combined. The 0.708-mm2 DAC is fabricated in a 28-nm metal-gate digital CMOS process with the proposed impedance attenuator, and it achieves −89 dBc of average HD3 at a 5-MHz input frequency and sampling rate of 230.4 MHz.

A transient-enhanced low dropout regulator with rail to rail dynamic impedance attenuation buffer suitable for commercial design

A low-dropout regulator (LDO) for portable application with a high output swing and dynamic biased impedance-attenuation buffer is presented in this paper. The proposed buffer pushes the dominated pole introduced by the LDO's power FET to higher frequency without consuming large quiescent current. The LDO loop with only one dominant pole within unity gain loop bandwidth is realized. A dynamic current sensing circuit is adopted to make the design more robust. The buffer features a rail-to-rail swing which makes the LDO's power FET size smaller than traditional buffer design for the same current deliverability. A low cost method for trimming is introduced to achieve high yield suitable for commercial design. The LDO has been fabricated in a 0.18µm HV CMOS process. It draws a total current of 40µA and is able to deliver up to 600mA of load current. The proposed method for trimming allows for a high yield of approaching 100%, with line/load regulation error <2%, and the maximum transient output voltage variation of 3% with a load step from 1mA to 600mA in 100ns.

Observations on Attenuation of Local Electrogram Amplitude and Circuit Impedance During Atrial Radiofrequency Ablation: An In vivo Investigation Using a Novel Direct Endocardial Visualization Catheter.

To define the temporal characteristics of atrial lesion growth (lesion surface area), local electrogram amplitude attenuation, and circuit impedance decrement during in vivo radiofrequency (RF) ablation with direct endocardial visualization (DEV). A direct endocardial visualization catheter was used for real-time endoscopic visualization of atrial endocardial surface during RF ablation. Videos of lesion growth (surface area), circuit impedance, and local electrogram amplitude were recorded during ablation in 11 ovine. Fifty-two atrial ablations at 12 W, 14 W, and 16 W power for 30 seconds were analyzed. During 30-second RF ablation, the lesion matured (90% of final lesion dimension) in the first 23.0 ± 5.8 seconds. The local electrogram amplitude attenuation (80% decrement) and circuit impedance attenuation (20% decrement from initial) occurred 13.8 ± 8.2 seconds and 13.1 ± 7.9 seconds, respectively, before lesion maturity in a significant proportion of 30 second atrial ablations. The DEV observations suggest that in smooth atrial surface ablations with significant local electrogram and impedance decrement in the first 10 seconds, further extension of ablation for 10-15 seconds could deliver optimal surface dimensions; however, real-time measurement of depth was not possible.

An Integrated Chip High-Voltage Power Receiver for Wireless Biomedical Implants

In near-field wireless-powered biomedical implants, the receiver voltage largely overrides the compliance of low-voltage power receiver systems. To limit the induced voltage, generally, low-voltage topologies utilize limiter circuits, voltage clippers or shunt regulators, which are power-inefficient methods. In order to overcome the voltage limitation and improve power efficiency, we propose an integrated chip high-voltage power receiver based on the step down approach. The topology accommodates voltages as high as 30 V and comprises a high-voltage semi-active rectifier, a voltage reference generator and a series regulator. Further, a battery management circuit that enables safe and reliable implant battery charging based on analog control is proposed and realized. The power receiver is fabricated in 0.35-μm high-voltage Bipolar-CMOS-DMOStechnology based on the LOCOS0.35-μm CMOS process. Measurement results indicate 83.5% power conversion efficiency for a rectifier at 2.1 mA load current. The low drop-out regulator based on the current buffer compensation and buffer impedance attenuation scheme operates with low quiescent current, reduces the power consumption and provides good stability. The topology also provides good power supply rejection, which is adequate for the design application. Measurement results indicate regulator output of 4 ± 0.03 V for input from 5 to 30 V and 10 ± 0.05 V output for input from 11 to 30 V with load current 0.01–100 mA. The charger circuit manages the charging of the Li-ion battery through all if the typical stages of the Li-ion battery charging profile.

A Cascode Miller-Compensated Three-Stage Amplifier With Local Impedance Attenuation for Optimized Complex-Pole Control

This work presents a power- and area-efficient three-stage amplifier that is able to drive a large capacitive load. Removing the inner Miller capacitor and employing cascode Miller compensation in the outer compensation loop could extend the complex-pole frequency of a three-stage amplifier, but result in a high Q-factor. A local impedance attenuation block consisting of a series RC network is proposed to control the complex poles. This block attenuates the high-frequency resistance at the second-stage output and achieves an optimized tradeoff between the frequency and the Q-factor of the complex poles. As the low-frequency resistance remains unchanged, a high dc gain is maintained. Implemented in 0.13 $\mu$ m CMOS process, the proposed design occupies an area of 0.0032 mm 2 and consumes a quiescent current of 10.5 $\mu$ A. When driving a 560 pF capacitive load, it achieves a unity-gain frequency of 3.49 MHz, an average slew rate of 0.86 V/ $\mu$ s, and an average settling time of 0.9 $\mu$ s.

Adhesive Structure Acoustic Parameters Measurement and Analysis of SRM Based on Ultrasonic Wave

The multilayer adhesive structure of solid rocket motors (SRM) is studied in this paper. The ultrasonic pulse-echo measuring method was described to measuring multilayer adhesive structure acoustic parameters. The sound velocity of the thermal barrier and cladding layer was measured. The acoustic impedance and acoustic attenuation coefficient was gained by theoretical calculation. A method of equivalent thermal barrier was proposed to analyzing the transmission coefficient and the reflection coefficient. The experimental results indicate that the method of equivalent thermal barrier can simplify the SRM theoretical model of multilayer adhesive structure, and thus it can effectively provide a good help for SRM structure acoustic research.

RF-Properties of Single Shielded Power Cable Connectors

In this paper, the correlation between surface transfer impedance and magnetic coupling attenuation of a single shielded power cable in line injection measurements is derived and discussed. Furthermore, magnetic coupling attenuation is calculated, taking into account the influence of cable connectors. Finally, based on the results of this paper, a simple substitution approach by means of line injection measurements to determine the properties of shielded power cable connectors in the RF range is presented.

Analysis of optimal conditions for recording signals when studying the atmospheric boundary layer with the acoustic method of partial reflection

Equations for the coefficient of partial reflection K from stratified inhomogeneities in the atmospheric boundary layer have been derived on the basis of the Epstein transition and symmetrical layer models as functions of three dimensionless parameters, i.e., the relative layer altitude, its relative thickness, and the relative variations in the effective sound speed in a layer. The equations have been obtained for the relative layer altitude at which the total internal reflection appears; the behavior of the function K is studied at close altitudes. Significant weakening of the dependence of coefficient K on the relative layer thickness in these conditions is shown, which makes it possible to record partially reflected signals in a wide range of wave-lengths or frequencies of the sounding signal. In other cases, the coefficient of partial reflection K strongly depends on the layer thickness. According to experimental data on variations in the amplitude of received acoustic signals with an increase in the source-detector distance, a technique for the parameterization of the additional impedance attenuation of sound that propagates over the earth’s surface has been developed, and these parameters have been experimentally estimated for different stratification conditions and sounding signal frequencies. Many records of background acoustic noises typical for one or another measurement sites have been distinguished and classified, a technique for estimating the minimum signal amplitude distinguishable against noises has been developed, and the corresponding estimates have been made. Based on these data and the specifications of three different industrial acoustic sources, the parameter limits provided by these sources have been estimated for the method of partial reflection.

Axially Periodic Dielectric-Loaded Circular Waveguide for Microwave/Millimeter-Wave Devices

A circular waveguide loaded with periodic dielectrics is considered. Two theoretical methodologies have been developed to investigate the wave dispersion characteristics for such structure. The feasibility and accuracy of the theoretical approaches have been verified by high frequency structural simulator (HFSS) simulations. Using the theoretical approaches, effects of the material properties and structure dimensions on the dispersion characteristics, power distribution, coupling impedance, and wave attenuation have been analyzed, and results obtained for different structures have been compared. Examples of W-band structures with periodic dielectric loading that can be used in various microwave devices have been given. The presented methodologies and results can be used for design optimization of microwave devices with dielectric loading.

Comparison Analysis of Absorption Properties for Microwave Absorbent

In order to compare the absorbing properties of different microwave-absorbing agents and their mixture, this paper has selected two typical microwave-absorbing agents which respectively are carbon fiber resistance microwave-absorbing agents and ferrite magnetism microwave-absorbing agents, and took them as monolayer absorbing materials. Then used MG formula to calculate the effective electromagnetic parameter of their mixture under different proportion at X band, and finally analyzed their absorbing properties separately. Then through contrasting the impedance matching characteristic and attenuation coefficient of the materials, it is proved that adding carbon fiber in ferrite can not improve absorption properties. Although the ability of attenuating electromagnetic wave would be enhanced when resistance materials and magnetism materials are blend with each other, doping will destroy the materials’ impedance matching characteristic because most resistance materials have high permittivity. It makes reflection strengthen and can not improve absorbing properties.

Analysis of Absorption Properties for Magnetism-Absorbing Agents Mixed with Semiconductor Particulate

In order to improve absorbing properties of material effectively, enhance the ability of attenuating electromagnetic wave, and at the same time, make the impedance matching with air to the most extent, this paper mixed ferrite magnetism microwave-absorbing agents with semiconductor particulates. We got the effective EM parameter of the mixture using effective EM parameter model, and then analyzed absorption properties. As the result, it figured out the cubage proportion and conductance of semiconductor particulates based on the resistance matching principle. Through calculating the reflection ratio、impedance matching characteristic and attenuation coefficient of the material, it is proved that mixing ferrite magnetism microwave-absorbing agents with semiconductor particulate which has less permittivity could reduce real complex permittivity and increase imaginary complex permittivity of the composite material. It was able to enhance the ability of attenuating electromagnetic wave, improve absorbing properties, and meanwhile do not destroy the impedance matching characteristic with air.

Design of Relaxation Oscillator Based Ultra-wideband SFQ Amplifier for Chip to Chip Interconnection

In Rapid Signal Flux Quantum (RSFQ) logic circuits, on-chip interconnects and multichip module implementations for nearby distances have already been established. However, the flexible interconnection of two distant chips is still not achieved reliably due to impedance mismatching and attenuation. In this work, we propose a circuit that allows the usage of Passive Transmission Lines (PTLs) to transfer single-flux-quantum (SFQ) pulses between two distant chips which are separated by a distance greater than 10 cm by using 50 Ω transmission lines. For this purpose, we design an SFQ amplifier circuit to deal with impedance mismatch and attenuation problems. The circuit consists of two main parts: a relaxation oscillator (RO) circuit and an impedance transformer. The RO circuit utilizes relaxation oscillations occur in the underdamped Josephson junctions. The impedance matching circuit is an 8-section Chebyshev quarter-wave transformer and it eliminates impedance mismatching problem between the amplifier circuit and PTL. We performed circuit simulations and obtained voltage amplitude of about 600 μV at the output of the circuit. The transformer has a broadband impedance matching with a fractional bandwidth (ratio of the bandwidth of a device to its central frequency) of 1.4 and a maximum Voltage Standing Wave Ratio (VSWR, the maximum voltage divided by minimum voltage on the transmission line) of 1.5.