Impact Of Total Ionizing Dose Research Articles

Total ionizing dose hardness analysis of transistors in commercial 180 nm CMOS technology

The very large scale integrated (VLSI) circuits become susceptible to soft errors mainly due to exposure to harsh environmental conditions. In this paper, the analysis of total ionizing dose (TID) effects on single gate NMOS, enclosed gate NMOS (ELT NMOS), and single gate PMOS are carried out for 180 nm CMOS technology. The various MOS architectures were exposed to radiation using Cobalt-60 (Co60) radiation source. The charge density distribution at pre-radiation and post-radiation condition for all the three above said structures are observed. It is observed that the threshold voltage shift for the single gate NMOS device is about 25 times more in comparison to the ELT NMOS device after radiation at 30 Å (Å) gate oxide thickness. The transfer characteristics (drain current versus gate to source voltage) of single gate NMOS is compared for TID from 0 krad to 500 krad with a step size of 100 krad at different oxide thicknesses from 15 Å to 75 Å. It is observed that the drain current increases with an increase in total dose in the sub-threshold region for lower gate oxide thickness (15 Å to 45 Å) while with the increase of gate oxide thickness (beyond 60 Å), the drain current increases significantly for the higher gate to source voltage also. The drain saturation current decreases with the increase of oxide thickness from 15 Å to 75 Å. The impact of TID on single gate PMOS is analysed and no significant effect of radiation observed on threshold voltage or leakage current. The leakage current shift is the least for single gate PMOS among the single gate NMOS, ELT NMOS, and single gate PMOS after radiation of 500 krad total dose. The layouts are designed in Cadence virtuoso software and simulated in Visual TCAD software.

Impact of TID on Within-Wafer Variability of Radiation-Hardened SOI Wafers

Impact of total ionizing dose (TID) on the within-wafer variability of radiation-hardened (RH) silicon-on-insulator (SOI) wafers is investigated in this article. The within-wafer variability is measured by the front gate and back gate <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$I$ </tex-math></inline-formula> – <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula> characteristics of the transistors in 32 dies evenly distributed on wafer locations. The experimental results show the complex dependence of the within-wafer variability on TID: the within-wafer variability of RH SOI wafer is first weakened by TID irradiation and then rebounds. The evolution of net trapped charge induced by TID in buried oxide (BOX) is affected by positively charged silicon nanoclusters introduced by silicon ion implantation, which is responsible for the above complex dependence. Moreover, radiation hardness assurance method relying on sample testing of limited wafer locations is discussed, which can give the reasonable estimation of the within-wafer variability on TID irradiated devices.

Impact of TID on latch up induced by pulsed irradiation in CMOS circuits

Latch up (LU), an inherent destructive phenomenon owning to P-N-P-N structure in bulk Complementary Metal-Oxide -Silicon (CMOS) circuits, is highly sensitive to pulsed irradiation. A criterion for LU is concluded, and the impact of total ionizing dose (TID) on LU criterion is discussed. In the progress of accumulating TID, generated oxide trapped charges and interface states enhance surface recombination in the base of the parasitic bipolar junction transistor (PBJT), leading to increase of the base recombination current; and the trapped charges in the shallow trench isolation (STI) can also increase leakage current. In spite of hindering effect of the base recombination in PBJTs to LU, the STI leakage current plays a dominant role to gain sensitivity of LU. Experimental results confirm the fact that TID can lower the dose rate threshold for LU. For instance, the threshold in the device with doses 150 krad(Si) is nearly 50% lower than that in the pristine device. Simulations in SPICE and Sentaurus are conducted, and the results agree with that of experiments.

Analysis of Total Ionizing Dose effects for highly scaled CMOS devices in Low Earth Orbit

Abstract Total Ionizing Dose (TID) effects are an essential concern for integrated devices that are operating in space environment. We present in this work an extensive study of TID effects in Deep-Submicron and Nanoscale CMOS technologies. Principal aspects are the changes of the transistors I-V characteristics due to TID effects, the variation of the threshold voltage and the impact of radiation on the carrier densities and mobility as well as on the electrical potentials and the leakage currents. Further, we discuss a potential solution that reduces TID effects in CMOS devices. The device level simulations consider a satellite application that orbits in Low Earth Orbit (LEO), leading to dose levels of up to 500 krad(Si). Results clearly indicate the high impact of TID on the transistor parameters, enforcing the designer to consider countermeasures in order to guarantee the circuits reliability.

Study of Total-Ionizing-Dose Effects on a Single-Event-Hardened Phase-Locked Loop

The sensitivity of total-ionizing-dose (TID) response on a single-event hardened phase-locked loop (PLL) fabricated in a 130-nm silicon-on-insulator process is investigated. Based on the study of device parameter degradation under radiation exposure, the changes of dc and RF performance of the PLL have been presented. TID experiments on the PLL show that the power-down current increases by 1.5 times, and the tuning range drops by 11.5%. At 600 MHz and up to 500 krad(Si), the integrated phase noise increases by 29.2%, and the reference spur increases by 3.4 dB. Finally, the mechanism underlying impact of TID on the phase noise and reference spur has been discussed comprehensively, which combined measured observations with circuit modeling and simulations.

Direct measurement and analysis of total ionizing dose effect on 130 nm PD SOI SRAM cell static noise margin* *Project supported by the National Natural Science Foundation of China (Grant Nos. U1532261 and 11605282) and the Opening Fund of Key Laboratory of Silicon Device Technology, Chinese Academy of Sciences Research Projects (Grant No. KLSDTJJ2016-07)

In this work, the total ionizing dose (TID) effect on 130 nm partially depleted (PD) silicon-on-insulator (SOI) static random access memory (SRAM) cell stability is measured. The SRAM cell test structure allowing direct measurement of the static noise margin (SNM) is specifically designed and irradiated by gamma-ray. Both data sides’ SNM of 130 nm PD SOI SRAM cell are decreased by TID, which is different from the conclusion obtained in old generation devices that one data side’s SNM is decreased and the other data side’s SNM is increased. Moreover, measurement of SNM under different supply voltages (V dd) reveals that SNM is more sensitive to TID under lower V dd. The impact of TID on SNM under data retention V dd should be tested, because V dd of SRAM cell under data retention mode is lower than normal V dd. The mechanism under the above results is analyzed by measurement of I—V characteristics of SRAM cell transistors.

Impact of Total Ionizing Dose on Bulk Built-In Current Sensors with Dynamic Storage Cell

Integrated circuits operating in space and harsh radiation environments are subject to the progressive accumulation of Total Ionizing Dose (TID), as well as to Single Event Transients (SET) produced by single energetic particles. We designed Bulk Built-In Current Sensors with Dynamic Storage Cell (DynBICS) to detect SET induced by ionizing radiation in NMOS and PMOS transistors. In this work the impact of TID on a complementary pair of DynBICS circuits is studied. The DynBICS were manufactured in IBM 130 nm technology and proved to be resistant to TID effects up to the limit of 600 krad (Si). The total dose reached in the test campaign was 616 krad (Si) from a 60Co gamma source. The ability of the DynBICS to detect SET remained fairly stable, and the impact of the accumulated dose on the performance of the circuit is discussed in detail.

Impact of TID on response to pulsed X-ray irradiation in the bipolar operational amplifier

Groups of a typical operational amplifier-μA741 were irradiated in a cobalt unit, each group accumulating a different total ionizing dose (TID). The results showed that the TID caused power consumption current and slew rate (SR) to degenerate in ultra-linearity, owing to a severe reduction in the current gain of the internal LPNP transistors. Pulsed X-ray irradiation experiments were carried out on the μA741 groups with different values, and the results revealed that the impact on the response to the pulsed X-ray irradiation was greater when the devices absorbed more TID. The mechanism for this is explained on the basis of the circuit construction of the μA741; the sensitive parameters of the circuit were obtained via simulation on SPICE. The simulation results additionally showed that if the sensitive parameters were optimized, the duration of interruption caused by the pulsed X-ray irradiation would be reduced significantly. In addition, several proposals are provided for hardening the devices.