III-V Semiconductor Substrates Research Articles

State of the Art Sub-Terahertz Switching Solutions

In this paper the state of the art in RF switches for mm-wave frequency range is summarized and evaluated. Several leading technologies is presented from typical semiconductor devices based on transistors and diodes on Si, SiGe or III-V semiconductor substrates to more unconventional solutions such as microelectromechanical or phase-change material switches. The most important parameters and characteristics for those technologies are gathered and compiled for comparison. Besides different technologies, also various switch topologies of mm-wave switches are presented, assessed and compared. Furthermore, new emerging technological solutions approaching mm-wave range involving two-dimensional materials are also presented. Their evaluation is focused on proposed designs and current results for experimentally evaluated prototypes. Although the performance of these devices are currently not competitive with more traditional approaches, some reported results near the mm-wave range makes them a promising solution for future mm-wave switches and an interesting topic for further research and development.

Atomic-scale study of Si-doped AlAs by cross-sectional scanning tunneling microscopy and density functional theory

Silicon (Si) donors in GaAs have been the topic of extensive studies since Si is the most common and well understood n-type dopant in III-V semiconductor devices and substrates. The indirect bandgap of AlAs compared to the direct one of GaAs leads to interesting effects when introducing Si dopants. Here we present a study of cross-sectional scanning tunneling microscopy (X-STM) and density functional theory (DFT) calculations to study Si donors in AlAs at the atomic scale. Based on their crystal symmetry and contrast strengths, we identify Si donors up to four layers below the (110) surface of AlAs. Interestingly, their short-range local density of states (LDOS) is very similar to Si atoms in the (110) surface of GaAs. Additionally we show high-resolution images of Si donors in all these layers. For empty state imaging, the experimental and simulated STM images based on DFT show excellent agreement for Si donor up to two layers below the surface.

Ultralow power spin\u2013orbit torque magnetization switching induced by a non-epitaxial topological insulator on Si substrates

The large spin Hall effect in topological insulators (TIs) is very attractive for ultralow-power spintronic devices. However, evaluation of the spin Hall angle and spin–orbit torque (SOT) of TIs is usually performed on high-quality single-crystalline TI thin films grown on dedicated III-V semiconductor substrates. Here, we report on room-temperature ultralow power SOT magnetization switching of a ferrimagnetic layer by non-epitaxial BiSb TI thin films deposited on Si/SiO2 substrates. We show that non-epitaxial BiSb thin films outperform heavy metals and other epitaxial TI thin films in terms of the effective spin Hall angle and switching current density by one to nearly two orders of magnitude. The critical SOT switching current density in BiSb is as low as 7 × 104 A/cm2 at room temperature. The robustness of BiSb against crystal defects demonstrate its potential applications to SOT-based spintronic devices.

Silicon–plasmonic integrated circuits for terahertz signal generation and coherent detection

Optoelectronic signal processing offers great potential for generation and detection of ultra-broadband waveforms in the THz range, so-called T-waves. However, fabrication of the underlying high-speed photodiodes and photoconductors still relies on complex processes using dedicated III-V semiconductor substrates. This severely limits the application potential of current T-wave transmitters and receivers, in particular when it comes to highly integrated systems that combine photonic signal processing with optoelectronic conversion to THz frequencies. In this paper, we demonstrate that these limitations can be overcome by plasmonic internal photoemission detectors (PIPED). PIPED can be realized on the silicon photonic platform and hence allow to leverage the enormous opportunities of the associated device portfolio. In our experiments, we demonstrate both T-wave signal generation and coherent detection at frequencies of up to 1 THz. To proof the viability of our concept, we monolithically integrate a PIPED transmitter and a PIPED receiver on a common silicon photonic chip and use them for measuring the complex transfer impedance of an integrated T-wave device.

Atomic layer etching of Al2O3 using BCl3/Ar for the interface passivation layer of III–V MOS devices

BeO was investigated as the interface passivation layer (IPL) between a high-k dielectric and a III-V compound semiconductor substrate in metal-oxide-semiconductor (MOS) devices. One of the critical issues facing the fabrication of next generation MOS devices is the minimization of damage to the III-V semiconductor substrate during the etching of the thin IPL. In this study, atomic layer etching (ALET) was investigated for etching of BeO as the IPL on a GaAs substrate to control the etch depth precisely and to minimize the damage to the III-V semiconductor substrate. By using ALET to etch BeO, which uses BCl3 as the adsorption gas for the formation of chloride compounds (Be-Cl and BCl-O) and Ar as the desorption gas for the removal of the chloride compounds, a self-limited, one-monolayer etch rate of about 0.75A/cycle was achieved with no increase of surface roughness and without change of surface composition. Moreover, under the BeO ALET conditions, which are able to precisely stop etching over the GaAs substrate after removing BeO, the exposed GaAs substrate showed surface composition and surface roughness similar to those of the as-received GaAs substrate.

Fabrication of large-area, high-density Ni nanopillar arrays on GaAs substrates using diblock copolymer lithography and electrodeposition

Large-area, ultradense Ni nanopillar arrays were fabricated directly on bare n-GaAs substrates using diblock copolymer lithography and electrodeposition. The Ni nanopillar arrays are hexagonally arranged, exhibiting an average pillar diameter of ∼24 nm, and an areal density of ∼1011/cm2 over an entire surface area of 1 cm × 1 cm. These arrays represent large-scale, highly dense, sub-30 nm metal-nanopillar arrays made on III-V semiconductor substrates suitable as pattern masks. The fabrication method offers a simple and effective route to manufacturing large-area, highly dense, sub-30 nm metal nanostructures for III-V optoelectronic devices, in order to enhance their performance and functionalities.

Fabrication of Axial and Radial Heterostructures for Semiconductor Nanowires by Using Selective-Area Metal-Organic Vapor-Phase Epitaxy

The fabrication of GaAs- and InP-based III-V semiconductor nanowires with axial/radial heterostructures by using selective-area metal-organic vapor-phase epitaxy is reviewed. Nanowires, with a diameter of 50–300 nm and with a length of up to 10 μm, have been grown along the〈111〉B or〈111〉A crystallographic orientation from lithography-defined SiO2mask openings on a group III-V semiconductor substrate surface. An InGaAs quantum well (QW) in GaAs/InGaAs nanowires and a GaAs QW in GaAs/AlGaAs or GaAs/GaAsP nanowires have been fabricated for the axial heterostructures to investigate photoluminescence spectra from QWs with various thicknesses. Transmission electron microscopy combined with energy dispersive X-ray spectroscopy measurements have been used to analyze the crystal structure and the atomic composition profile for the nanowires. GaAs/AlGaAs, InP/InAs/InP, and GaAs/GaAsP core-shell structures have been found to be effective for the radial heterostructures to increase photoluminescence intensity and have enabled laser emissions from a single GaAs/GaAsP nanowire waveguide. The results have indicated that the core-shell structure is indispensable for surface passivation and practical use of nanowire optoelectronics devices.

Integrated sensitive on-chip ion field effect transistors based on wrinkled InGaAs nanomembranes

Self-organized wrinkling of pre-strained nanomembranes into nanochannels is used to fabricate a fully integrated nanofluidic device for the development of ion field effect transistors (IFETs). Constrained by the structure and shape of the membrane, the deterministic wrinkling process leads to a versatile variation of channel types such as straight two-way channels, three-way branched channels, or even four-way intersection channels. The fabrication of straight channels is well controllable and offers the opportunity to integrate multiple IFET devices into a single chip. Thus, several IFETs are fabricated on a single chip using a III-V semiconductor substrate to control the ion separation and to measure the ion current of a diluted potassium chloride electrolyte solution.

Gigahertz surface acoustic wave generation on ZnO thin films deposited by radio frequency magnetron sputtering on III-V semiconductor substrates

The authors demonstrate 1.6GHz surface acoustic wave (SAW) generation using interdigital transducers patterned by e-beam lithography on a thin ZnO piezoelectric film deposited on an InP substrate. The highly oriented, dense, and fine-grain ZnO film with high resistivity was deposited by radio frequency magnetron sputtering and was characterized by x-ray diffraction, scanning electron microscopy, atomic force microscopy, and a four-point probe station. The acoustic wavelength of the 1.6GHz SAW generated by exciting the interdigital transducer on ZnO∕InP with a microwave signal is 1.6μm. This SAW filter device could be monolithically integrated with optoelectronic devices, opening new opportunities to use SAWs for applications such as gigahertz-frequency filters on optoelectronic devices and novel widely tunable quantum cascade lasers.

1D nanostructures grown on GaAs and InP substrates

Nowadays nanoelectronics is a very promising and dramatically developing field for physics basic research and R&D activities. The most common material for nanoelectronic components are the semiconductor nanowires, carbon nanotubes and metal nanowhiskers. There are still many questions about the growth and synthesis of these 1D nanostructures and the true nature of the growth mechanisms is yet undiscovered. There are some growth theories but neither of them can describe the whole growth process without leaving unanswered questions. Nanowires can easily be grown on III-V semiconductor substrates. The key is the presence of some catalyst particles. According to one of the growth theories the particles (atoms, molecules) diffuse into the catalyst particle which is a gold seed with the approximate diameter of 100nm in our experiments. A crystallization phenomenon occurs after reaching the critical concentration in the gold seed. Consequently a cylinder-shaped nanowire will grow under the gold particle (Tip-type growth). We show a 3D FEM (Finite Element Method) time-dependent model of the gas-gold-substrate system from which we can determine the concentration of dissolved matter in the gold particle vs. time. This model is an extended version of previous solid-state diffusion (SSD) models. The FEM modelling was performed based on earlier results of TEM (Transmission Electron Microscopy), SEM (Scanning Electron Microscopy) experiments and EDS (Energy-Dispersive Spectroscopy) analysis.

Fabrication of Size Controlled Nanohole Array on III-V Semiconductor Substrate by ICP-RIE Using Nanoporous Alumina Mask

Formation of size controlled nanohole arrays on semiconductor substrate can be used variously in applications of photonic and electronic device. The unique structure of nanoporous alumina was directly used as an etching mask for pattern transfer into the GaAs substrate. Using the alumina masks prepared at the anodic voltage of 24 V in 0.3 M sulfuric acid solution and 40 V in 0.3 M oxalic acid solution, fabricated were the arrays of nanohole on GaAs substrate by inductively coupled plasma reactive ion etching (ICP-RIE). The etching was conducted in a SiCl4/Ar mixed gas system. The uniform nanohole arrays were formed as replica of ordered lattice pattern of the mask. Depending on property of the alumina mask used, the size of nanohole was controlled to have hole diameter of 60 nm (with the hole density of 1.0 x 1010 cm-2) and of 30 nm (with the hole density of 2.7 x 1010 cm-2), respectively. So, the alumina mask attached on the GaAs substrate mainly determines the distribution and the size of the nanohole arrays. ICP-RIE using nanoporous alumina masks can control the size and the density of nanohole on compound semiconductor substrate.

VGF Excellence at AXT: a major force in manufacturing III-V semiconductor substrates

AXT has established itself as the leading manufacturer of high-quality GaAs substrate material during the past few years. The company is expanding steadily into other III-V semiconductor substrates, such as InP and GaN. AXT's 1995 GaAs sales ranked No. 1 among all U.S. suppliers. The key to AXT's success: VGF technology.

Atomic Force Microscope Chemically Induced Direct Processing

AbstractInterest in room-temperature operable quantum effect devices has created a need for simple and inexpensive nanofabrication techniques. By applying a bias to a conductive AFM tip, we have succeeded in fabricating narrow (˜30 nm) oxide lines on a variety of metal and III-V semiconductor substrates. The effects of different drawing parameters such as tip bias, translation speed, ambient atmosphere, and substrate doping on line quality were explored.

Nanolithography on III-V semiconductor surfaces using a scanning tunneling microscope operating in air

Nanometer-scale pattern generation on III-V semiconductor substrates using a scanning tunneling microscope (STM) operating in air is demonstrated. The sample substrates, consisting of arsenic-capped, epitaxial layers of n-doped GaAs, AlxGa1−xAs and InyGa1−yAs were prepared by molecular beam epitaxy and characterized by time-of-flight secondary-ion mass spectrometry and x-ray photoelectron spectroscopy. The direct patterning of features of width ≤50 nm on GaAs and In0.2Ga0.8As surfaces is shown to be the result of the formation of a strongly bonded surface oxide induced under high electric field conditions existing between the scan tip and the substrate. The significance of STM pattern generation of nanometer-scale oxide masks for use in the fabrication of low-dimensional heterostructures is discussed.

The growth of ZnSe and other wide-bandgap II-VI semiconductors by MOCVD

ZnSe was first grown by MOCVD some years ago. However, it is only in recent years that the material quality has improved sufficiently for potential devices to be evaluated. This paper discusses the growth by MOCVD of high-purity ZnSe epitaxial layers, wide-bandgap II-VI ternary alloys, multilayers and low-dimensional structures with potential for blue or blue-green light emission. The growth conditions for high-purity ZnSe layers (ND-NA<1015 cm-3), the structure of such layers grown heteroepitaxially on to III-V semiconductor substrates, the influence of the precursors and the resulting luminescence are considered. Important factors such as the growth conditions required for the alloys and multilayers are also discussed, together with pertinent imposed material constraints. Finally, the major residual problems associated with MOCVD growth are identified and possible solutions presented.

Formation of microgratings for III-V semiconductor integrated optoelectronics by high-voltage electron-beam lithography

The importance of low-order Bragg reflection gratings in semiconductor integrated optoelectronics is discussed and the advantages of direct-write electron-beam lithography for defining such gratings are described. We present the results of a theoretical and experimental study of this technique on bulk III-V semiconductor substrates. The use of 60-keV electron beams is shown to give improved edge resolution and relaxed tolerance on dosage compared with conventional (15-30 keV) beam energies. This enables fine patterns with high aspect ratios to be defined on thick (0.3-0.5 μm) resist films. Gratings having 0.23-μm period and 1:1 mark/space ratio have been defined on thick PMMA resist over InP substrates. Initial results for formation of gratings on GaInAsP/InP heterostructure substrates are presented.

Microscopic study of semiconductor heterojunctions: Photoemission measurement of the valance-band discontinuity and of the potential barriers

We report on synchrotron-radiation photoemission measurements of the valence-band discontinuity and of the Fermi-level position for 25 different interfaces involving group-IV, III-V, and II-VI semiconductor substrates and Ge or Si overlayers. A comparison is made between our measured discontinuities and the predictions of current theoretical models. We find the best agreement with empirically corrected versions of the models of Harrison and of Frensley and Kroemer. However, we present a new empirical rule based on our present results and on those of other authors which yields even more accurate predictions of band discontinuities. The measured Fermi-level-pinning position of each substrate is the same for both Ge and Si overlayers. This result is discussed in terms of the "defect model" of Fermi-level pinning, originally developed for Schottky barriers.