III-V Heterostructures Research Articles

Label-free biomolecule detection with dielectrically modulated double gate single cavity InGaAs/GaAsSb HTFET: Design considerations and performance evaluation

Dielectrically Modulated Double Gate Single Cavity InGaAs/GaAsSb HTFET (DMDG–SC–InGaAs/GaAsSb HTFET) is a novel label-free, nanocavity embedded dielectrically modulated heterostructure TFET-based biosensor. The III-V heterostructure (InGaAs/GaAsSb) has a high ION/IOFF ratio, better gate control, and higher tunnelling probability. In order to effectively reduce ambipolarity, asymmetrical doping is used at the p+ source and n+ drain, along with gate work function engineering. The stacked layers of HfO2/SiO2 gate oxide help to reduce the fringing electric field. The suggested device utilizes a dielectrically controlled technique to achieve biomolecule conjugation. This is done by etching a single nanogap cavity in the gate dielectric material towards the source end. An evaluation of the dielectric constants [K = 2.1, 2.63, 3.30, 6.3, and 12] of neutral and charged biomolecules compared to air [k = 1] is essential to determine the sensitivity of biosensors in an arid environment. The transconductance-to-current ratio (gm/Ids), switching ratio (ION/IOFF), and threshold voltage are the performance metrics used to evaluate the device sensitivity. The DM-DG–SC–InGaAs/GaAsSb HTFETpromises to be very sensitive while using less power during the detection process. It also shows that it could be a good choice for label-free biosensor applications.

(Invited) III-V Integration on Silicon for Resource-Efficient Sensor-Technology

This work deals with the wafer-level integration of advanced group III-V devices and integrated circuits on silicon substrate for RF-sensor integration, such as radar functions a very high frequencies beyond 300 GHz [1]. The aim is to achieve both performance improvements on device level, co-integration with digital functions, and advanced integration to achieve a greener usage of material critical to the environment. Submillimeter-Wave frequency bands beyond 300 GHz allow for broadband transmit and receive windows, serviceable to both communications and radar-based applications—increasing data rates and imaging resolutions, respectively. On the other hand, CMOS co-integration is called for by the data acquisition- and other mixed-mode- and fast digital functions. As examples of the integration schemes Terahertz Monolithic Integrated Circuit amplifiers (TMICs) are implemented in an advanced transferred-substrate InGaAs-channel HEMT technology with 20-nm gate length on silicon. The inverted III-V HEMT heterostructure is grown by molecular beam epitaxy (MBE) on 100-mm semi-isolating GaAs wafers and transferred to silicon substrates by using a SiO2-based wafer bond process with subsequent wafer thinning and removal of the GaAs substrate. Thus, only a 100-nm-thick III-V heterostructure layer is remaining on the Si substrate. This advanced transferred-substrate technology also offers the implementation of HEMT devices with backside gate [2,3] to achieve better sub-threshold slope, or field plates to increase both channel confinement and higher breakdown voltages. The 20-nm InGaAs-OI HEMT technology features typical values for the OFF-state breakdown voltage of 5 V and and maximum drain-current density of 1200 mA/mm, respectively. A maximum transconductance of 2400 mS/mm is achieved. The expected cutoff frequency values fT and fmax are above 500 GHz and 1 THz, respectively [4]. A fully passivated back-end-of-line (BEOL) process is used, including three metal layers (MET1–MET3). A NiCr 50 Ohm sq thin-film-resistor layer, as well as an SiN layer for the implementation of MIM capacitors between MET2 andMET3. S-parameter characteristics of a six-stage and nine-stage TMIC amplifiers in the frequency band from 620 to 730 GHz are given as examples. During the on-wafer characterization, the HEMT devices in cascode configuration have been biased at VD= 2 V (1 V drain–source voltage per device) and a current of 350 mA/mm. The measured small-signal gain of the six-stage cascode TMIC amplifier is in the range of 22–25 dB over the frequency range from 670 to above 700 GHz. This corresponds to 4 dB of gain per cascode stage around the 670-GHz frequency range. A nine-stage TMIC amplifier, on the other hand, achieves at least 30 dB of measured gain from 660 to about 700 GHz. This again corresponds to a gain per stage below 4 dB. Such results prove both the advancements in integration as well as state-of-the-art circuit performance co-integrated on silicon.

Vacuum Spin LED: First Step towards Vacuum Semiconductor Spintronics.

Improving the efficiency of spin generation, injection, and detection remains a key challenge for semiconductor spintronics. Electrical injection and optical orientation are two methods of creating spin polarization in semiconductors, which traditionally require specially tailored p-n junctions, tunnel or Schottky barriers. Alternatively, we introduce here a novel concept for spin-polarized electron emission/injection combining the optocoupler principle based on vacuum spin-polarized light-emitting diode (spin VLED) making it possible to measure the free electron beam polarization injected into the III-V heterostructure with quantum wells (QWs) based on the detection of polarized cathodoluminescence (CL). To study the spin-dependent emission/injection, we developed spin VLEDs, which consist of a compact proximity-focused vacuum tube with a spin-polarized electron source (p-GaAs(Cs,O) or Na2KSb) and the spin detector (III-V heterostructure), both activated to a negative electron affinity (NEA) state. The coupling between the photon helicity and the spin angular momentum of the electrons in the photoemission and injection/detection processes is realized without using either magnetic material or a magnetic field. Spin-current detection efficiency in spin VLED is found to be 27% at room temperature. The created vacuum spin LED paves the way for optical generation and spin manipulation in the developing vacuum semiconductor spintronics.

III-V Heterostructure Grown on 300mm Ge/Si Wafer for Large-Scale Fabrication of Red μ-LEDs

We report on the design, fabrication and characterization of red <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> -LEDs directly grown on large-scale silicon wafers through a superior-quality Ge buffer. 300mm Ge/Si substrates with a threading dislocation density (TDD) of ~107 cm−2 were successfully achieved, then followed by the growth and process of visible 649nm AlGaAs-based red emitters. The electro-optical properties of various red <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> -LEDs with diameters ranging from 10 to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$100\mu \text{m}$ </tex-math></inline-formula> are investigated, showing promising performances. Those results coupled with numerical analysis with a model based on transfer-matrix with dipole source-terms help us better identify the main challenges limiting the efficiencies of our devices, while providing optimization routes to alleviate them. We believe that these results could pave the way for a monolithic large-scale and low-cost integration of red <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> -LEDs on 300mm Si-CMOS driving circuits and for the fabrication of high-resolution RGB microdisplays that see use in various applications in optoelectronics.

Photocatalysis screening for group III-V vdW heterostructures constructed by MX (M = Ga, In and X = P, As) monolayers.

To harvest solar energy for water splitting and produce pollution-free hydrogen and oxygen, high-performance photocatalysts are essential. Here, by combining different two-dimensional (2D) group III-V MX (M = Ga, In and X = P, As) monolayers, we designed 144 van der Waals (vdW) heterostructures to identify efficient photoelectrochemical materials. Using first-principles calculations, we investigated the stabilities, electronic properties, and optical properties of these heterostructures. After a careful screening process, we elected GaP/InP in a BB-II stacking configuration as the most promising candidate. This specific GaP/InP configuration has a type-II band alignment with a gap value of 1.83 eV. The conduction band minimum (CBM) is located at -4.276 eV, and the valence band maximum (VBM) is located at -6.217 eV, fully satisfying the requirements of the catalytic reaction under pH = 0. Additionally, light absorption has been improved through the construction of the vdW heterostructure. These results could help in understanding the properties of the III-V heterostructures and guide the experimental synthesis of these materials for photocatalysis applications.

(Invited) SiGe/SOI System: Mechanisms of Condensation and Strain Relaxation

Silicon-Germanium strain engineering has been used for more than two decades in silicon based devices and has contributed to the scaling down of a transistor’s size and to significant improvements in device performance. However, while conventional silicon-germanium based electronics has experienced rapid and steady growth, thanks to this continuous miniaturization of transistors, this trend cannot continue indefinitely. Industry has already moved to alternate methods such as FinFET devices, in which a thin silicon channel is placed vertically, and the FD-SOI (FD-SGOI) design consisting of a thin film Si(SiGe) channel placed horizontally. For nodes scaled down below 28 nm, low power operation will be inherently hindered by both the imperfect interface, non-uniformity of ultra-thin films and quantum confinement effects, which increase the effective bandgap. In these devices, despite the intense research activity on the strained SiGe ultra-thin body, which accounts for a large portion of such microelectronic devices (below the 45 nm node), we still fail to properly understand the mechanisms that limit hole and electron mobilities in SGOI layers. In addition, one of the main challenges for Si based devices remains the fabrication of efficient group-IV photon sources / photon detectors compatible with the microelectronic industry, which would usefully replace the integration of III-V heterostructures on Si. The major bottleneck is that group-IV semiconductor elements have indirect bandgaps, but with possibilities of being transformed to direct bandgaps using strain engineering strategies.In this presentation, we will review the formation mechanism of Ge-rich layers on SOI by condensation at different temperatures. TEM cross-section and GPA analysis of the heterostructures will be presented. We will also report the physical and optical properties of these heterostructures. Special attention is devoted to the influence of the SiGe thickness reduction (up to few MLs), where quantum confinement is prominent in the optical properties of the layers. Raman and PL results will be presented to better explain such confinement behavior. We show that novel SGOI substrates could represent a key strategy for the fabrication of future photonic devices.

Light-Emitting Diodes Based on InGaN/GaN Nanowires on Microsphere-Lithography-Patterned Si Substrates.

The direct integration of epitaxial III-V and III-N heterostructures on Si substrates is a promising platform for the development of optoelectronic devices. Nanowires, due to their unique geometry, allow for the direct synthesis of semiconductor light-emitting diodes (LED) on crystalline lattice-mismatched Si wafers. Here, we present molecular beam epitaxy of regular arrays n-GaN/i-InGaN/p-GaN heterostructured nanowires and tripods on Si/SiO2 substrates prepatterned with the use of cost-effective and rapid microsphere optical lithography. This approach provides the selective-area synthesis of the ordered nanowire arrays on large-area Si substrates. We experimentally show that the n-GaN NWs/n-Si interface demonstrates rectifying behavior and the fabricated n-GaN/i-InGaN/p-GaN NWs-based LEDs have electroluminescence in the broad spectral range, with a maximum near 500 nm, which can be employed for multicolor or white light screen development.

Refractive index dispersion of BGa(As)P alloys in the near-infrared for III-V laser integration on silicon

BxGa(1−x)P and BxGa(1−x)AsyP(1−y) alloys are of potential interest in III-V heterostructures for integration with silicon. Waveguide design utilizing these alloys requires an understanding of the refractive index properties and their variation with composition. Refractive index dispersion was measured and modeled in the wavelength range of 827–2254 nm using spectroscopic ellipsometry at room temperature for samples with boron and arsenic fractions from 0% to 6.6% and 0% to 17%, respectively. The refractive index was found to increase with increasing boron composition as a result of strain due to lattice constant mismatch with the silicon substrate. For the arsenic-containing alloy, the refractive index was found to increase independently of strain. An empirical model based on the composition dependent variation of Cauchy dispersion function coefficients was developed for BGaAsP alloys lattice matched to silicon at the growth temperature. This model can be used to calculate the wavelength dependent refractive index of lattice matched boron and arsenic combinations for applications in semiconductor waveguides, an example of which is proposed. The results of this study are of interest more broadly for other III-V on silicon applications including photovoltaics and more generally in terms of the ellipsometric investigations of thin films on non-native substrates.

Strong coupling between a topological insulator and a III-V heterostructure at terahertz frequency

We theoretically probe the emergence of strong coupling in a system consisting of a topological insulator (TI) and a III-V heterostructure using a numerical approach based on the scattering matrix formalism. Specifically, we investigate the interactions between terahertz excitations in a structure composed of ${\mathrm{Bi}}_{2}{\mathrm{Se}}_{3}$ and GaAs materials. We find that the interaction between the ${\mathrm{Bi}}_{2}{\mathrm{Se}}_{3}$ layer and AlGaAs/GaAs quantum wells with intersubband transitions (ISBTs) in the terahertz frequency regime creates new hybrid modes, namely Dirac plasmon-phonon-ISBT polaritons. The formation of these hybrid modes results in anticrossings (spectral mode splitting) whose magnitude is an indication of the strength of the coupling. By varying the structural parameters of the constituent materials, our numerical calculations reveal that the magnitude of splitting depends strongly on the doping level and the scattering rate in the AlGaAs/GaAs quantum wells, as well as on the thickness of the GaAs spacer layer that separates the quantum-well structure from the TI layer. Our results reveal the material and device parameters required to obtain experimentally observable signatures of strong coupling. Our model includes the contribution of an extra two-dimensional hole gas (2DHG) that is predicted to arise at the ${\mathrm{Bi}}_{2}{\mathrm{Se}}_{3}$/GaAs interface, based on density functional theory (DFT) calculations that explicitly account for details of the atomic terminations at the interface. The presence of this massive 2DHG at the TI/III-V interface shifts the dispersion of the Dirac plasmon-ISBT polaritons to higher frequencies. The damping rate at this interface, in contrast, compensates the effect of the 2DHG. Finally, we observe that the phonon resonances in the TI layer are crucial to the coupling between the THz excitations in the TI and III-V materials.

Layer-resolved release of epitaxial layers in III-V heterostructure via a buffer-free mechanical separation technique.

Layer-release techniques for producing freestanding III-V epitaxial layers have been actively developed for heterointegration of single-crystalline compound semiconductors with Si platforms. However, for the release of target epitaxial layers from III-V heterostructures, it is required to embed a mechanically or chemically weak sacrificial buffer beneath the target layers. This requirement severely limits the scope of processable materials and their epi-structures and makes the growth and layer-release process complicated. Here, we report that epitaxial layers in commonly used III-V heterostructures can be precisely released with an atomic-scale surface flatness via a buffer-free separation technique. This result shows that heteroepitaxial interfaces of a normal lattice-matched III-V heterostructure can be mechanically separated without a sacrificial buffer and the target interface for separation can be selectively determined by adjusting process conditions. This technique of selective release of epitaxial layers in III-V heterostructures will provide high fabrication flexibility in compound semiconductor technology.

Increased Breakdown Voltage in Vertical Heterostructure III-V Nanowire MOSFETs With a Field Plate

Vertical III-V heterostructure MOSFETs exhibit outstanding performance at reduced supply voltages. In this letter, we report on a novel process of extending high-speed device operation towards higher voltages. The device vertical geometry allows for engineering a field plate by covering the nanowire drain area with a 10-nm-thick SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> film. The film acts as a field moderator in the device drain region. Reference devices without a field plate exhibit a transconductance of 2.5 mS/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> , while devices with a 120-nm-long field plate show 1.5 mS/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> but a three times increase in breakdown voltage. Measurements show that the field-screening effect attributes to reduced band-to-band tunneling and impact ionization, thereby reducing the parasitic bipolar effect in the MOSFET channel as well. The devices show promise in applications in circuits and systems requiring large power-handling.

Time-resolved cathodoluminescence investigations of AlN:Ge/GaN nanowire structures

Light emitting diodes represent a key technology that can be found in many areas of everydays life. Therefore, the improvement of the efficiency of such structures offers a high economic and ecological potential. One approach is electrostatic screening of the quantum-confined Stark effect (QCSE) in polar III-V heterostructures by n-type doping in order to increase the oscillator strength of electronic transitions in quantum structures. In this study, we analyzed the cathodoluminescene (CL) spectra of different functional parts of individual AlN/GaN nanowire superlattices and studied their decay characteristics with sub-nanosecond time resolution. This allows us to extract information about strain and electric fields in such heterostructures with an overall spatial resolution <100 nm. The samples, which were investigated in a temperature range from 10 to 300 K by using time-integrated cathodoluminescence spectroscopy (TICL) and time-resolved cathodoluminescence spectroscopy (TRCL) consist of GaN bottom and top layer and a 40-fold stack of GaN nanodiscs, embedded in AlN barriers that were doped with Ge. We show, that the QCSE is reduced with increasing doping concentration due to a screening of the internal electric fields inside GaN nanodiscs, resulting in a reduction of the carrier lifetimes and a blue shift of the emitted light. Due to the small diameter of the electron excitation beam CL offers the possibility to individually analyze the different functional parts of the nanowires.

Anisotropic and low damage III-V/Ge heterostructure etching for multijunction solar cell fabrication with passivated sidewalls

This article presents a complete plasma etching process to etch high aspect ratio patterns on III-V/Ge solar cell heterostructure with low damage for the fabrication of multijunction solar cells with a through cell via contact architecture. A SiCl 4 /H 2 chemistry was studied with different hydrogen dilutions within the plasma (0%, up to 67%) and with different cathode temperatures (20 ∘ C, up to 200 ∘ C). This chemistry choice creates a SiCl x -based inhibiting layer on the sidewalls that promotes anisotropic etching through the epitaxial heterostructure. The study suggests that a high hydrogen flow and a low temperature reduce the chemical reactions that create sidewall erosion. A high hydrogen flow appears to provide a hydrogen passivation of the non-radiative defects on the III-V heterostructure sidewall during the etching process. III-V/Ge triple junction solar cells with standard grid line and busbar front and back contacts have been fabricated and via-holes were plasma-etched through the active layers in order to investigate the impact of hydrogen passivation on the photovoltaic performance. The results demonstrate that the hydrogen passivation enables an open-circuit voltage increase that persists even after 5 months. This plasma process can also be used for the mesa etching step on multijunction solar cells with standard contacts. Thus, it could provide an appealing pathway to increase the conversion efficiency of state-of-the-art multijunction solar cells with standard contacts. To complete the etching process, a liner is used to protect the sidewall properties and a time-multiplexed Ge etching process is proposed to finalize the patterning and even open a pathway towards III-V/Ge plasma dicing. • A complete etching process is proposed to etch deep and anisotropic vias through a III-V/Ge heterostructure. • A low temperature SiCl 4 /H 2 plasma process is well suited to etch III-V/Ge heterostructures with limited sidewall erosion. • High H 2 flow enables a defect passivation on the etched sidewalls and it persists over several months.

(Invited) Hydrophilic Direct Bonding of InP Onto SiO2/Si for Metalorganic Vapor Phase Epitaxy Regrowth Applications

MOVPE regrowth of III-V materials on a directly-bonded InP-SiO2/Si (InPoSi) membrane is of particular interest to transpose the III-V mature multi-regrowth technologies [1][2][3] from the InP substrate classical platform into the hybrid III-V on Si platform [4].MOVPE requires high-temperature elevation, typically above 600°C. We have shown for the first time void formation in a directly bonded InPoSi membrane at high temperature (400°C) despite the use of a thick oxide at the bonding interface [5]. The demonstration of highly efficient outgassing trenches under high temperature annealing as well as MOVPE regrowth of a high-quality III-V heterostructure was obtained.Subsequent improvements in the treatments of the bonded surfaces allowed to achieve MOVPE regrowth of high-quality III-V material without the use of any outgassing methods [6]. In particular, a compressive strain of 400 ppm at growth temperature was shown for the first time by curvature measurements carried out during growth. The latter is due to the difference of thermal coefficients between InP and Si [7]. Despite this thermal strain, a 3 μm-thick laser structure was successfully grown on InPoSi and compared to the same structure on InP as a reference [8]. Device performance are similar for both structures showing that there is no penalty induced by regrowing μm-thick structures onto InPoSi in spite of the thermal strain.

Performance Evaluation of Dielectrically Modulated Extended Gate Single Cavity InGaAs/Si HTFET Based Label-Free Biosensor Considering Non-Ideal Issues

The dielectrically modulated heterostructure TFET based nanocavity embedded label-free biosensors are emerging as low power, highly sensitive bio-analyte detectors. High sensitivity and fast detection of biomolecules are still a challenge for researchers. In this article, single cavity dual-material extended gate heterostructure (III-V) TFET (SC-DM-EG HTFET) based dielectrically modulated label-free biosensor is proposed; which promises higher sensitivity and better device performances such as, ON current, ION/IOFFratio, subthreshold swing (SS); compared with single cavity dual-material heterostructure TFET (SC-DM HTFET), dual cavity dual-material heterostructure TFET (DC-DM HTFET), as well as, previously proposed FET based biosensors. 2D numerical simulation of the biosensors was performed with SILVACO ATLAS 2D simulation software. III-V heterostructure (InGaAs/Si) and extended gate geometry provide increased tunneling probability, improved gate control, high ION/IOFFratio, and ultra-high sensitivity, compared to IV-IV heterostructure biosensors. The sensitivities of the biosensors are analyzed for both neutral and charged biomolecules, with dielectric constants K=5,7,10,12. Effect of non-ideal issues on sensitivity, such as temperature fluctuation, steric hindrance are also studied for the biosensors mentioned above. Benchmarking is done to provide a quantitative comparison of the proposed biosensor with published literature. A maximum sensitivity of 1.3 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> , along with the ION/IOFFratio of 2 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> and SS of 25.4 mV/V is noticed in SC-DM-EG HTFET for the dielectric constant of K=12 in a completely filled cavity of neutral biomolecules.

Short-wave infrared (SWIR) photodetection by InAs/GaAs quantum dot heterostructures grown on Ge (100) substrate without Migration Enhanced Epitaxy layer

Integration of III-V based optoelectronic devices with Silicon (Si) technology is the prime choice of researchers for the futuristic Si-photonics. Profusion research is going on for direct growth of III-V heterostructures on the Germanium (Ge) substrate. Also, monolithic integration of III-V based device structures on Si using Ge layer and Migration Enhanced Epitaxy (MEE) technique have been endeavored. In this study, InAs based quantum dot infrared photodetectors (QDIPs) are grown on Ge substrate without MEE layers. The GaAs/AlAs superlattice buffer (SLB) layers are used to suppress the defects and dislocations. Two different QDIPs with GaAs capped and In 0.15 Ga 0.85 As/GaAs capped InAs QD are grown and characterized using photoluminescence (PL), high-resolution X-Ray Diffraction (HRXRD), and Raman spectroscopy (RS). Red-shifted and narrow PL spectrum of the InGaAs/GaAs capped QDIP with respect to the GaAs capped QDIP attributes to formation of larger dots and homogeneous size distribution. Low strain and high activation energy in the InGaAs capped QDs signify better strain relaxation via the InGaAs strain reducing layer (SRL) and better carrier confinement. Interband-assisted near-infrared (NIR) photoresponse is obtained from both devices till room temperature. However, the InGaAs/GaAs capped QDIP shows shortwave infrared (SWIR) response, which promulgates the formation of QDs with better crystallinity due to the presence of InGaAs SRL. The room temperature (300 K) dark current density of the GaAs and InGaAs capped QDIP is 1.2 × 10 −1 A/cm 2 and 6.6 × 10 −3 A/cm 2 respectively with −2 V bias voltage. This work demonstrates the pathway to uncomplicated growth of high quality QDIP structures on Ge substrate. • A novel technique is used to grow defect free InAs QD structures on Ge substrate. • GaAs/AlAs SLB layers are used to suppress the defects and dislocations. • InAs QDs with GaAs and InGaAs/GaAs capping are investigated and compared. • Both structures show low dark current at room temperature. • Infrared photoresponse till room temperature is obtained for both QDIPs.

Design and analysis of high electron mobility transistor inspired: III-V electro-optic modulator topologies

III-V heterostructure based high electron mobility transistors (HEMTs) offer superior performance as compared to CMOS silicon transistors owing to the high mobility in the 2D electron gas (2DEG) channel at the heterostructure interface. Gallium nitride (GaN) based HEMTs are also suitable for high power and high temperature applications. GaN has a rich offering of material properties spanning domains of non-linear optics, piezoelectric micro-electro-mechanical systems, and monolithic microwave integrated circuits. In this paper, we propose HEMT inspired III-V electro-optic modulator topologies and study the light interaction with 2DEG in such structures. We analyze the electroabsorption and electrorefraction on account of the 2DEG interaction with light and present a design framework to selectively leverage the desired mechanism of modulation. Our analysis suggests that modulation index of electrorefractive modulation in a HEMT-like structure is comparable to silicon photonic modulators. By leveraging the higher electron mobility in these material platforms, the device concepts proposed here could potentially be used to design electro-optic modulators with extremely high modulation rates.

(Invited) New Strategies to Produce Light Emitters with Si-based Nanostructures

Silicon-Germanium strain engineering has been used for more than two decades in silicon based devices and has contributed to the scaling down of a transistor’s size and to significant improvements in device performance. However, while conventional silicon-germanium based electronics has experienced rapid and steady growth, thanks to this continuous miniaturization of transistors, this trend cannot continue indefinitely. Industry has already moved to alternate methods such as FinFET devices, in which a thin silicon channel is placed vertically, and the FD-SOI (FD-SGOI) design consisting of a thin film Si(SiGe) channel placed horizontally. For nodes scaled down below 28 nm, low power operation will be inherently hindered by both the imperfect interface, non-uniformity of ultra-thin films and quantum confinement effects, which increase the effective bandgap. In these devices, despite the intense research activity on the strained SiGe ultra-thin body, which accounts for a large portion of such microelectronic devices (below the 45 nm node), we still fail to properly understand the mechanisms that limit hole and electron mobilities in SGOI layers. In addition, one of the main challenges for Si based devices remains the fabrication of efficient group-IV photon sources / photon detectors compatible with the microelectronic industry, which would usefully replace the integration of III-V heterostructures on Si. The major bottleneck is that group-IV semiconductor elements have indirect bandgaps, but with possibilities of being transformed to direct bandgaps using strain engineering strategies.In this presentation, we will review the formation mechanism of Ge-rich layers on SOI by condensation at different temperatures. TEM cross-section and GPA analysis of the heterostructures will be presented. We will also report the physical and optical properties of these heterostructures. Special attention is devoted to the influence of the SiGe thickness reduction (up to few MLs), where quantum confinement is prominent in the optical properties of the layers. Raman and PL results will be presented to better explain such confinement behavior. We show that novel SGOI substrates could represent a key strategy for the fabrication of future photonic devices.

Realization of high-quality InGaAs/GaAs quantum dot growth on Ge substrate and improvement of optical property through ex-situ ion implantation

Epitaxial growth of III-V heterostructures on non-native substrates such as Silicon (Si) or Germanium (Ge) is one of the promising research topics for the last two decades. The interface between polar III-V semiconductors and non-polar substrates (Si or Ge) plays a crucial role in monolithic integration. However, there is an anticipation of epitaxial GaAs growth on Ge substrate because of the lower mismatch of lattice constants and thermal expansion coefficients between them. Therefore, the high-quality growth of III-V semiconductor heterostructures on Ge substrates would overcome the impediment to Si-photonics, where the monolithic integration of optoelectronic device structures can be done using a Ge graded layer on Si. Here, we have explored the epitaxial growth of multi-layer InGaAs/GaAs quantum dot heterostructures on Ge substrates and compared the optical and structural properties with the QDs grown on GaAs substrate. The optical properties of all samples are investigated with the help of photoluminescence (PL) and time-resolved photoluminescence (TRPL), whereas the morphology of the QDs is observed through cross-sectional transmission electron microscopy (XTEM) images. An enhancement in the optical characteristics (PL peak wavelength, activation energy, carrier lifetime) is found for the QDs grown on Ge substrate with the super-lattice buffer (SLB) layer. The minimization of defects and dislocations in the heterostructure is also realized for the structure with the SLB layer. Furthermore, a two-fold enhancement in PL intensity and 24 meV increment in activation energy is achieved through ex-situ H− ion-implantation, which approached the values obtained for the QD heterostructure grown on GaAs substrate.

Epitaxial lift-off of InGaAs solar cells from InP substrate using a strained AlAs/InAlAs superlattice as a novel sacrificial layer

In this work we present a new epitaxial lift-off (ELO) approach based on the use of a strained AlAs/InAlAs superlattice (SL) as sacrificial layer for InP related materials. Such an ELO process enables the fabrication and transfer of a thin active III-V heterostructure via its separation from its III-V parent substrate using selective chemical etching. The strategy is of particular interest for large area devices such as solar cells. The process studied here also allows the substrate reuse for a low-cost approach based on III-V-based device fabrication. In order to realize the ELO process on InP substrates, the main difficulty is the lack of lattice-matched materials offering the high chemical etching selectivity needed over both the substrate and the lattice-matched alloys of the active heterostructure. The present study therefore contributes effective strategy for overcoming the latter constraints. The AlAs/InAlAs SL was thus explored as a potential candidate as sacrificial layer for the InP lattice matched materials. The growth conditions of such SLs were investigated to produce low defect SLs compatible with the properties of an optimal sacrificial layer. The under-etching behavior of such SLs in a hydrofluoric acid-based solution was also studied in detail. The results show that advantageous under-etching rates, high enough for a full wafer detachment, combined with a low defect density, can be obtained with novel sacrificial layers based on such thin AlAs/InAlAs SL. Finally, the fabrication of solar cells via an active heterostructure grown over an optimized SL on a monolithic substrate and via a thin reported active heterostructure was performed. The solar cells perform well and demonstrate the suitability of such SLs as a sacrificial layer for InP related materials.