Hysteretic Comparator Research Articles

Design and Analysis of a Self-Oscillating Class D Audio Amplifier Employing a Hysteretic Comparator

A third-order self-oscillating class D audio amplifier that utilizes a hysteretic comparator is presented. The design is analyzed and its THD is theoretically determined by employing an equivalent model, that relates the approach to natural sampling pulse-width modulation. The architecture eliminates the requirement for a high-quality carrier generator. A low-cost hysteresis compensation technique is utilized to enhance distortion performance at high output power levels. An implementation is presented in a 0.7 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$\mu\hbox{m}$</tex></formula> CMOS process. It achieves a dynamic range (DR) of 116.5 dB, and a THD+N of 0.0012%, while delivering a power of 125 mW into an 8 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\Omega $</tex></formula> load at 1 kHz. The THD+N is under 0.006% up to 90% of the maximum output power. The amplifier can deliver 1.45 W into the load with a THD of 5% with a 5 V power supply. The efficiency is greater than 84% for output power larger than 1 W . The area of the amplifier is 6 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\hbox{mm}}^{2}$</tex> </formula> .

A High-Efficiency, Auto Mode-Hop, Variable-Voltage, Ripple Control Buck Converter

In this paper, a simple yet efficient auto mode-hop ripple control structure for buck converters with light load operation enhancement is proposed. The converter, which operates under a wide range of input and output voltages, makes use of a state-dependent hysteretic comparator. Depending on the output current, the converter automatically changes the operating mode. This improves the efficiency and reduces the output voltage ripple for a wide range of output currents for given input and output voltages. The sensitivity of the output voltage to the circuit elements is less than 14%, which is seven times lower than that for conventional converters. To assess the efficiency of the proposed converter, it is designed and implemented with commercially available components. The converter provides an output voltage in the range of 0.9V to 31V for load currents of up to 3A when the input voltage is in the range of 5V to 32V. Analytical design expressions which model the operation of the converter are also presented. This circuit can be implemented easily in a single chip with an external inductor and capacitor for both fixed and variable output voltage applications.

Embedded analogue nonvolatile memory with feedback-controlled programming circuit on-chip

An analogue nonvolatile memory is presented, which is not only CMOS-compatible but also capable of storing analogue currents with a resolution of more than eight bits. The programming process is controlled by a hysteretic comparator on-chip, which stops the injection current automatically by negative feedback, regardless of the programming nonlinearity and device mismatches. With the simple, on-chip programming circuit, the proposed analogue memory is capable of storing currents ranging from 1 to 18 μA accurately with negligible variations across different memory cells.

A Delay-Locked Loop Synchronization Scheme for High-Frequency Multiphase Hysteretic DC-DC Converters

This paper reports a delay-locked loop (DLL) based hysteretic controller for high-frequency multiphase dc-dc buck converters. The DLL control loop employs the switching frequency of a hysteretic comparator as reference to automatically synchronize the remaining phases and eliminate the need for external synchronization. A dedicated duty cycle control loop is used to enable current sharing and ripple cancellation. We demonstrate a four-phase high-frequency buck converter that operates at 25-70 MHz with fast hysteretic control and output conversion range of 17.5%-80%. The converter achieves an efficiency of 83% at 2 W and 80% at 3.3 W. The circuit has been implemented in standard 0.5 mum 5 V CMOS process.

A Polar Transmitter With CMOS Programmable Hysteretic-Controlled Hybrid Switching Supply Modulator for Multistandard Applications

This paper presents the realization of a linear polar transmitter supporting multistandard applications. The harmonic-tuned class-AB biased (class-AB/F) power amplifier (PA) with the novel envelope shaping method linearly amplifies the input signal with high efficiency. The hybrid switching supply modulator with programmable hysteretic comparator enables the multimode operation whatever the envelope signal characteristics such as the peak-to-average power ratio and the bandwidth are. The designed polar transmitter is fabricated with CMOS 0.13-mum technology and InGaP/GaAs 2-mum HBT process for the supply modulator and the PA, respectively. For the IEEE 802.16e m-WiMax signal, it shows a power-added efficiency (PAE), an average output power (Pout), and a gain of 34.3%, 23.9 dBm, and 27.9 dB, respectively. Without any predistortion techniques, it satisfies the overall spectrum emission mask specifications. The relative constellation error and the error vector magnitude for the m-WiMax signal are -30.5 dB and 2.98%, respectively. For a WCDMA signal, it presents a PAE, a Pout, and a gain of 46%, 29 dBm, and 27.8 dB, respectively. For the EDGE signal, it delivers a PAE of 45.3% at a Pout of 27.8 dBm with a gain of 29.4 dB. There is about a 7% improvement of the overall PAE for EDGE through the optimum multimode operation.

Carrier Distortion in Hysteretic Self-Oscillating Class-D Audio Power Amplifiers: Analysis and Optimization

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> An important distortion mechanism in hysteretic self-oscillating (SO) class-D (switch mode) power amplifiers-–carrier distortion-–is analyzed and an optimization method is proposed. This mechanism is an issue in any power amplifier application where a high degree of proportionality between input and output is required, such as in audio power amplifiers or xDSL drivers. From an average-mode point of view, carrier distortion is shown to be caused by nonlinear variation of the hysteretic comparator input average voltage with the output average voltage. This easily causes total harmonic distortion figures in excess of 0.1–0.2%, inadequate for high-quality audio applications. Carrier distortion is shown to be minimized when the feedback system is designed to provide a triangular carrier (sliding) signal at the input of a hysteretic comparator. The proposed optimization method is experimentally proven in an audio power amplifier leading to THD figures that are comparable to the state of the art. Experimental hardware is a hysteretic SO bandpass current-mode-controlled single-ended audio power amplifier capable of 45 W into <formula formulatype="inline"><tex Notation="TeX">$\hbox{8}\;\Omega$</tex></formula> or 80 W into <formula formulatype="inline"><tex Notation="TeX"> $\hbox{4}\;\Omega$</tex></formula> from a <formula formulatype="inline"><tex Notation="TeX">$\pm\hbox{34}$</tex></formula> V supply with less than 0.03% THD from 100 Hz to 6.7 kHz. Carrier distortion is shown to account for this limitation in THD performance. </para>

Simple Low-Cost Hysteretic Controller for Single-Phase Synchronous Buck Converters

This paper presents a simple low-cost control architecture for low-voltage hysteretic regulators supplying loads with low-to-medium current consumption. Only two sensed voltages, a passive filter network and a hysteretic comparator are required to implement the main control functions: the output voltage regulation and the adaptive voltage positioning. This paper also shows that other previously reported low-cost control solutions have an important design tradeoff between load transient response and efficiency. In the proposed controller, the closed-loop output impedance can be designed to be resistive and the switching frequency can be adjusted to be independent of the output impedance requirement so that the load transient response and the efficiency can be optimized separately. Experimental results validate the performance of the proposed controller (i.e., a load transient response with insignificant output voltage overshoot and selectable switching frequency independent of the output impedance requirement).

Integrated ramp generator with auto-set hysteretic comparator for PWM voltage regulators

The design of an integrated ramp generator with an auto-set hysteretic comparator is introduced. The proposed concept enables simple and low-power operation of the ramp generator for the PWM voltage regulators. Experimental results show that the ramp generator consumes low power and provides nearly constant oscillation frequency.

Synthetic-Ripple Modulator for Synchronous Buck Converter

Comprising a hysteretic comparator and a ripple synthesizer, the synthetic-ripple modulator (SRM) allows voltage-hysteretic modulation to be realized in low-voltage buck converters where the natural voltage ripple is too small for reliable hysteretic operation. Circuit implementation, steady-state operation, and design equations are described for an SRM controlling a buck dc-dc converter. The basics are verified experimentally by a buck converter switched at 420 kHz and delivering 10 A at 1.8 V.

CCII-Based Analog Integrated Circuit for Sliding-Mode Control of Switching Power Converters

The design and implementation of a CMOS analog integrated circuit that provides versatile sliding-mode control laws for high-frequency switching power converters is described. The controller circuit implements general-purpose linear-surface state control laws incorporating compensating dynamics. The analog controller integrated circuit considers current-mode circuit techniques, hence exhibiting good performance as far as operation speed, power consumption, suitability to poorly regulated power supplies and robustness in front of interferences are concerned. Compared to previous designs, the circuit allows the extension of switching frequency operating margin in more than one decade. The circuit allows modular connection, being composed of externally linearized transconductors based on current conveyors, current-mode amplifiers and filtering stages, and a transimpedance high-speed hysteretic comparator. Full-transistor-level post-layout simulations for a CMOS 0.8 μm technology and experimental results validate the high-speed functionality of the proposed sliding-mode controller ASIC implementation. The circuit may be used either as a standalone IC controller or as controller circuit that is technology-compatible with on-chip switching power converters and on-chip loads for future powered Systems on Chip.

A 4-D chaotic oscillator based on a differential hysteresis comparator

A design approach for higher orders of chaotic systems is proposed. The chaotic oscillator presented is hierarchically modeled and simulated at the system, building-block, and circuit levels. The approach shows that the finite response times of hysteresis elements can be used to increase the order of differential hysteresis comparators. The hysteretic comparator demonstrated is a differential hysteresis which provides two orders of freedom and three possible output values. Experimental results are given for a triple-scroll chaotic oscillator constructed using a RC-opamp design approach. Results from the experimental four-dimensional system are In good agreement to theoretical results.

Co-ordinated three-phase hysteretic-control scheme for active power filtering

The paper examines a three-phase hysteretic-control algorithm, applicable to a voltage-source inverter for real-time implementation of power systems active power filtering. Special features of the proposed scheme are: coordinated hysteretic controller operating on the radial and tangential components of the busbarvoltage error, and the use of a microcontroller to implement the co-ordinate frame transformation, setting the switching parameters required by the hysteretic comparators, and monitoring the inverter-synthesised switching frequency. Provision for real-time tailoring of the tangential hysteresis band has been made to supplement the co-ordination scheme. The proposed algorithm is experimentally verified on a low-power prototype circuit. The experimental results have shown that the hysteretic controller can approach to the generation of a fully optimised and uniform three-phase switching pattern with a corresponding reduction in residual harmonic distortion. The results also showed the desired regularity of the radial/tangential error trajectory with nearly constant average switching frequency. The supporting hardware and software have been designed such that the control algorithm is used for active power filtering in a potentially resonant system bus condition.