Hybrid Multilevel Inverter Research Articles

Compact symmetrical and asymmetrical multilevel inverter with reduced switches

The need for a multilevel inverter for medium voltage high power applications has attracted researchers and industrialists to focus on the design of hybrid multilevel inverter topology that uses a considerably lesser number of switches and sources. This paper proposes a symmetrical and asymmetrical multilevel inverter with reduced switches. The novelty of the proposed arrangement is lesser ON state switches and reduced total blocking voltages across switches. The optional series connection of the basic unit increases output voltage levels with high-quality output voltage. There are multiple algorithms proposed by varying the DC sources to generate different voltage levels using the same configuration. A suitable comparison is presented with conventional topologies and inverters of the same structure. The proposed topology is simulated and validated on hardware setup for both 7 levels, symmetrical and 15 levels, asymmetrical is performed using dSPACE 1104 controller. The impact of change in modulation index on the power and efficiency of the proposed 15-level inverter is validated under laboratory setup. The feasibility of this topology favors renewable energy integration applications.

A New Three-Phase to Five-Phase Transformer With Power Quality Improvement in Hybrid-Multilevel Inverter Based VCIMD

This paper proposes a new three-phase to five-phase transformer, with a 30-pulse AC–DC converter for power quality improvement in vector-controlled induction motor drive. Here, three isolated transformers (T1, T2, and T3) are used and each transformer is designed to convert three-phase AC-supply into five-phase AC supply, to achieve ten-pulse AC–DC conversion. A unique configuration and angle among these three transformers is designed in such a way that the resultant input current of this transformer shows 30 pulses in it. A hybrid multilevel inverter is proposed in this paper, which is cascading a three-level neutral point clamped inverter with a two-level voltage source inverter to drive an induction motor (IM). A modified level shifted carrier-based sinusoidal pulsewidth modulation and a 3rd harmonic injection techniques are utilized to modify the modulating signal, to enhance the fundamental magnitude, and to reduce the harmonics than traditional technique. The responses of proposed medium voltage induction motor drive (MVIMD) are evaluated by simulating in MATLAB-Simulink. The proposed MVIMD performance is then verified using a scaled down laboratory prototype under various operating conditions such as steady state, starting, load perturbation, speed control, field weakening, varying load conditions, and over a wide speed range of IM.

A Hybrid Multilevel Inverter Scheme for Nine-Phase PPMIM Drive by Using Three-Phase Five-Leg Inverters

In pole-phase modulation, the phase order is coming down by pole ratio times in high pole mode, which results in the higher magnitude of spatial harmonics as well as higher torque ripple. In this article, the available three identical voltage-fed windings per effective phase in three-phase 12-pole (3PH-12PO) mode are used to develop the simple multilevel inverter (MLI) configuration for minimizing torque ripple. The proposed MLI scheme is realized with three five-leg inverter modules. Each five-leg inverter module will generate three-level voltage across the phase, thereby resultant voltage seen by each phase winding is five-level voltage in 3PH-12PO mode. This multilevel voltage will improve the torque ripple profile of the motor drive. In addition, the proposed MLI scheme along with phase grouping will enrich the linear modulation range of the pole-phase-modulated induction motor (PPMIM) drive in nine-phase four-pole (9PH-4PO) mode. The switches used to generate a multilevel voltage in 3PH-12PO mode are effectively utilized for blocking the flow of circulating currents. As compared with other conventional nine-phase five-level inverters the proposed five-level inverter requires only 30 switches and it does not require extra clamping diodes/capacitors and extra bidirectional switches for isolating neutrals in 9PH-4PO operation. The validation of proposed MLI scheme is done on a 5-hp nine-phase IM with Ansys Maxwell as well as laboratory prototype for entire modulation range using V/f = constant control.

Analysis of a three phase capacitor voltage balanced hybrid multi-level inverter with a three phase RL-load

This paper outlined the basic concepts of two selected types of hybrid multi-level inverters that were capacitor voltage-source dependent. A natural capacitor voltage balancing involving hysteresis with redundant switching states was analyzed in this paper. Simulations using MATLAB 7.14 were carried out for an unbalanced and a well-balanced capacitor voltage supply under 0V, 100V and 200V pre-charged capacitor voltage conditions. A comparative analysis of the two types of hybrid multi-level inverters (Type A and Type B) with pertinent to %THD values of [35.77% and 23.79%] for Type A and [92.10% and 84.94%] for type B during fault occurrence were evaluated in this work. These harmonic values can lead to thermal run away and total malfunction of the semi-conductor switches. An experimental vali-dation of Type A hybrid multi-level inverter with a three level flying capacitor input stage and H-bridge output stage using a three phase RL-Load of 15Ω and 45mH was accomplished in the laboratory with results compared with the simulations for experimental verification. Â

Experimental verification of a hybrid multilevel inverter with voltage‐boosting ability

SummaryA new nine‐level natural‐balanced boost hybrid multilevel inverter (BH‐MLI) is proposed in this paper. Each phase of the proposed BH‐MLI is designed with only 11 semiconductor switches and two electrolytic capacitors. Here, the capacitor voltages are balanced by utilizing the series‐parallel and natural balancing techniques effectively. Furthermore, the proposed circuit eradicates the multiple DC sources by introducing a single DC link for single‐ and three‐phase applications. The proposed topology can be easily extendible to obtain higher level output voltage waveform due to its modular‐switched capacitor cells (SCCs). Besides, the higher voltage level generation does not pose high‐voltage stress on any of the topology components, as the blocking voltage of all devices within the source voltage magnitude. Further, a quantitative comparison is conducted among the state‐of‐art switched‐capacitor multilevel inverter (SC‐MLIs) to highlight the superiority of the proposed configuration. Finally, the performance of the proposed BH‐MLI is experimentally validated with phase disposition‐pulse width modulation (PD‐PWM) and round control method at different modulation indices, load conditions.

A New Hybrid Multilevel Inverter with Extended Number of Voltage Steps

This paper presents and studies an improved multilevel inverter topology to produce higher voltage levels with reduced switching devices at the inverter output. The suggested topology is based on SCSS multilevel inverter. In this topology, DC sources are divided into two groups, inner group and outer group. The function of the outer dc source group is to create the square waveforms that are close in nature to the required output waveforms. However, the inner group is used to increase the number of the DC voltage levels to produce an output voltage close to the desired wave. This task is accomplished by arithmetic operation (addition or subtraction) of the value of the inner DC source with the blocks created by the outer group, respectively. A hybrid modulation scheme has been utilized to substantially reduce harmonics distortion. The performance of the proposed topology is then compared with other conventional and concurrent structures of multilevel inverter as well as evaluated by simulation results.

A Multi-Cell 21-Level Hybrid Multilevel Inverter Synthesizes a Reduced Number of Components With Voltage Boosting Property

A multi-cell hybrid 21-Level multilevel inverter is proposed in this paper. The proposed topology includes two-unit; an H-bridge is cascaded with a modified K-type unit to generate an output voltage waveform with 21 levels based only on two unequal DC suppliers. The proposed topology’s advantage lies in the fine and clear output voltage waveforms with high output efficiency. Meanwhile, the high number of output voltage waveform levels generates a low level of distortion and reduces the level of an electromagnetic interface (EMI). Moreover, it reduces the voltage stress on the switching devices and gives it a long lifetime. Also, the reduction in the number of components has a noticeable role in saving size and cost. Regarding the capacitors charging, the proposed topology presents an online method for charging and balancing the capacitor’s voltage without any auxiliary circuits. The proposed topology can upgrade to a high number of output steps through the cascading connection. Undoubtedly this cascading will increase the power level to medium and high levels and reduce the harmonics content to a neglectable rate. The proposed system has been tested through the simulation results, and an experimental prototype based on the controller dSPACE (DS-1103) hardware unit used to support the simulation results.

Binary Hybrid Multilevel Inverter-Based Grid Integrated Solar Energy Conversion System With Damped SOGI Control

This paper presents a binary hybrid multilevel inverter (BHMLI) based grid-connected solar energy conversion system (SECS), controlled by damped second-order generalized integral (DSOGI). The BHMLI architect has a cascaded half-bridge array, which modifies the DC-link of the H-bridge of the voltage source inverter, and results in approximate reference waveform. It reduces the dV/dt of the H-bridge switches and improves output waveform quality. The DSOGI control damps the oscillations and overshoots and provides longer service period of low power switches at transient conditions. It is implemented in the multilevel inverter application for the first time in literature. The SECS is designed to inject active power to the grid, and also mitigates the harmonic and reactive power demands of the load. The cascading of n' half-bridges and one H-bridge generate (2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(nC1)</sup> - 1) output voltage levels. The maximum power extraction from solar photovoltaic (PV) array is achieved through incremental conductance (IC) algorithm based maximum point tracking (MPPT) operation of the DC-DC converter. An isolated single-input multiple-output single-ended primary inductance converter (SIMO-SEPIC) realizes it. SECS with 15-level BHMLI is analyzed with extensive simulation as well as with a hardware prototype. Moreover, the shunt active filter functionality of the system at various load conditions are verified and maintained the grid power quality within the IEEE-519 standard throughout the operation. The laboratory developed setup is tested for 5 kW, 400 V, three-phase system, and the experimental analysis at steady-state and dynamic variations of load-side and insolation variations validate the theoretical claims.

PV based high level hybrid multilevel inverter

This paper presents a PV based high level hybrid multilevel inverter. SEPIC converter is the technologically advanced converter derived from the buck-boost converter. The proposed scheme is used in the SEPIC-converter to eradicate the output ripples and well enhance the output voltage level. Cascaded H Bridge and Neutral point clamped (NPC) inverter topologies are combined to obtain 127 level of output voltage using reduced number of switches and DC sources. To increasing the voltage level, Total Harmonic Distortion (THD) can be reduced and hence reduction in size of the filter. Simulation work is done using MATLAB and then to verify the performance of suggested scheme.

Enhanced Boost Converter Fed Asymmetrical Cascaded -MLI for 3 Induction Motor

modern days more research works are going in the field of a non conventional source based power supply generation for interfacing low potential into high potential. Coupled inductor based Enhanced Boost Converter is proposed in this article. The passive clamp circuit is used to recycle the leakage energy and increase potential gain and less loss. Thus the proposed converter has maximum potential gain and efficiency due to coupled inductor and clamp circuit. This dc-dc converter output is given to hybrid multilevel inverter. The proposed Enhanced Boost Converter fed hybrid multilevel inverter is developed for interfacing low potential dc source into high potential AC.

PWM Technique for Single Phase Asymmetrical Hybrid Multilevel Inverter for Non-linear and Dynamic loads

A two level VSI has output voltage either equal to positive or negative source voltage. This inverter has more ripple. In order to reduce the ripple content more number of switches are needed to produce many number of stepped voltage waveform. This improves the quality of power. This switching losses depends on the frequency of operation so when a two level inverter is operated at high frequency, the switching losses are predominant. This limits the use of such inverters. Hence, being replaced by Multilevel inverters. They have attracted academician and industry personal for medium and high-power power control. Such attractive features are available in hybrid multilevel inverter. Hence, these are preferred. They provide multi-level operation by using hybrid sources. Moreover, the number of power electronics components needed are less than conventional CMI for same voltage level. Thus, such inverters have more efficiency. In the proposed techniques, an asymmetrical hybrid multilevel inverter has been simulated using MATLAB Simulink. The results obtained have been presented for three different types of load.

Diminution of Harmonics in a Cascaded Multilevel Inverter using Third Harmonics Injection PWM Technique

This paper is deals the Asymmetric cascaded three phase hybrid multilevel inverter for ac motor application. This proposed hybrid three phase inverter is used to diminishes the no of semiconductor device requirement and enhances the power distribution of each H-bridge cell. The Third Harmonics Injection (THIPWM) with sinusoidal pulse width modulation (SPWM) are used to regulate the output voltage of the inverter, further incorporate the Phase disposition (PD) and Alternative Phase Opposition disposition PWM (APOD) techniques. This control technique is applied to minimize the current harmonic and get the better recital of the system. The circuit is simulated using Mat-lab Simu-link. The circuit performance such as THD, line voltage and phase voltage are compared using two hybrid modulation techniques and verified with simulation results.

Novel Symmetric Modular Hybrid Multilevel Inverter With Reduced Number of Semiconductors and Low-Voltage Stress Across Switches

In this paper, by using a modular hybrid structure, a new topology for symmetric multilevel inverters (MLIs) with a small number of semiconductors and low voltage stress across switches is proposed. Despite many other topologies, this topology can inherently produce negative and zero levels without using the H-bridge. The voltage stress across a particular switch of the proposed MLI is inversely proportional to the switching frequency of that switch in a voltage period. The proposed structure is based on two types of modules, that is, the f-module and the e-module. The e-module uses a capacitive voltage divider to double the number of nonzero levels. The voltages of the capacitors are approximately balanced without complex control methods. The basic structure of the proposed topology is formed by connecting the f-module and the e-module in series with each other, and the cascaded topology is developed by cascading multiple f-modules with an e-module. To investigate the proposed topology and prove its practicability, simulation results obtained using MATLAB/Simulink, analysis of the capacitor voltages, and experimental results are presented. A comparative study is also performed to show the merit of the new MLI over other topologies.

Performance evaluation and comparison of diode clamped multilevel inverter and hybrid inverter based on PD and APOD modulation techniques

&lt;p&gt;The popularity of multilevel inverters have increasing over the years in various applications without use of a transformer and has many benefits. This work presents the performance and comparative analysis of single phase diode clamped multilevel inverter and a hybrid inverter with reduced number of components. As there are some drawbacks of diode clamped multilevel inverter such as requiring higher number of components, PWM control method is complex and capacitor voltage balancing problem, an implementation of hybrid inverter that requires fewer components and less carrier signals when compared to conventional multilevel inverters is discussed. The performance of single phase diode clamped multilevel inverter and hybrid multilevel inverter for seven, nine and eleven levels is performed using phase disposition, alternate phase opposition disposition sinusoidal pulse width modulation techniques. Both the multilevel inverter are implemented for the above mentioned multicarrier based Pulse Width Modulation methods for R and R-L loads. The total harmonic distortion is evaluated at various modulation indices. The analysis of the multilevel inverters is done by simulation in matlab / simulink environment.&lt;/p&gt;

Design and Implementation of a Hybrid Single T-Type Double H-Bridge Multilevel Inverter (STDH-MLI) Topology

Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology.

A New Hybrid Multilevel Inverter Topology with Reduced Switch Count and dc Voltage Sources

In this paper, a new single-phase hybrid multilevel inverter (MLI) is proposed. Compared to other existing MLI topologies, the proposed circuit is capable of producing a higher number of output voltage levels using fewer power switches and dc sources. The levels are synthesized by switching the dc voltage sources in series/parallel combinations. An auxiliary circuit is introduced to double the number of levels by creating an intermediate step in between two levels. In addition, a zero level is introduced to overcome the inherent absence of this level in the original circuit. To improve the total harmonic distortion, a hybrid modulation technique is utilized. The operation and performance of the circuit are analyzed and confirmed using MATLAB/Simulink simulation. To validate the workability of the proposed idea, a 300 W, a thirteen level MLI (including the zero level) is designed and constructed. The circuit is tested with a no-load, resistive load and resistive-inductive load. The experimental results match very closely with the simulation and mathematical analysis.

A Novel Mechanism for Harmonic Reduction in Single Source Isolated Buck-Boost Hybrid Multilevel Inverter

Traditional Hybrid Multilevel inverter produces (2n+1) levels at output voltage of inverter for n number of sources by a switching mechanism which requires 4n number of switches. However, one underlying problem of single phase multilevel inverter is that it requires isolated sources which render it inappropriate except where isolated energy sources are available. In this paper, firstly, a new technique is proposed for generating multiple isolated Buck-Boost DC sources of variable voltages from a single DC source. Secondly, a new switching algorithm is proposed by which number of output voltage levels can be increased by 80%, 157% and 833% while reducing number of switch count by 0%, 16.66% and 25% keeping voltage stress across the switches unhampered for two, three and four source inverter respectively compared to traditional multilevel inverter. As a result, conspicuous improvement is achieved in terms of harmonic distortion dropping it down to 4% and less than 1% for three and four source inverter respectively even without using output filters or sinusoidal PWM switching signals. A meticulous analysis of the circuit configuration and switching algorithm along with detailed performance analysis is provided throughout the paper.

PWM Strategy with Multiple Carriers for Hybrid Multilevel Inverters Adapted from PV-Based

This research makes a design recommendation for a multilayer solar inverter that uses the level shift pulse width modulation technology. Inverters that have numerous layers are able to take advantage of switching at many frequencies, with the fundamental frequency being the frequency with the lowest switching rate. In this particular instance, we make use of not one but two signals: one serves the function of a carrier signal, while the other serves the function of a reference signal. In multilayer level inverters (MLI), the triangle wave is used as a carrier signal, while the sinusoidal wave is employed as a reference signal for the method of pulse width modulation. In addition, the sinusoidal wave is used as a reference signal for the pulse height modulation technique. These two waves are combined to produce what is known as a multilayer level inverter (MLI). This study will conduct an in-depth investigation into how adjusting the level shift of the carrier signals affects hybrid PV-based MLIs and how to count harmonics in multilayer PV-based inverters. Both of these things increase voltage and significantly reduce losses. Both of these things are important for this study. Both of these subjects are going to be discussed at length in this investigation. In order to do an analysis of the voltage and current harmonics, a level shift method simulation is run on a multilayer cascaded hybrid PV-based inverter using Matlab/Simulink. This simulation is utilised to accomplish the task.

Solar powered hybrid multilevel inverter fed induction motor using fuzzy proportional integral speed controller

In this paper, speed control of solar powered single phase hybrid multilevel inverter fed induction motor using fuzzy proportional integral controller is proposed. The proposed control system has been developed using MATLAB/SIMULINK. Performance of the proposed controller is tested in reference speed conditions with step change. The parameter analyzed for the proposed controller is steady-state error and settling time. This is compared with the proportional integral controller. Proposed speed controller is tested with two speed region such as low speed region and high speed region. In low speed region, speed command is varied from 40, 60, and 80 rad/s with 0.6 s step time. In high speed region, speed command is varied from 100, 120, and 140 rad/s with 0.6 s step time. Corresponding, performance parameters are measured and analyzed for both regions with proposed controller and proportional integral controller. From the test results, fuzzy proportional integral speed controlled hybrid multilevel inverter fed induction motor outperforms than proportional integral controller. Finally, the results are verified experimentally.

Modified hybrid multilevel inverter with reduced number of switches for PV application with smart IoT system

Internet of things (IoT) wind farm foundation is constructed using small wind turbines with cordless communication. In this work, the bound unified power quality conditioner has been proposed to upgrade the power quality in wind energy frameworks. The cluster computing is built a various downwind distances (between the turbines) can be examined with small reorganizing effort. Far away gathered information for an offline assessment of wind turbine power design, each turbine within the farm is furnished with an IoT foundation. This venture proposes another sun-based power era framework, which is made out of a dc/dc control converter in addition to another multilevel inverter with reduced number of switches. The dc to dc control converter incorporates are dc to dc SEPIC step-up(boost) converters are to change over the yield voltage of the sun controlled cell display into three self-ruling voltage sources with various associations. This proposed nine-level inverter is planned using a capacitor decision design with a full-interface control converter, related to course. The capacitor assurance design changes over the three yield wellsprings of dc–dc voltage control converters are using four-level dc voltage, and the full-associate control converter also changes over the four-level unidirectional dc into a nine-level bidirectional ac voltage. The new daylight based power period method creates a sine wave yield current to arrange with the used power and is energized into the system. The striking components of the new nine-level inverter are using nine semiconductor switches be used, and simply a solitary semiconductor switches are traded the high repeat at whatever point. A module is made and attempted to affirm the execution the proposed sun arranged power time system.