Hot-wall Chemical Vapor Deposition Reactor Research Articles

Radial Variation of Measured Carrier Lifetimes in Epitaxial Layers Grown with Wafer Rotation

In this report we present homoepitaxial growth of 4H-SiC on the Si-face of nominally on-axis substrates with diameter up to 100 mm in a hot-wall chemical vapor deposition reactor. A comparatively low carrier lifetime has been observed in these layers. Also, local variations in carrier lifetime are different from standard off-cut epilayers. The properties of layers were studied with more focus on charge carrier lifetime and its correlation with starting growth conditions, in-homogeneous surface morphology and different growth mechanisms.

Influence of Growth Mechanism on Carrier Lifetime in On-Axis Homoepitaxial Layers of 4H-SiC

In this report we present homoepitaxial growth of 4H-SiC on Si-face, nominally on-axis substrates with diameters up to 76 mm in a hot-wall chemical vapor deposition reactor. A comparatively low carrier lifetime has been observed in these layers; local variations in carrier lifetime are different from standard epilayers on off-cut substrates. The properties of the layers were studied with focus on charge carrier lifetime and its correlation with starting growth conditions, inhomogeneities of surface morphology and different growth mechanisms.

A reliable method to grow vertically-aligned silicon nanowires by a novel ramp-cooling process

We have grown silicon nanowires (SiNWs) on Si (111) substrates by gold-catalyzed vapor–liquid–solid (VLS) process using tetrachlorosilane (SiCl4) in a hot-wall chemical vapor deposition reactor. Even under the optimized conditions including H2 annealing to reduce the surface native oxide, epitaxial SiNWs of 150–200nm in diameter often grew along all four 〈111〉 family directions with one direction vertical and three others inclined to the surface. Therefore, the growth of high degree ordered SiNW arrays along [111] only was attempted on Au-coated Si (111) by a ramp-cooling process utilizing the liquid phase epitaxy (LPE) mechanism. The Au-coated Si substrate was first annealed in H2 at 650°C to form Au–Si alloy nanoparticles, and then ramp-cooled at a controlled rate to precipitate epitaxial Si seeds on the substrate based on LPE mechanism. The substrate was further heated in SiCl4/H2 to 850°C for the VLS growths of SiNWs on the Si seeds. Thus, almost 100% vertically-aligned SiNWs along [111] only could be reproducibly grown on Si (111), without using a template or patterning the metal catalyst. The high-density vertically-aligned SiNWs have good potentials for solar cells and nano-devices.

A Novel Method to Grow Vertically Aligned Silicon Nanowires on Si (111) and Their Optical Absorption

In this study we grew silicon nanowires (SiNWs) on Si (111) substrate by gold‐catalyzed vapor liquid solid (VLS) process using tetrachlorosilane (SiCl4) in a hot‐wall chemical vapor deposition reactor. SiNWs with 150–200 nm diameters were found to grow along the orientations of all 〈111〉 family, including the vertical and the inclined, on Si (111). The effects of various process conditions, including SiCl4 concentration, SiCl4 feeding temperature, H2 annealing, and ramp cooling, on the crystal quality and growth orientation of SiNWs, were studied to optimize the growth conditions. Furthermore, a novel method was developed to reliably grow vertically aligned SiNWs on Si (111) utilizing the principle of liquid phase epitaxy (LPE). A ramp‐cooling process was employed to slowly precipitate the epitaxial Si seeds on Si (111) after H2 annealing at 650°C. Then, after heating in SiCl4/H2 up to 850°C to grow SiNWs, almost 100% vertically aligned SiNWs could be achieved reproducibly. The high degree of vertical alignment of SiNWs is effective in reducing surface reflection of solar light with the reflectance decreasing with increasing the SiNWs length. The vertically aligned SiNWs have good potentials for solar cells and nano devices.

High-quality AlN layers grown by hot-wall MOCVD at reduced temperatures

We report on a growth of AlN at reduced temperatures of 1100 °C and 1200 °C in a horizontal-tube hot-wall metalorganic chemical vapor deposition reactor configured for operation at temperatures of up to 1500–1600 °C and using a joint delivery of precursors. We present a simple route—as viewed in the context of the elaborate multilayer growth approaches with pulsed ammonia supply—for the AlN growth process on SiC substrates at the reduced temperature of 1200 °C. The established growth conditions in conjunction with the particular in-situ intervening SiC substrate treatment are considered pertinent to the accomplishment of crystalline, relatively thin, ∼700 nm, single AlN layers of high-quality. The feedback is obtained from surface morphology, cathodoluminescence and secondary ion mass spectrometry characterization.

(Invited) High Quality 3C-SiC for MOS Applications

In this work, the growth of high quality 3C-SiC films on Si substrates grown by a hot-wall chemical vapor deposition (CVD) reactor is presented. An increased crystal quality means a reduced crystallographic defect density affecting 3C-SiC films which can be achieved by reducing the growth rate during 3C-SiC heteroepitaxy. In particular, the micro-twin density was observed to decrease with decreasing growth rate allowing for the reduction of theboth the rocking curve and transverse optical Raman mode peak width. Si substrates, both of on- and off-axis orientation, are considered with improvement in crystal quality observed when off-axis substrates are used. Finally, stacking faults and microtwins at the SiC/SiO2 interface are seen to cause non-uniformity in the oxide layer due to the different oxidation rate observed.

Growth of 3C–SiC on 150-mm Si(100) substrates by alternating supply epitaxy at 1000 °C

To lower deposition temperature and reduce thermal mismatch induced stress, heteroepitaxial growth of single-crystalline 3C–SiC on 150 mm Si wafers was investigated at 1000 °C using alternating supply epitaxy. The growth was performed in a hot-wall low-pressure chemical vapor deposition reactor, with silane and acetylene being employed as precursors. To avoid contamination of Si substrate, the reactor was filled in with oxygen to grow silicon dioxide, and then this thin oxide layer was etched away by silane, followed by a carbonization step performed at 750 °C before the temperature was ramped up to 1000 °C to start the growth of SiC. Microstructure analyses demonstrated that single-crystalline 3C–SiC is epitaxially grown on Si substrate and the film quality is improved as thickness increases. The growth rate varied from 0.44 to 0.76 ± 0.02 nm/cycle by adjusting the supply volume of SiH 4 and C 2H 2. The thickness nonuniformity across wafer was controlled with ± 1%. For a prime grade 150 mm virgin Si(100) wafer, the bow increased from 2.1 to 3.1 μm after 960 nm SiC film was deposited. The SiC films are naturally n type conductivity as characterized by the hot-probe technique.

Barium Titanate Thin Film Growth by Low-pressure Metalorganic Chemical Vapor Deposition

Barium titanate (BaTiO3) thin films were prepared from β-diketonate complexes as raw materials (on silicon substrates and into short quartz tubes) in the horizontal tubular hot-wall chemical vapor deposition reactor. The growth conditions, growth rate, and types of films grown were investigated. At high temperature (973 K), BaTiO3 could be prepared at concentrations equal to each of the metalorganic complexes, and its growth rate could be explained by summing the simple oxide growth rates because the growth rate of BaTiO3 is controlled by the mass transfer rate of the precursor. However, at low temperature (773 K), BaTiO3 could grow at a concentration of the Ti source that was richer than that of the Ba source because the growth rate of BaTiO3 is controlled by the rate of the chemical reaction and the Ti source reacts slower than the Ba source.

Single Crystal and Polycrystalline 3C-SiC for MEMS Applications

Cantilever resonators have been fabricated from two types of materials, single crystal and polycrystalline 3C-SiC films. The films have been grown in a hot-wall chemical vapor deposition reactor on 100 mm diameter p-type boron-doped (100) Si wafer without rotation of the wafer. The crystal structure of the films have been accessed with X-ray diffraction. The cantilever devices have been fabricated using a one-step etch and release process; the beam length has been varied between 50 and 200 µm. Resonant frequencies in the range 110 KHz – 1.5 MHz and 50 – 750 KHz have been obtained for single crystal and polycrystalline SiC devices, respectively. Furthermore, the experimental resonance frequencies have been used to calculate the Young’s Modulus E for the two different types of SiC. The single crystal SiC, possessing a very high Young’s Modulus (446 GPa), should be an optimal material for RF-MEMS applications.

4H-SiC Bipolar Junction Transistors with Graded Base Doping Profile

This work reports 4H-SiC bipolar junction transistor (BJT) results based upon our first intentionally graded base BJT wafer with both base and emitter epi-layers continuously grown in the same reactor. The 4H-SiC BJTs were designed to improve the common emitter current gain through the built-in electrical fields originating from the grading of the base doping. Continuously-grown epi-layers are also believed to be the key to increasing carrier lifetime and high current gains. The 4H-SiC BJT wafer was grown in an Aixtron/Epigress VP508, a horizontal hot-wall chemical vapor deposition reactor using standard silane/propane chemistry and nitrogen and aluminum dopants. High performance 4H-SiC BJTs based on this initial non-optimized graded base doping have been demonstrated, including a 4H-SiC BJT with a DC current gain of ~33, specific on-resistance of 2.9 mcm2, and blocking voltage VCEO of over 1000 V.

Improved hot-wall MOCVD growth of highly uniform AlGaN/GaN/HEMT structures

The inherent advantages of the hot-wall metal organic chemical vapor deposition (MOCVD) reactor (low temperature gradients, less bowing of the wafer during growth, efficient precursor cracking) compared to a cold-wall reactor make it easier to obtain uniform growth. However, arcing may occur in the growth chamber during growth, which deteriorates the properties of the grown material. By inserting insulating pyrolytic BN (PBN) stripes in the growth chamber we have completely eliminated this problem. Using this novel approach we have grown highly uniform, advanced high electron mobility transistor (HEMT) structures on 4″ semi-insulating (SI) SiC substrates with gas-foil rotation of the substrate. The nonuniformities of sheet resistance and epilayer thickness are typically less than 3% over the wafer. The room temperature hall mobility of the 2DEG is well above 2000 cm 2/V s and the sheet resistance about 270 Ω/sqr.

Silicon carbide nanowires grown on 4H-SiC substrates by chemical vapor deposition

AbstractIn this work, SiC nanowires (NWs) were grown by chemical vapor deposition (CVD) on commercial 4H-SiC substrates. The growth was conducted in an inductively heated hot wall CVD reactor traditionally used for homoepitaxy of 4H-SiC, operating at 150 Torr with H2 as the carrier gas. The growth experiments utilized the precursor chemistry that previously enabled the so-called low-temperature homoepitaxial growth of SiC – SiCl4 as the silicon precursor and CH3Cl as the carbon precursor. Vapor-liquid-solid (VLS) growth mode was employed. Two metal catalysts Au and Ni were used for NW growth in a wide range of growth temperatures from below 10500C to above 13000C. It was established that high precursor flow rates favor the regular epitaxial growth (though disturbed by the presence of the islands of the metal catalyst) at temperatures above 12000C. Reduction of the precursor flow rates and the growth temperature caused formation of micro-needles and eventually NWs. NW diameters in the range from below 10 to 100 nm were observed using scanning electron microscopy. Only SiC phase with no presence of Si, even for the growth temperatures down to 10500C, was confirmed by X-ray diffraction.

Fabrication of beam resonators from hot-wall chemical vapour deposited SiC

Single crystal and polycrystalline 3C–SiC have been grown in a hot-wall chemical vapour deposition reactor on 100 mm diameter p-type boron-doped (1 0 0) Si wafer. The crystal structure of the films has been determined by X-ray diffraction. Moreover, cantilever resonators have been fabricated from the two grown 3C–SiC films using a one-step dry etch and release process. The designed beam length has been varied between 50 and 200 μm. Resonant frequencies in the range between 110 kHz–1.5 MHz and 50–750 kHz have been obtained for single crystal and polycrystalline SiC devices, respectively. Furthermore, the experimental resonance frequencies have been used to calculate Young’s Modulus E for both types of SiC. The single crystal SiC has shown a relatively high Young’s Modulus (446 GPa) and should be an optimal material for RF–MEMS applications.

In-situ surface preparation of nominally on-axis 4H-SiC substrates

A study of the in-situ surface preparation has been performed for both Si- and C-face 4H-SiC nominally on-axis samples. The surface was studied after etching under C-rich, Si-rich and under pure hydrogen ambient conditions at the same temperature, pressure and time interval using a hot-wall chemical vapor deposition reactor. The surfaces of all the samples were analyzed using optical microscopy with Normarski diffractional interference contrast and atomic force microscopy with tapping mode before and after in-situ etching. Polishing related damages were found to be removed under all etching conditions, also the surface step structure was uncovered and a few defect-selective etch pits were observed. For the Si-face sample, the best surface morphology was obtained after Si-rich etching conditions with more uniform and small macro-step height which resulted in the lowest surface roughness. For the C-face sample the surface morphology was comparable under all etching conditions and not much difference was found except for the etching rate. Si droplets were not observed under any etching conditions.

Real-Time In Situ Tracking of Gas-Phase Carbon-to-Silicon Ratio During Hot-Wall CVD Growth of SiC

The carbon-to-silicon ratio influences the background doping level of silicon carbide grown by hot-wall chemical vapor deposition (HWCVD). A quadrupole mass spectrometer was used to measure the process composition in the exhaust stream of a HWCVD reactor. The 26 amu mass-to-charge acetylene peak showed the strongest dynamic response to intentional changes in the precursor partial pressure at growth temperature. Methane peaks showed a similar but weaker dynamic response. The acetylene peaks have a direct linear correlation to variations in the propane and silane precursors, and thus can be tracked to give real-time in situ measurement of changes in the C/Si ratio.

Etching of 4° and 8° 4H-SiC Using Various Hydrogen-Propane Mixtures in a Commercial Hot-Wall CVD Reactor

Hydrogen etching of 4H-SiC has been performed in a hot-wall chemical vapor deposition reactor to reduce surface damage and to create a bilayer-stepped surface morphology, optimal for initiation of growth on 4H-SiC substrates offcut 4° and 8° towards the <11-20> direction. To understand how step bunching evolves during the ramp to growth temperature, samples were etched ending at temperatures from 1400 to 1580°C under 0, 2 or 10 sccm of propane (C3H8) addition to hydrogen. Initial exploratory growth of 5 μm thick epilayers on the 4° etched surfaces are also discussed. Atomic force microscopy (AFM) and Nomarski microscopy were employed to investigate changes in the surface morphology. The 8° substrates subjected to H2-C3H8 etching up to growth temperature routinely exhibited bilayer steps. However, when the 4° substrates were etched with a 10 sccm C3H8 flow, considerable step bunching was observed. At 1450°C, with a 10 sccm of C3H8 flow (partial pressure is 1.25x10-5 bar), step bunching started with the formation of ribbon-like steps. Progression to higher temperature etches have shown the coalescence of the ribbons into larger macro-steps up to 30 nm in height. Etching 4° substrates under 2 sccm of C3H8 (partial pressure is 2.5x10-6 bar) or in pure H2 up to 1500°C results in minimal step bunching.

In Situ Measurement of Nitrogen during Growth of 4H-SiC by CVD

Real-time analysis of downstream nitrogen process-gas flows during 4H-SiC growth is reported. A Hiden Analytical HPR-20 quadrupole mass-spectrometer (QMS) was used to measure the process gas composition in the gas-stream of a hot-wall chemical vapor deposition (CVD) reactor. Using the 28 amu peak, it was found that the nitrogen partial pressure measured by the mass spectrometer directly correlates to the expected partial pressure of nitrogen in the process cell based on input flows. Two staircase doping samples were grown to track doping variations. The nitrogen mass flow was varied and corresponded to doping levels ranging from 1x1015 cm-3 to 8x1018 cm-3. Electron and nitrogen concentrations in the epilayers were measured by capacitancevoltage (CV) profiling and secondary ion mass spectrometry (SIMS), respectively. These efforts show real-time QMS monitoring is effective during growth for determining relative changes in nitrogen concentration in the gas flow, and thus, the level of nitrogen incorporation into the growing layer.

Thin crystalline 3C-SiC layer growth through carbonization of differently oriented Si substrates

The growth of thin cubic silicon carbide (3C-SiC) buffer layers in an horizontal hot-wall chemical vapor deposition reactor, through the carbonization of differently oriented Si surfaces, is presented. A qualitative and quantitative study has been performed on statistical parameters related to voids due to the buffer layer growth on the different substrate orientations emphasizing shape, size, and density as a function of the substrate orientation. Variation in the void parameters can be attributed to the atomic packing density related to the substrate orientations, which were (100) Si, (111) Si, and (110) Si in this study. Scanning electron microscopy and transmission electron microscopy were performed to analyze the surface and the crystalline quality of the 3C-SiC films grown and, eventually, an empirical model for the carbonization of Si surfaces formulated. Large platens characterize the 3C-SiC films with shapes related to the orientations of the substrate. These platens derive from the two-dimensional growth of different SiC islands which enlarge during the process due to the continuous reaction between Si and C atoms. The interior part of platens was characterized by the presence of a pure crystalline material with the presence of small tilts affecting some grains in the 3C-SiC layer in order to relief the stress generated with the substrate.

Chemical vapor deposition of NiSi using Ni(PF 3) 4 and Si 3H 8

NiSi x films were deposited using chemical vapor deposition (CVD) with a Ni(PF 3) 4 and Si 3H 8/H 2 gas system. The step coverage quality of deposited NiSi x was investigated using a horizontal type of hot-wall low pressure CVD reactor, which maintained a constant temperature throughout the deposition area. The step coverage quality improved as a function of the position of the gas flow direction, where PF 3 gas from decomposition of Ni(PF 3) 4 increased. By injecting PF 3 gas into the Ni(PF 3) 4 and Si 3H 8/H 2 gas system, the step coverage quality markedly improved. This improvement in step coverage quality naturally occurred when PF 3 gas was present, indicating a strong relationship. The Si/Ni deposit ratio at 250 °C is larger than at 180 °C. It caused a decreasing relative deposition rate of Ni to Si. PF 3 molecules appear to be adsorbed on the surface of the deposited film and interfere with faster deposition of active Ni deposition species.

Surface morphology and structure of hydrogen etched 3C-SiC(001) on Si(001)

AbstractThe surface of 3C-SiC(001) single-crystal epilayers grown on Si(001) substrates is well known to be inhomogeneous and defective. Therefore, the control and understanding at the atomic scale of 3C-SiC surfaces is a key issue. We study the effect of hydrogen etching at different temperatures on the morphology of 3C-SiC(001) surfaces by using Nomarksi optical microscopy, atomic force microscopy (AFM) and scanning electron microscopy (SEM). As-grown 3C-SiC(001) samples have been hydrogen etched in a horizontal hot-wall chemical vapor deposition (CVD) reactor at atmospheric pressure for different times and temperatures. Flat, high-quality surfaces presenting defined atomic terraces were observed within the 3C-SiC grain boundaries after etching at 1200°C for 30 minutes. Higher etching temperatures resulted in surfaces with step bunching and enlarged surface defects. Samples etched under the best conditions have been studied using low-energy electron diffraction (LEED) and Auger electron spectroscopy (AES).