Hot Solder Dip Research Articles

Experimental and Modeling Study on Delamination Risks for Refinished Electronic Packages Under Hot Solder Dip Loads

For electronic packaging engineers in the high-reliability sectors, such as aerospace, defense, oil & gas, etc., the use of commercial off-the-shelf components offers significant advantages due to their high availability, fast delivery time, and low cost. However, these components pose significant reliability challenges due to the risks associated with tin whisker formation and uncertainty on the long-term reliability of lead-free solders. For addressing these risks, the hot solder dip process is used to refinish the package by replacing lead-free solder finishes with lead-based finishes to meet the stringent packaging and assembly requirements for these sectors, which are exempt from restriction of hazardous substances (RoHS) legislation. But the hot solder dip process is an extra process that exposes the package to an additional thermal load, which will result in thermomechanical stresses that need to be properly understood and controlled. For addressing this challenge, a multidisciplinary methodology combining thermomechanical models with “dip-to-destroy” experiments and scanning acoustic microscopy has been developed to identify the risk of package material delamination for a number of package designs. Results show that the developed models can predict delamination risks for a range of imposed thermal gradients. Electronic package designs with a direct heat path from dipped terminations to the internals of the package show a higher risk of overstress-induced delamination, and this failure is generally driven by the high-temperature excursion above the glass transition point of the molding compound. The novelty and significance of these findings is that the derived methodology can be used by electronic packaging designers to optimize the thermal parameters of the hot-solder-dip process so that subsequent refinished packages can meet the stringent high-reliability requirements for these sectors.

Similarity approach for reducing qualification tests of electronic components

Qualification analysis and reliability testing of electronic components represent a major activity in the process of development of electronic equipment. Electronics manufacturers have to adopt often costly test programmes to ensure qualification standards and reliability requirements are met. This paper details a novel similarity-based qualification approach for assessing expected reliability of electronic components, and in general electronic products, as an alternative to conventional physical testing. The originality of this work is in the proposed approach which introduces a new way of qualifying electronic components based on similarity with previously assessed and qualified components. This novel approach has the potential to transform in a major way the current operational practices in the industry, demanding at present substantial physical testing, by offering a complementary, “virtual qualification” route for addressing the cost and time challenges associated with qualification tests.A major achievement is the comprehensive and detailed demonstration of the proposed reliability qualification approach. Case studies on qualifying electronic components to the thermal loads induced by a particular post-manufacturing process widely adopted by high-reliability electronics sectors – the robotic hot solder dip (refinishing) process, and associated risks of thermo-mechanical damage are presented and discussed.

Modelling the impact of refinishing processes on COTS components for use in aerospace applications

Commercial off the shelf components (COTS) are being adopted by electronic equipment manufacturers for use in aerospace applications. To ensure that these components meet the quality and reliability standards, refinishing processes, such as hot solder dip and laser deballing/reballing, are used to replace component lead-free solder terminations with tin–lead solder. These processes provide a risk mitigation strategy against tin whiskers induced short circuit failures. Being an additional step to the subsequent PCB assembly process it is important that this additional process does not impose significant thermo-mechanical stress which can impact subsequent reliability. As part of a major study in collaboration with industry partners, process models have been developed to predict the thermo-mechanical behaviour of components when subjected to the refinishing process. This paper details the techniques used to provide model input data (e.g., process parameters and package geometric/materials data) as well as the development and application of these modelling techniques to the refinishing process.

Statistical analysis of the impact of refinishing process on leaded components

Refinishing process such as Hot Solder Dip (HSD) process can be used to prevent tin whisker growth in microelectronics components by replacing the lead-free finishes with conventional tin–lead coatings. In some applications, it is also used to ensure reliable solder joints by replacing contaminated finishes and lead-free alloys with tin–lead to result in a homogeneous solder joint with tin–lead paste. In this paper, the impact of a HSD refinishing process on leaded components was statistically studied by comparing the electrical test data of refinished samples with those not-refinished. The likely damage from the component refinishing was thought to be the degradation of package integrity through thermo-mechanical stressing. This might be detectable as a microscopic leakage current if moisture could be encouraged into any open areas. Ten types of leaded components were selected and samples for each type of the component were allocated into 2 lots, one for refinishing and one used as a control. 150 cycles −65/150°C thermal cycling followed by 500h 85%RH/85°C humidity test was applied to all the samples (both refinished and not-refinished) to amplify any incipient failure points and accelerate moisture ingress into the package. Electrical test was then carried out to measure any small changes in current under zero and reverse bias conditions. In the end, a data reduction process in conjunction with a statistical hypothesis test was used to analyze the electrical test data. The results showed that there was no significant difference between the measured currents of refinished and not-refinished post-aged samples. Therefore it was concluded that the refinishing process did not have a significant impact on the tested components. This conclusion was further strengthened by other experimental test results such as CSAM images.

Modelling methodology for thermal analysis of hot solder dip process

The shift of electronics industry towards the use of lead-free solders in components manufacturing brought also the challenge of addressing the problem of tin whiskers. Manufacturers of high reliability and safety critical equipment in sectors such as defence and aerospace rely increasingly on the use of commercial-of-the-shelf (COTS) electronic components for their products and systems. The use of COTS components with lead-free solder plated terminations comes with the risks for their long term reliability associated with tin whisker growth related failures. In the case of leaded type electronic components such as Quad Flat Package (QFP) and Small Outline Package (SOP), one of the promising solutions to this problem is to “re-finish” the package terminations by replacing the lead-free solder coatings on the leads with conventional tin–lead solder. This involves subjecting the electronic components to a post-manufacturing process known as Hot Solder Dip (HSD). One of the main concerns for adopting HSD (refinishing) as a strategy to the tin whisker problem is the potential risk for thermally induced damage in the components when subjected to this process.This paper details a thermal modelling driven approach to the characterisation of the impact of hot solder dipping on electronic components. Main focus is on the evaluation of the re-finishing process effects on parts’ temperature gradients and heating/cooling rates, and on the advantages of applying an efficient model based process optimisation. Transient thermal finite element analysis is used to evaluate the temperature distribution in Quad Flat Package (QFP) variants during a double-dip hot solder dipping process developed by Micross Components Ltd. Full detailed three-dimensional (3D) models of the components are developed using comprehensive characterisation of the respective package structures and materials based on X-ray, SEM-EDX, cross-sectional metallurgy and 3D CT scan. The thermal modelling approach is validated using thermocouple measurement data for one of the studied parts and by comparing with model temperature predictions. Model results have informed the process optimisation strategy, and through experimentation key process parameters are alerted to provide optimal thermal characteristics. The optimised process settings result in temperature ramp rates at die level within recommended manufacture’s limit. A demonstration and discussion on the influence of the package internal structure and design on the thermal response to HSD is also provided.

Challenges in Modification of Electronic Components

Due to the surge in commercial applications, the semiconductor industry is literally brushing off their low-volume customers, including the military and aerospace industry. Recent conversions of components to pure tin (Sn) and other Pb-free finishes and materials have dramatically increased the complexity for these specialized modification services. These increased complexities in hot solder dip (HSD) and ball grid array (BGA) reballing are discussed in this open forum article. The author addresses the driving forces and why it is necessary to modify some commercial-off-the-shelf (COTS) components. Then he presents two specific component level modifications with some details: HSD and BGA reballing. With each of the conversions, some of the complexities faced by service providers are presented. Some suggestions on navigating the quagmire of new package designs and material changes being thrust upon the military and aerospace community are also discussed. Finally, the author concludes with some suggestions on how the industry can deal with these complexities and move carefully forward