High Parallel Research Articles

Supraspinous ligament arc tangent guided freehand thoracic pedicle screw insertion technique: high parallelism between screws and upper endplate.

To propose a technique for placing pedicle screws in the thoracic spine using the Supraspinous ligament Arc Tangent (SLAT) as a guide to increase the safety and stability of screw placement. A retrospective analysis of postoperative anteroposterior and lateral x-ray images was performed for 118 patients with thoracic spine diseases who received conventional freehand technique from January 2016 to May 2020 and SLAT-guided technique since June 2020 to present. The diagnoses included thoracic spinal stenosis, deformity, fractures, infections, and tumors. The angle between the screw and the upper endplate was categorized as grade 1 (0°-5°), grade 2 (5°-10°), and grade 3 (>10°). Three surgeons with more than 10 years of experience in spinal surgery measured the angle between the screw and the upper endplate in the lateral view. Chi-square test was used for statistical analysis, and p < 0.05 was considered statistically significant. A total of 1315 pedicle screws were placed from T1 to T12 in all patients. In the conventional freehand technique group, 549 screws were grade 1, 35 screws were grade 2, and 23 screws were grade 3. In the SLAT-guided freehand technique group, 685 screws were grade 1, 15 screws were grade 2, and 8 screws were grade 3. The data of each group was p < 0.05 by Chi-squared test, which was statistically significant, indicating that the SLAT-guided freehand technique resulted in a higher rate of parallelism between the screws and the upper endplate. All patients underwent intraoperative neurophysiological monitoring, immediate postoperative neurological examination, postoperative x-ray examination, and assess the eventual recovery. The screws were safe and stable, and no complications related to pedicle screw placement were found. The SLAT-guided freehand technique for placing pedicle screws in the thoracic spine can achieve a higher rate of screw-upper endplate parallelism, making screw placement safer and more accurate. Our method provides a convenient and reliable technique for most spinal surgeons, allowing for increased accuracy and safety with less fluoroscopic guidance.

Policy Gradient-Based Core Placement Optimization for Multichip Many-Core Systems.

As many deep neural network models become deeper and more complex, processing devices with stronger computing performance and communication capability are required. Following this trend, the dependence on multichip many-core systems that have high parallelism and reasonable transmission costs is on the rise. In this work, in order to improve routing performance of the system, such as routing runtime and power consumption, we propose a reinforcement learning (RL)- based core placement optimization approach, considering application constraints, such as deadlock caused by multicast paths. We leverage the capability of deep RL from indirect supervision as a direct nonlinear optimizer, and the parameters of the policy network are updated by proximal policy optimization. We treat the routing topology as a network graph, so we utilize a graph convolutional network to embed the features into the policy network. One step size environment is designed, so all cores are placed simultaneously. To handle large dimensional action space, we use continuous values matching with the number of cores as the output of the policy network and discretize them again for obtaining the new placement. For multichip system mapping, we developed a community detection algorithm. We use several datasets of multilayer perceptron and convolutional neural networks to evaluate our agent. We compare the optimal results obtained by our agent with other baselines under different multicast conditions. Our approach achieves a significant reduction of routing runtime, communication cost, and average traffic load, along with deadlock-free performance for inner chip data transmission. The traffic of interchip routing is also significantly reduced after integrating the community detection algorithm to our agent.

CREAM: Computing in ReRAM-Assisted Energy- and Area-Efficient SRAM for Reliable Neural Network Acceleration

SRAM-based computing-in-memory (CIM) has been widely explored to accelerate neural networks (NNs). However, it is challenging to store all weights of many modern NNs due to limited on-chip SRAM capacity. This bottleneck induces a large amount of off-chip DRAM accesses and impedes the improvement of performance and energy efficiency. This paper proposes a new approach of computing in resistive random-access memory (ReRAM)-assisted energy-and area-efficient SRAM (CREAM) for accelerating large-scale NNs while eliminating the DRAM access. The NN weights are all stored in high-density on-chip ReRAMs and restored to the proposed non-volatile SRAM (nvSRAM) CIM cells with array-level parallelism. Furthermore, to deal with the influence of ReRAM and CMOS variations, a novel layer-wise and bit-wise weight-configuration search algorithm is proposed by leveraging different sensitivity of each layer in NN models. A data-aware weight-mapping method is also presented to efficiently map NN models to ReRAMs in CREAM for high computation parallelism. The experiment results show 10.3 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> weight storage density over the standard 6T SRAM array. Evaluations of ResNet-18 and VGG-9 on CIFAR-10/CIFAR-100 datasets show up to 3.47 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> and 1.70 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> energy efficiency over two baseline designs of SRAM-CIM and ReRAM-CIM, respectively, in addition to 15.6% higher accuracy than ReRAM-CIM under device variations.

FPGA-Based Machine Learning: Platforms, Applications, Design Considerations, Challenges, and Future Directions

Field-Programmable Gate Arrays (FPGAs) have emerged as a promising platform for accelerating machine learning tasks due to their high parallelism, low latency, and hardware customization ability. In this paper, the authors provide an overview of popular FPGA platforms for machine learning and compare the tradeoffs among FPGAs, GPUs, and CPUs for machine learning. The authors also present specific applications of machine learning based on FPGAs, including those in autonomous driving and healthcare. Additionally, the paper explores FPGA design considerations, such as architecture, resource utilization, and power consumption. Nonetheless, obstacles persist in the realm of FPGA-based machine learning that require attention. Identifying the ideal balance between adaptability and performance, considering factors such as space, energy usage, and latency, is still challenging. As the capabilities of FPGAs expand, there is a significant need for devices that have a smaller footprint, reduced power consumption, and minimized delays. The paper emphasizes the necessity of ongoing research in the field of FPGA-based machine learning to address these issues and continue enhancing the performance and effectiveness of machine learning systems.

Approaching pixel-level readout of SNSPD array by inductor-shaping pulse

Although many multiplexed arrays of a superconducting nanowire single-photon detector (SNSPD) have been reported, it is still a major challenge to develop pixel-level readout arrays with high efficiency, parallel detection, and fast processing for real-time imaging. Here, we report a SNSPD array with inductor-shaping pulses for approaching the pixel-level readout. Optimized inductors are introduced to shape the output pulses of each pixel, and the response pulses of all pixels are synthesized in a series-connected structure. Then, the on/off states of all pixels can be encoded to the widths, amplitudes, and areas of the output pulses by the single-channel readout. This proposal is verified by a 4-pixel SNSPD array and a 16-pixel SNSPD array. It shows that the array not only inherits the features of the single-pixel SNSPD, such as photosensitive area, filling factor, quantum efficiency, and dark count rate, but also implements parallel operation of all pixels, which is always confused in traditional multiplexed SNSPD arrays. At the same time, the single-channel readout simplifies the system, and the serial digital signal converted from the shaped pulse enabled an easy and fast readout process, paving the way for high performance and real-time imaging.

Modulus-based synchronous multisplitting iteration methods without auxiliary variable for solving vertical linear complementarity problems

In this work, by applying the synchronous multisplitting technique to the non-auxiliary variable modulus equation of the vertical linear complementarity problems, a new parallel method is constructed, which can generalize the existing modulus-based matrix splitting iteration method. The convergence conditions of the proposed method are discussed in the cases of more than two system matrices, and the existing results are improved. Numerical examples under OpenACC framework show that the proposed method can solve the large sparse vertical linear complementarity problems efficiently with high parallel efficiency.

A novel high efficiency Reactive Ion Figuring technique based on artificial microporous mask

Reactive Ion Figuring (RIF) is a promising technical solution for fabrication of meter-scale aperture optical substrates due to its high efficiency parallel processing and low surface damage feature. However, the existing RIF technique needs multiple cycles of photolithography and etching process which is time-consuming and expensive. An artificial microporous film was designed and fabricated as a mask to perform high efficient RIF process. The location of the artificial microporous is distributed gradually from high-density to the low-density state along the radius according to the law of power aberration, and then fluid simulation was carried out. A designed power aberration was superimposed on a 100 mm aperture quartz substrate in a single cycle of RIF process, proving that the artificial microporous mask is capable of tailoring etching rate distribution. The result shows that the power aberration difference between the designed figure and real fabricating one is around 6 nm, and the reasons behind this were analyzed and discussed. This work demonstrates feasibility of high efficiency RIF based on artificial microporous mask and laid the foundation for future arbitrary surface figuring processes.

Simplified Stability-Based Transition Transport Modeling for Unstructured Computational Fluid Dynamics

Inspired by the model framework, a new -based model was developed and implemented into an unstructured Reynolds-averaged Navier–Stokes (RANS) code. The new model applies a modified version of the -transport equation of the model. This new implementation applies an alternative local formulation for the pressure-gradient parameter that allows the local assessment of the transition criterion within the boundary layer and, thereby, simplifies the model and increases the accuracy of the transition onset location. The resulting prediction approach is robust, user-friendly, and suitable for unstructured RANS solvers with high parallelization. To attain a wide application range of the prediction method, while keeping the simplicity of the approach, a physical path-independent transition criterion was adopted, which was calibrated based on linear stability theory results. The approach was successfully validated against experimental data for various relevant test cases. In addition, results were also compared with results obtained with the model and, for some cases, with the method, which showed a strong similarity in the predictions of the method and the new model.

Amplitude‐Dependent Properties and Excitation Mechanisms of EMIC Waves in the Earth's Inner Magnetosphere

AbstractLarge‐amplitude (Bw &gt; 1 nT) electromagnetic ion cyclotron (EMIC) waves can cause the rapid loss of &gt;1 MeV electrons, greatly impacting radiation belt dynamics. With long‐term Van Allen Probe B observations from 2013 to 2018, we conducted a statistical survey to reveal the amplitude‐dependent EMIC wave properties and excitation mechanisms in the Earth's inner magnetosphere. Statistical results show that large‐amplitude EMIC waves prefer to occur in the afternoon‐dusk sector in the northern hemisphere and tend to be more left‐hand polarized with smaller wave normal angles. In addition, the high proton beta parallel conditions also favor the generation of larger‐amplitude EMIC waves. From the variations of EMIC wave occurrence rate as a function of SuperMAG electrojet (SME) index and solar wind dynamic pressure, we find that the small‐amplitude EMIC waves are generally triggered by high solar wind dynamic pressure, while large‐amplitude EMIC wave generation is both affected by substorm activity and solar wind dynamic pressure. The normalized magnetic field perturbations during EMIC wave appearance, which enable us to distinguish the relative roles of magnetospheric compression and substorm injection in the excitation of different‐amplitude EMIC waves, provide further evidence that as wave amplitude increases, substorm injection plays a more important role in EMIC wave excitation, and magnetospheric compression is also an indispensable trigger.

Direct recording of action potentials of cardiomyocytes through solution processed planar electrolyte-gated field-effect transistors

To achieve intracellular recording of action potentials by using simple devices that can be easily fabricated and processed is crucial in cardiology and neuroscience. Present tools and technology include invasive patch clamp technique, 3D nanostructures often combined with electro/opto poration methods and nanodevices such as nanowire field-effect transistors. However, these approaches mostly require complex manufacturing processes or are invasive. In this work, we report the spontaneous intracellular-like recording of cardiac cells using a cost-effective, planar Electrolyte-Gated Field-Effect Transistor (EGFET) based on solution-processed polymer-wrapped monochiral semiconducting single-walled carbon nanotubes (SWCNTs). By simply turning on the transistor, spontaneous recordings of intracellular-like action potentials of human induced pluripotent stem cells derived cardiomyocytes are enabled. In addition, we demonstrate that the same planar EGFET can also be employed as a platform for electroporation with significant device performance and cell viability. The simplicity of the device combined with the high signal to noise ratio opens up new opportunities for low-cost, reliable, and flexible biosensors and arrays for high quality parallel recording of cellular action potentials.

Adaptive-Modeling Multi-Agent Learning System for Video Behavioral Clustering Recognition

Multi-agent systems are suitable for handling complex problems due to their high parallelism and autonomous evolution ability. In this paper, we propose an adaptive clustering multi-agent learning system for intelligent applications with continuously changing requirements. Each agent model changes temporal sequences using the longest common subsequence (LCS) algorithm. Multiple agents collaborate in a multilayer decentralized approach to enhance learning adaptability and achieve self-supervised behavioral clustering. The system is constructed using a “memory-like” method and operates primarily on memory access and comparison, avoiding extensive matrix operations of artificial neural networks while achieving learning and prediction functions. We chose an unsupervised vehicle behavioral clustering scenario for feasibility validation in which the system’s cognitive objective is to cluster and recognize vehicle behaviors. In a low computational environment, the system can complete clustering functions and exhibit continuous learning capabilities when new behavioral changes occur. The proposed approach achieves an accuracy of 97.4% while processing at a speed 1–5 times faster than similar clustering algorithms. The verification results indicate that this system has excellent potential to enhance intelligent sensing front ends.

Universal magnetoresistance of a quasi-two-dimensional conductor in perpendicular electric and parallel magnetic fields

Some times ago, in the framework of the Boltzmann kinetic equation in the so-called [Formula: see text]-approximation, it was shown that perpendicular resistivity in quasi-two-dimensional (Q2D) conductors can be impurity independent in a broad range of high parallel magnetic fields [A. G. Lebed and N. N. Bagmet, Phys. Rev. B 55 (1997) R8654]. In this paper, we demonstrate that this result is much more general than the Boltzmann kinetic equation in the [Formula: see text]-approximation and is valid in a pure Q2D metal at low frequencies of the electric field. The above-mentioned statement open possibilities to test the above discussed phenomenon in a number of Q2D organic, high-Tc, and some other Q2D superconductors in their metallic phases and gives a method to extract some important information about their Q2D Fermi surfaces.

Designing gene manipulation schedules for high throughput parallel construction of objective strains.

Recent advances in biofoundries have enabled the construction of a large quantity of strains in parallel, accelerating the design-build-test-learn (DBTL) cycles for strain development. However, the construction of a large number of strains by iterative gene manipulation is still time-consuming and costly, posing a challenge for the development of commercial strains. Common gene manipulations among different objective strains open up the possibility of reducing cost and time for strain construction in biofoundries by optimizing genetic manipulation schedules. A method is introduced consisting of two complementary algorithms for designing optimal parent-children manipulation schedules for strain construction: greedy search of common ancestor strains (GSCAS) and minimizing total manipulations (MTM). By reusing common ancestor strains, the number of strains to be constructed can be effectively reduced, resulting in a tree-like structure of descendants instead of linear lineages for each strain. The GSCAS algorithm can quickly find common ancestor strains and clusters them together based on their genetic makeup, and the MTM algorithm subsequently minimize the genetic manipulations required, resulting in a further reduction in the total number of genetic manipulations. The effectiveness of our method is demonstrated through a case study of 94 target strains, where GSCAS reduces an average of 36% of the total gene manipulations, and MTM reduces an additional 10%. The performance of both algorithms is robust among case studies with different average occurrences of gene manipulations across objective strains. Our method potentially improves cost efficiency and accelerate the development of commercial strains significantly. The implementation of the methods can be freely accessed via https://gscas-mtm.biodesign.ac.cn/.

The Parallelism Tradeoff: Limitations of Log-Precision Transformers

AbstractDespite their omnipresence in modern NLP, characterizing the computational power of transformer neural nets remains an interesting open question. We prove that transformers whose arithmetic precision is logarithmic in the number of input tokens (and whose feedforward nets are computable using space linear in their input) can be simulated by constant-depth logspace-uniform threshold circuits. This provides insight on the power of transformers using known results in complexity theory. For example, if L≠P (i.e., not all poly-time problems can be solved using logarithmic space), then transformers cannot even accurately solve linear equalities or check membership in an arbitrary context-free grammar with empty productions. Our result intuitively emerges from the transformer architecture’s high parallelizability. We thus speculatively introduce the idea of a fundamental parallelism tradeoff: any model architecture as parallelizable as the transformer will obey limitations similar to it. Since parallelism is key to training models at massive scale, this suggests a potential inherent weakness of the scaling paradigm.

Achieving high performance and portable parallel GMRES algorithm for compressible flow simulations on unstructured grids

Achieving high performance and portable parallel GMRES algorithm for compressible flow simulations on unstructured grids

Transformer-based temporal sequence learners for arrhythmia classification.

An electrocardiogram (ECG) plays a crucial role in identifying and classifying cardiac arrhythmia. Traditional methods employ handcrafted features, and more recently, deep learning methods use convolution and recursive structures to classify heart signals. Considering the time sequence nature of the ECG signal, a transformer-based model with its high parallelism is proposed to classify ECG arrhythmia. The DistilBERT transformer model, pre-trained for natural language processing tasks, is used in the proposed work. The signals are denoised and then segmented around the R peak and oversampled to get a balanced dataset. The input embedding step is skipped, and only positional encoding is done. The final probabilities are obtained by adding a classification head to the transformer encoder output. The experiments on the MIT-BIH dataset show that the suggested model is excellent in classifying various arrhythmias. The model achieved 99.92% accuracy, 0.99 precision, sensitivity, and F1 score on the augmented dataset with a ROC-AUC score of 0.999.

GPU Based High Definition Parallel Video Codec Optimization in Mobile Device

The main challenges when using video codec technology on mobile devices are: 1) the explosive growth of multimedia applications renders the computing resource allocation a problem of major importance; 2) high power consumption and limited battery power; 3) high cpu utilization causes the system to be unresponsive. In this paper, a GPU based High Definition Parallel Video Codec (GHPVC) is proposed, which is a low energy consumption and high efficient video codec on mobile devices. First, Frame Data Management model and Prediction Model Selector model are proposed in order to get higher data transmission efficiency and parallel execution efficiency. Second, a GPU based Parallel ME module is proposed because the ME module is the most compute-intensive part and most time consuming module in video codec. The GHPVC is proposed on the basis of conforming to the H.264 standard. Moreover and experimentally evaluated for different GPU devices on different mobile devices. Experimental results show that compared with the existing H.264 scheme, the proposed GHPVC not only has significant improvement in codec performance, but also effectively reduces energy consumption and CPU utilization.

Parallel Matrix Multiplication Using Voltage-Controlled Magnetic Anisotropy Domain Wall Logic

The domain wall-magnetic tunnel junction (DW-MTJ) is a versatile device that can simultaneously store data and perform computations. These three-terminal devices are promising for digital logic due to their nonvolatility, low-energy operation, and radiation hardness. Here, we augment the DW-MTJ logic gate with voltage controlled magnetic anisotropy (VCMA) to improve the reliability of logical concatenation in the presence of realistic process variations. VCMA creates potential wells that allow for reliable and repeatable localization of domain walls. The DW-MTJ logic gate supports different fanouts, allowing for multiple inputs and outputs for a single device without affecting area. We simulate a systolic array of DW-MTJ Multiply-Accumulate (MAC) with 4-bit and 8-bit precision, which uses the nonvolatility of DW-MTJ logic gates to enable fine-grained pipelining and high parallelism. The DW-MTJ systolic array provides comparable throughput and efficiency to state-of-the-art CMOS systolic arrays while being radiation-hard. These results improve the feasibility of using domain wall-based processors, especially for extreme-environment applications such as space.

Are SNNs Really More Energy-Efficient Than ANNs? an In-Depth Hardware-Aware Study

Spiking Neural Networks (SNNs) hold the promise of lower energy consumption in embedded hardware due to their spike-based computations compared to traditional Artificial Neural Networks (ANNs). The relative energy efficiency of this emerging technology compared to traditional digital hardware has not been fully explored. Many studies do not consider memory accesses, which account for an important fraction of the energy consumption, use naive ANN hardware implementations, or lack generality. In this paper, we compare the relative energy efficiency of classical digital implementations of ANNs with novel event-based SNN implementations based on variants of the Integrate and Fire (IF) model. We provide a theoretical upper bound on the relative energy efficiency of ANNs, by computing the maximum possible benefit from ANN data reuse and sparsity. We also use the Eyeriss ANN accelerator as a case study. We show that the simpler IF model is more energy-efficient than the Leaky IF and temporal continuous synapse models. Moreover, SNNs with the IF model can compete with efficient ANN implementations when there is a very high spike sparsity, i.e. between 0.15 and 1.38 spikes per synapse per inference, depending on the ANN implementation. Our analysis shows that hybrid ANN-SNN architectures, leveraging a SNN event-based approach in layers with high sparsity and ANN parallel processing for the others, are a promising new path for further energy savings.

Benchmarking Optimization Algorithms for Auto-Tuning GPU Kernels

Recent years have witnessed phenomenal growth in the application, and capabilities of Graphical Processing Units (GPUs) due to their high parallel computation power at relatively low cost. However, writing a computationally efficient GPU program (kernel) is challenging, and generally only certain specific kernel configurations lead to significant increases in performance. Auto-tuning is the process of automatically optimizing software for highly-efficient execution on a target hardware platform. Auto-tuning is particularly useful for GPU programming, as a single kernel requires re-tuning after code changes, for different input data, and for different architectures. However, the discrete, and non-convex nature of the search space creates a challenging optimization problem. In this work, we investigate which algorithm produces the fastest kernels if the time-budget for the tuning task is varied. We conduct a survey by performing experiments on 26 different kernel spaces, from 9 different GPUs, for 16 different evolutionary black-box optimization algorithms. We then analyze these results and introduce a novel metric based on the PageRank centrality concept as a tool for gaining insight into the difficulty of the optimization problem. We demonstrate that our metric correlates strongly with observed tuning performance.