High Power Consumption Research Articles

Lateral Carrier Diffusion in Ion-Implanted Ultra-Small Blue III-Nitride MicroLEDs.

Ultrasmall micro-light-emitting diodes (μLEDs), sized below 10 μm, are indispensable to create the next-generation augmented and virtual reality (AR/VR) devices. Their high brightness and low power consumption could not only enhance the user experience by providing vivid and lifelike visuals but also extend device longevity. However, a notable challenge emerges: a decrease in efficiency with a reduced size. This study casts light on this critical issue by investigating the lateral carrier diffusion in ion-implanted μLEDs. The implanted area restricts the carrier injection and defines the μLED size to diameters of 10, 5, and 2 μm without introduction of nonradiative recombination centers in the quantum well area. We observed a drop of efficiency for smaller devices, similar to the case of conventional μLEDs with etched sidewalls. Electroluminescence of μLEDs was studied using a Gaussian beam telescope to analyze light intensity profiles and hence the spatial carrier distribution within the active region of μLEDs. Lateral diffusion length was determined to be 11.2 μm at j = 1 A/cm2 and decreased down to 2.4 μm for j = 1000 A/cm2. We explain the underlying mechanism behind the size-dependent efficiency observed in μLEDs, attributed to lateral carrier diffusion.

Thermal Design and Experimental Validation of a Lightweight Microsatellite

The multiple working modes, complex working conditions, frequent changes in external heat flux, and high-power consumption of satellites all pose great difficulties to their thermal design. In this paper, the material MB15 magnesium alloy was used, which has not been performed for the main structure of satellites. This material not only reduces the weight of the structure and the launch cost, but also its good thermal conductivity is very helpful for the thermal control design of the satellite. This paper mainly describes the design of a thermal control system for lightweight microsatellites. Firstly, the satellite structure, thermal control indices of the main equipment, and the power consumption of the equipment in different working modes are introduced. Then, the external heat fluxes are analyzed, the position of the heat dissipation surface and extreme conditions are confirmed, and detailed thermal designs of each part of the satellite are determined via the combination of active and passive thermal control. Finally, the thermal balance test is carried out for the whole satellite. It is found that the deviation between the temperature of the thermistor and thermocouple at the same moment in the thermal analysis simulation data and thermal balance test is generally within 0.5 °C, and the maximum difference is not more than 1.7 °C, which indicates that the simulation model is well established and that the thermal analysis is reliable.

An innovative 3D-NAND design based on light-emitting cell for high reliability and low power consumption

The advancements in 3D-NAND technology have significantly increased the number of vertically stacked cells, which are controlled via word lines (WLs), enabling higher cell density and reducing costs. However, the increase in vertical cell layers has also introduced challenges such as higher power consumption and diminished current levels, both of which compromise the reliability of memory cells. At the same time, the demand for high cell reliability and low power consumption has been growing, driven by the expanding needs of storage applications in big data and cloud services. In this study, we propose an optically readable light-emitting memory (LEM) as a unit cell within 3D-NAND architecture. This innovative design exhibits both effective memory performance and light-emitting capabilities. Unlike conventional memory cells that require all WLs to be biased during read operation, the LEM requires only a read bias on the selected WL to detect the light intensity, which directly correlates with the stored data state. By applying voltage only to the selected WL, power consumption is reduced by approximately 45%. In addition, issues such as read disturbances and low cell currents that affect cell reliability are effectively mitigated, resulting in an expected improvement in the read window.

Simultaneous power, delay, and crosstalk noise reduction for the BUS encoding method of ternary LWC plus quaternary TS

ABSTRACT This paper deals with one of the potential applications of multiple-valued logic (MVL) for low-power data transmission by ternary limited-weight codes (LWCs) and quaternary transition signalling (TS). It aims for a reduction in power, delay, and crosstalk noise. Crosstalk effects cause serious problems such as long propagation delay and high power consumption for intermediate and global wires inside a chip. This paper conducts an analytical investigation into an optimal situation. In order to analyse the effects of crosstalk and delay, communication delay types are classified based on the quaternary TS. The classification is particularly given for quaternary TS to make the mathematical analysis possible. In addition, this paper considers the reduction of bus delay, dynamic power, and crosstalk noise at the same time. Our mathematical analyses reveal that a set of 16 5-digit ternary LWC codewords with the maximum weight of two is the optimal solution. The MVL bus encoding decreases the switching activity and the average voltage swing by 37.5% and 58.27%, respectively. Furthermore, the quaternary TS method can reduce the dynamic power by up to 89.12%compared to when binary-level signalling (LS) is used. Finally, the proposed model reduces the effects of crosstalk noise because it eliminates rail-to-rail transitions.

Toward Large-Scale Photonic Chips Using Low-Anisotropy Thin-Film Lithium-Tantalate.

Photonic manipulation of large-capacity data with the advantages of high speed and low power consumption is a promising solution for explosive growth demands in the era of post-Moore. A well-developed lithium-niobate-on-insulator (LNOI) platform has been widely explored for high-performance electro-optic (EO) modulators to bridge electrical and optical signals. However, the photonic waveguides on the x-cut LNOI platform suffer serious polarization-mode conversion/coupling issues because of strong birefringence, making it hard to realize large-scale integration. Here, low-birefringence photonic integrated circuits (PICs) based on lithium-tantalate-on-insulator (LTOI) are proposed and demonstrated, which enables high-performance passive photonic devices as well as EO modulators, showing great potential for large-scale photonic chips. Analysis of mode conversion and evolution behaviors with both low- and high-birefringence shows undesired mode hybridizations can be effectively suppressed. A simple and universal fabrication process is developed and various representative passive photonic devices are demonstrated with impressive performances. Finally, a wavelength-division-multiplexed optical transmitter is developed with a data rate of 1.6 Tbps by monolithically integrating 8 EO modulators and an 8-channel arrayed waveguide grating. Therefore, the demonstrated low-birefringence LTOI platform shows strong ability in both passively and actively controlling photon behaviors on a chip, indicating great potential for ultrafast processing and communicating large-capacity data.

Evaluating the Potential and Challenges of LPWAN Technologies like LoRa and Sigfox for Long-range Communication in IoT Systems

In this paper, we consider the performance of two Low Power Wide Area Network technologies, namely LoRa and Sigfox, placing special emphasis on the possibility of efficiently coping with massive numbers of devices in IoT settings with high densities. Finally, we apply MATLAB simulation for evaluating all mentioned performance figures: power consumption, data throughput, latency, and network congestion for various network loads. LoRa has advantages in terms of high data throughput and range but has the disadvantage of high power consumption and latency in a highly populated urban environment. Sigfox is beneficial for low-power, low-data-rate applications - providing long battery life but with strict data throughput and increased latency. LoRa has a much higher latency, which is the time taken for a packet to travel from the sender to the receiver, as it is prone to congestion and interference in dense IoT setups compared to Wi-Fi. Furthermore, the performance of both technologies shows different inefficiencies as the node density increases. We discuss the pros and cons of these technologies followed by the implementation guidelines for smart cities and industrial automation. The technology choice of LPWAN will depend upon the type of applications and requirements in terms of data size, latency, and power consumption.

Research on Opening Reignition Characteristics and Suppression Measures of 750 kV AC Filter Circuit Breakers

The operation of converter valves in converter stations often results in high reactive power consumption and harmonic generation, necessitating measures to maintain reactive power balance and ensure power quality. To achieve this, the filter bank circuit breaker is frequently switched on and off during daily operation. In recent years, multiple incidents of circuit breaker breakdown during the opening process have been reported. In this study, power systems computer-aided design (PSCAD)/electromagnetic transients including DC (EMTDC) V5.0 electromagnetic transient simulation software is used to simulate and calculate the overvoltage and inrush current under different configurations of circuit breaker operating mechanism dispersion, opening phase angle, and operating speed. Additionally, the suppression effects of two measures are compared: “phase selection opening” and “phase selection opening combined with controlled opening speed” to mitigate overvoltage and inrush current. The results demonstrate that for BP11/13 filters, HP24/36 filters, and HP3 filters, the combined strategy of “phase-selective opening with controlled opening speed” is more effective in suppressing inrush current and overvoltage. However, for SC filters, the suppression effect of this combined strategy is not significant. Considering economic and practical factors, it is more reasonable to adopt the phase-selective opening measure for SC filters. These findings provide guidance for ensuring the safe operation of AC filter circuit breakers.

IMPACT: In-Memory ComPuting Architecture based on Y-FlAsh Technology for Coalesced Tsetlin machine inference.

The increasing demand for processing large volumes of data for machine learning (ML) models has pushed data bandwidth requirements beyond the capability of traditional von Neumann architecture. In-memory computing (IMC) has recently emerged as a promising solution to address this gap by enabling distributed data storage and processing at the micro-architectural level, significantly reducing both latency and energy. In this article, we present In-Memory comPuting architecture based on Y-FlAsh technology for Coalesced Tsetlin machine inference (IMPACT), underpinned on a cutting-edge memory device, Y-Flash, fabricated on a 180 nm complementary metal oxide semiconductor (CMOS) process. Y-Flash devices have recently been demonstrated for digital and analogue memory applications; they offer high yield, non-volatility and low power consumption. IMPACT leverages the Y-Flash array to implement the inference of a novel ML algorithm: coalesced Tsetlin machine (CoTM) based on propositional logic. CoTM utilizes Tsetlin automata (TA) to create Boolean feature selections stochastically across parallel clauses. IMPACT is organized into two computational crossbars for storing the TA and weights. Through validation on the MNIST dataset, IMPACT achieved [Formula: see text] accuracy. IMPACT demonstrated improvements in energy efficiency, e.g. factors of 2.23 over CNN-based ReRAM, 2.46 over neuromorphic using NOR-Flash and 2.06 over DNN-based phase-change memory (PCM), suited for modern ML inference applications.This article is part of the theme issue 'Emerging technologies for future secure computing platforms'.

Optoelectronic stimuli-driven switchable memristors with multilevel resistance states for neuromorphic vision sensors

The developed optoelectronic synaptic devices with resistive switching enable efficient, fault-resistant image recognition. The PMMA/ZnO/2IF memristor array advances neuromorphic vision systems, offering high accuracy and low power consumption.

Real-Time Information Acquisition and Processing Method for Penetration Information Based on Multi-Information Fusion

To improve the real-time performance and the target adaptability of penetration fuze detonation control systems, and to enhance the system fusion processing capability for multi-sensor information, this paper uses a modular design concept to construct a miniaturized (ø38[Formula: see text]mm[Formula: see text]×[Formula: see text]4[Formula: see text]mm) fuze detonation control system that is capable of real-time processing of data from multiple information sources. The core component of this system is the GD32E230 microcontroller, which features a high dominant frequency and low power consumption. This device is integrated with a ferroelectric memory and signal processing circuits that match the sensors. To address the issue of unclear traditional acceleration signal penetration and the difficulties associated with the identification of these signals, the approach in this paper improves feature recognition accuracy through rapid acquisition and fusion of multiple types of sensor output signal, and self-adaptive identification of multilayered targets and single-layer thick targets is achieved. During the programming of the embedded system, the hardware register is operated directly, the instruction execution sequence is optimized, and the program execution efficiency is improved by using the function characteristic that some microcontroller unit peripherals do not occupy the central processing unit when working, thus allowing the intended purpose of improving the system’s real-time performance to be achieved. A semi-physical simulation method is then used to verify the performance of the penetration fuze detonation control system. The results obtained show that the system has 100%-layer counting accuracy for multilayered targets and a relative error of less than 1% for the calculated residual velocities of single-layer thick targets, thus validating the effectiveness of the system.

A Hybrid Structure Noise Shaping SAR ADC

Hybrid structure noise shaping (NS) SAR ADC combines both SAR ADC and sigma–delta ADC technologies with the advantages of high precision and low power consumption. In NS SAR ADC, mismatch error shaping (MES) method is used to solve the mismatch of low-level capacitors, and Data Weighted Averaging (DWA) method is used to solve the mismatch of high-level capacitors. The single-input comparator is improved into a dual-input comparator. The buffer and integrator circuits are realized by the static op-amp. The noise of op-amp is reduced by chopper technology and the accuracy of ADC is improved. A high-precision NS-SAR ADC with a sampling frequency of 1MSps and bandwidth of 25[Formula: see text]kHz was designed using the GSMC 90[Formula: see text]nm process. When the input signal is at full scale, the ENOB of the NS SAR ADC is higher than 14.73 bits, the SFDR is higher than 98[Formula: see text]dB, the average power consumption is 567.93[Formula: see text][Formula: see text]W and the quality factor is 169.2[Formula: see text]dB.

Stochastic Computing Architectures: Modeling, Optimization, and Applications

With the rapid development of artificial intelligence (AI), the design and implementation of very large-scale integrated circuits (VLSI) based on traditional binary computation are facing challenges of high complexity, computational power, and high power consumption. The development of Moore’s law has reached the limit of physical technology, and there is an urgent need to explore new computing architectures to make up for the shortcomings of traditional binary computing. To address the existing problems, Stochastic Computing (SC) is an unconventional stochastic sequence that converts binary numbers into a coded stream of digital pulses. It has a remarkable symmetry with binary computation. It uses logic gate circuits in the probabilistic domain to implement complex arithmetic operations at the expense of computational accuracy and time. It has low power and logic resource consumption and a small circuit area. This paper analyzes the basic concepts and development history of SC and neural networks (NNs), summarizes the development progress of SC with NN at home and abroad, and discusses the development trend of SC and the future challenges and prospects of NN. Through systematic summarization, this paper provides new learning ideas and research directions for developing AI chips.

Radiation-Hardened 16T SRAM Cell with Improved Read and Write Stability for Space Applications

The critical charge of sensitive nodes decreases as transistors scale down with the advancement of CMOS technology, making SRAM cells more susceptible to soft errors in the space industry. When a radiation particle strikes a sensitive node of a conventional 6T SRAM cell, a single event upset (SEU) can occur, flipping in the stored data in the cell. Additionally, charge sharing between transistors can cause single-event multi-node upsets (SEMNUs), where data in multiple nodes are flipped simultaneously due to a single particle strike. Therefore, this paper proposes a radiation-hardened high stability 16T (RHHS16T) cell for space applications. The characteristics of RHHS16T are evaluated and compared with previously proposed radiation-hardened SRAM cells such as QUCCE12T, WEQUATRO, RHBD10T, RHD12T, RSP14T, RHPD14T, and RHBD14T. Simulation results for RHHS16T indicated that the proposed cell demonstrates improved performance in read stability, write access time, and write stability compared to all comparison cells. These improvements in the proposed cell are achieved with higher power consumption and a minor area penalty. Notably, isolating the storage node from the bit line during read operations and the feedback loop between nodes during write operations enables the proposed RHHS16T to achieve enhanced read stability and write stability, respectively. The proposed integrated circuit was implemented using a 90 nm CMOS process and operates at a supply voltage of 1V. Furthermore, RHHS16T provides high immunity against SEUs and SEMNUs. Through its enhanced read and write stability, it ensures reliable data retention for space applications.

Tellurium/Bismuth Selenide van der Waals Heterojunction for Self-Driven, Broadband Photodetection and Polarization-Sensitive Application.

Broadband detection technology is crucial in the fields of astronomy and environmental surveying. Two dimensional (2D) materials have emerged as promising candidates for next-generation broadband photodetectors with the characteristics of high integration, multi-dimensional sensing, and low power consumption. Among these, 2D tellurium (Te) is particularly noteworthy due to its excellent mobility, tunable bandgap, and air stability. However, the performance of the Te-based photodetector has been hindered by high dark current and cut-off wavelength limitations associated with its intrinsic bandgap. Here, the Te / bismuth selenide (Bi2Se3) van der Waals (vdWs) p-n heterojunction with a clean interface and type-II band alignment, designed to address these challenges are presented. The Te/Bi2Se3 heterojunction photodetectors demonstrate an ultra-broadband photodetection range from Ultraviolet (UV)to Mid-infrared (MIR) (365 nm-4.3µm) and a high responsivity up to 880mA W-1 at 1550nm under zero bias. Moreover, benefiting from the anisotropy crystal structure of Te, the photodetector shows an obvious polarization-sensitive photoresponse and enormous potential in optical communication and polarization imaging. This work hereby provides significant insight into low-powered, high-performance, and broadband vdWs heterojunction photodetectors and their functional applications.

Study on Electrical and Temperature Characteristics of β-Ga2O3-Based Diodes Controlled by Varying Anode Work Function.

This study systematically investigates the effects of anode metals (Ti/Au and Ni/Au) with different work functions on the electrical and temperature characteristics of β-Ga2O3-based Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSDs) and P-N diodes (PNDs), utilizing Silvaco TCAD simulation software, device fabrication and comparative analysis. From the perspective of transport characteristics, it is observed that the SBD exhibits a lower turn-on voltage and a higher current density. Notably, the Von of the Ti/Au anode SBD is merely 0.2 V, which is the lowest recorded value in the existing literature. The Von and current trend of two types of PNDs are nearly consistent, confirming that the contact between Ti/Au or Ni/Au and NiOx is ohmic. A theoretical derivation reveals the basic principles of the different contact resistances and current variations. With the combination of SBD and PND, the Von, current density, and variation rate of the JBSD lie between those of the SBD and PND. In terms of temperature characteristics, all diodes can work well at 200 °C, with both current density and Von showing a decreasing trend as the temperature increases. Among them, the PND with a Ni/Au anode exhibits the best thermal stability, with reductions in Von and current density of 8.20% and 25.31%, respectively, while the SBD with a Ti/Au anode shows the poorest performance, with reductions of 98.56% and 30.73%. Finally, the reverse breakdown (BV) characteristics of all six devices are tested. The average BV values for the PND with Ti/Au and Ni/Au anodes reach 1575 V and 1550 V, respectively. Moreover, although the Von of the JBSD decreases to 0.24 V, its average BV is approximately 220 V. This work could provide valuable insights for the future application of β-Ga2O3-based diodes in high-power and low-power consumption systems.

GeTe/Sb2Te3 Super‐Lattices: Impact of Atomic Structure on the RESET Current of Phase‐Change Memory Devices

AbstractPhase change memories (PCMs) are at the heart of modern memory technology, offering multi‐level storage, fast read/write operations, and non‐volatility, bridging the gap between volatile DRAM and non‐volatile Flash. The reversible transition between amorphous and crystalline states of phase‐change materials such as GeTe or Ge2Sb2Te5 is at the basis of PCM devices. Despite their importance, PCM devices face challenges including high power consumption during the RESET operation. Current research efforts focus on improving device architecture and exploring alternative phase‐change materials such as GeTe/Sb2Te3 super‐lattices (SLs), for which a reduced programming power consumption is observed compared with standard PCMs. Herein, by combining X‐ray diffraction and scanning transmission electron microscopy imaging of SL thin films with the study of the same SL in PCM devices, it is shown that it is possible to significantly decrease RESET energy of the device, without modifying the SL composition, by reducing the amount of structural defects through annealing treatment. The best device properties are obtained after transforming the SL into a defect‐free, highly out‐of‐plane oriented rhombohedral phase. These results offer a promising avenue for further improving the performance of SL‐based PCM devices through structural optimization.

Fabric‐Based Stretchable and Breathable Backscattered Monitoring System

AbstractThe demand for wearable monitoring devices in contemporary medicine has significantly increased, especially in dynamic environments where traditional bulky equipment is impractical. Conventional flexible wearable devices or systems suffer from limited air and moisture permeability, lack of stretchability, and high power consumption, which restrict their long‐term usage and comfort. Herein, a stretchable and breathable backscattered monitoring system (SBBMS) is introduced, integrated with a fabric substrate. To address the challenges associated with fabric substrate system fabrication and encapsulation, a printing‐cutting‐transfer technology is proposed. This method enables the creation of unique, low‐cost, high‐precision, and robust circuit routing and electronic devices on fabric, maintaining high compatibility with commercial surface mounting technology while minimizing sacrifices in breathability. Additionally, a backscatter communication mechanism is designed and implemented to achieve wireless data transmission, which significantly reduces power consumption. Combined with energy management technology and hydrogel batteries, the SBBMS receives safe, multi‐source, and eco‐friendly energy support. Furthermore, through meticulous design, all modules—including the antenna, circuit, and battery—are made stretchable, providing the system with excellent strain‐resistive performance. The approach paves the way for the development of breathable, high‐performance, and highly integrated fabric‐based wearable systems, catering to specific user groups such as athletes, soldiers, and pilots.

Anti-Interference All-Optical Logic Computing Based on a 2D Polarization-Sensitive Photodiode.

Optical logic operation is promising for ultrafast information processing and optical computing due to the high computation speed and low power consumption. However, conventional optical logic devices require either a complex structure and circuit design or a constant voltage supply, which impedes the development of high-density integrated circuits. Here, all-optical logic devices are designed using a self-powered polarization-sensitive photodiode of the GeSe homojunction, which is attributed to an anisotropic band structure and built-in electric field. The single photodiode can realize linear logic functions (AND, OR, NAND) and a nonlinear logic gate (XOR) by programming wavelength, power density, and polarization angle. Moreover, complex logic functions (XNOR, Y = IN1, Y = IN2, Y = IN1, and Y = IN2) can be achieved through integrating two photodiodes in parallel. In addition, the neural network algorithm is utilized to validate the feasibility of all-optical logic computing and anti-interference. This work proposes an avenue to design an all-optical reconfigurable logic operation in polarization-sensitive devices.

The Effect of σ Phase Content on the Hot Working Properties of Super Austenitic Stainless Steel Containing 7Mo-0.42N

In the present study, super austenitic stainless steel containing 7Mo-0.42N was isothermally treated at 1100 °C, 1200 °C, and 1250 °C for different times, in order to obtain the samples with different σ precipitate content of 7%, 1.4%, and 0.7%. The effect of σ phase content on the hot working properties of the specimens was investigated under hot compression conditions at 900~1200 °C and strain rates of 0.01~5 s−1. Results show that, with the increase in σ content, the recrystallized grains increase gradually, and the internal stress decreases firstly and then increases. Therefore, the σ phase has two roles in the thermal deformation process. One is that the σ phase promotes recrystallization and the other is that the σ phase hinders dislocation motion. In the hot working diagram of super austenitic stainless steel with different σ phase contents, the distribution of high power consumption and instability regions is significantly different. The sample containing 1.4% σ phase does not show the region where the power dissipation coefficient η is negative, and there is a large number of dynamic recrystallized grains in the high power region, showing good hot working performance. However, the local rheology and cracking in samples containing 0.7% and 7% σ phase after deformation are more serious. Combined with the constitutive equation, hot working diagram, and microstructure, it is found that the optimum hot working property of the super austenitic stainless steel containing 7Mo-0.42N could be obtained when it is deformed at a temperature of 1200 °C with a strain rate of 5 s−1 when the content of σ phase is 1.4%.

Synergistic fusion of mechanotransduction and power supplying functions towards highly compact and fully self-powered smart wearables

Current smart wearables typically necessitate three key elements including sensing units, signal processing circuits, and power supplying units, leading to complex system configuration, large system volume, and high power consumption. Here, we bypass this canonical form by developing a new device modality with both mechanotransduction and power supplying (MPS) functions, which enables to facilely construct highly compact and fully self-powered smart wearables with much improved energy efficiency. The MPS devices are engineered by synergistic fusion of an all-solid-state power supplying unit with an associated passive mechanotransduction element, resulting in a monolithic, compact, and versatile device modality. More imporatantly, the mechanotransduction and power supplying functions can work independently from each other, allowing the MPS devices to continuously monitor external mechanical stimulations and, simultaneously, to provide stable power for external circuitry. As demonstrations, fully isolated, autonomous, and self-powered smart wearables with much reduced power consumption (≈48 % less than conventional systems) can be facilely constructed just by connecting an MPS device to a custom-designed circuit for wireless monitoring and on-site analysis of diverse human vital signals. This study provides a new design philosophy and methodology to create smart wearables with reduced system complexity, improved energy efficiency, and enhanced deployment convenience.