High Schottky Barrier Research Articles

Thermal reaction of Ti evaporated on GaAs

The thermal reaction of a vacuum-evaporated Ti film with substrate GaAs has been investigated using Auger electron spectroscopy and x-ray diffractometry. As accumulation and Ga depletion at the Ti/GaAs interface and Ga pileup in front of the As-rich layer have been observed. The As-rich and the Ga-rich layers have been found to be composed of TiAs/Ti5As3 and Ti2Ga3/Ti5Ga4, respectively. It has also been found that the rate of the Ti-GaAs reaction is governed by the interdiffusion process of Ti and As at the interface with an activation energy of 1.70±0.05 eV. The low diffusivity and relatively high Schottky barrier height of the present system facilitate the formation of useful Schottky barrier junctions.

X-band performance of high efficiency GaAs Schottky barrier IMPATT diodes

X-band performance of high efficiency GaAs Schottky barrier IMPATT diodes

Design and fabrication of high burnt-out Schottky barrier crystal video diodes

A design procedure for crystal video diodes which maximizes burn-out resistance and dynamic range for a given detection sensitivity is outlined. The design variables are the semiconductor, the metal, the substrate and epitaxial doping, the epitaxial thickness and the diode diameter. A key result is that, to first order, the diode sensitivity is independent of the metal. Diode design is only weakly dependent on the epitaxial doping but strongly dependent on the semiconductor, the diode are and the epitaxial thickness. The design and fabrication of a 10 W S-band diode is discussed. Flip mounting is required for efficient diode cooling, and a special 3-mesa tripod structure is employed for mechanical stability. The tangential sensitivity and burn-out power of these diodes is respectively −55 to −57 dbm and greater than 10 W.

Chromium Deposition from Dicumene‐Chromium to Form Metal‐Semiconductor Devices

Thin chromium films were deposited on silicon openings of oxidized silicon wafers by thermal decomposition of dicumene chromium (DCC) in an argon atmosphere at temperatures between 350°–520°C. The metal‐silicon interface thus obtained was characterized by current‐voltage and capacitance‐voltage measurements. The interface exhibited a rectifying effect and functioned as a Schottky barrier junction. A barrier height of with respect to Fermi energy was obtained. The switching speed of the Schottky barrier diodes was found to be less than 0.1 nsec. The electrical properties of the chromium films obtained under various conditions are discussed. This chemical deposition technique, where chromium containing a small amount of carbon can be deposited, gives high quality Schottky barrier diodes.

100-ns electronically variable semiconductor memory using two diodes per memory cell

A read-write memory cell consisting of a high-barrier Schottky diode with a diffused guard ring connected in series with a diffused PN junction diode will be presented. One layer metallization connects the pairs of diodes in an array which can be accessed in random.

Low-power bipolar transistor memory cells

Low- and high-barrier Schottky diodes have been combined with bipolar transistors to produce planar integrated-circuit low-area memory cells that hold at 75 /spl mu/W. Low-barrier diodes formed on p-type ion-implanted silicon (10/SUP 17/ cm/SUP -3/) are used as high-resistance collector loads. High-barrier diodes formed on n-type epitaxial silicon (10/SUP 16/ cm/SUP -3/) provide low-capacitance low-leakage coupling to digit lines in a memory array. The highly reproducible rhodium silicide on silicon Schottky diodes, as well as high-quality ohmic contacts, are formed in one sequence of sputtering and high-temperature operations. The process is fully compatible with beam-lead technology. It is estimated that a 512-word memory module using these cells would operate at a 60-ns READ or WRITE cycle time.