High-voltage Silicon Carbide Devices Research Articles

Aluminum channeling in 4H-SiC by high-energy implantation above 10 MeV

This study explores high-energy aluminum (Al) implantation above 10MeV as a fabrication process to facilitate the creation of deep doping regions in silicon carbide (SiC). Experimental investigations were conducted to evaluate the technical feasibility of ultra-high energy implantation and high-energy channeling implantation of aluminum into 4H-SiC. Ultra-high-energy Al implantations at 30 and 48MeV were performed, revealing limitations such as increased charge dispersion and decreased current near accelerator technical limits. In contrast, high-energy channeling implantations at 12, 15, and 20MeV demonstrated successful Al channeling implantations into 4H-SiC, emphasizing the importance of precision in crystal orientation and mounting systems. Results indicate that channeling implantations, with precise instrumentation, are a preferred approach over non-channeled ultra-high-energy methods for fabricating deep doping regions in SiC, holding promise for advancing the next generation of high-voltage SiC devices.

A Novel Voltage Balancing Control With dv/dt Reduction for 10-kV SiC MOSFET-Based Medium Voltage Modular Multilevel Converter

Using high voltage (HV) silicon carbide (SiC) power semiconductors in a modular multilevel converter (MMC) is promising because it results in fewer submodules and lower switching loss compared to conventional Si based solutions. The nearest level pulsewidth modulation (NL-PWM) is commonly used in the MMC for medium voltage applications. However, with the NL-PWM and existing voltage balancing control, there are many submodules that switch their modes in a control cycle, resulting in a high dv/dt during the deadtime of the power semiconductor, which could be multiple times of the dv/dt of the single device. This poses great challenges on the noise immunity and insulation design in the MMC using HV SiC devices, which have very fast switching speed. A novel voltage balancing control, which ensures only two submodules switch their modes in a control cycle, is proposed in this article, limiting the maximum dv/dt to the dv/dt of a single power semiconductor and also maintaining the voltage balance performance. The proposed voltage balancing control is experimentally validated in a 10-kV SiC mosfet based MMC with four submodules per arm.

MV Power Conversion Systems Enabled by High-Voltage SiC Devices [Happenings

Reports on medium voltage (MV0 power conversion systems that are enabled by high-voltage silicon carbide (SiC) devices. Thanks to recent strides in power electronics research and the availability of high-voltage SiC power semiconductor devices, we can contemplate building a smart “solid-state transformer” to handle the demands of the smart grid. In electrical distribution systems, the transformers convert thousands of volts MV into lower voltages that can be safely used in homes and businesses. With emerging technologies in building and fabricating MV SiC-based power semiconductor devices, MV power conversion on a large-scale scenario seems feasible. While companies, such as Wolfspeed (CREE), General Electric, Infineon Technologies, Mitsubishi, and ROHM, continue to develop and improve these MV semiconductor devices, we at the FREEDM Systems Center are aiming at the application side of things to ensure a market for these power devices.

Overview of high voltage sic power semiconductor devices: development and application

Research on high voltage (HV) silicon carbide (SiC) power semiconductor devices has attracted much attention in recent years. This paper overviews the development and status of HV SiC devices. Meanwhile, benefits of HV SiC devices are presented. The technologies and challenges for HV SiC device application in converter design are discussed. The state-of-the-art applications of HV SiC devices are also reviewed.

Comparative Evaluation of 15-kV SiC MOSFET and 15-kV SiC IGBT for Medium-Voltage Converter Under the Same <italic>dv/dt</italic> Conditions

The 15-kV silicon carbide (SiC) MOSFET and 15-kV SiC IGBT are the two state-of-the-art high-voltage SiC devices. These high-voltage SiC devices enable simple two-level converters for a medium-voltage (MV) voltage source converter (VSC) topology compared with the complex three-level neutral point clamped and other multilevel topologies, which, otherwise, is required to realize for MV VSC with silicon devices. This paper characterizes the 15-kV SiC MOSFET module at 10- and 12-kV dc bus for two different configurations of the device under test. This paper also presents endurance test (continuous switching-mode experimental demonstration) of 15-kV SiC MOSFET for 10-kV output voltage for both a bidirectional and unidirectional dc-dc boost converter. Furthermore, this paper presents: 1) the switching loss comparison of 15-kV SiC MOSFET with 15-kV SiC IGBT for the same dv/dt condition; 2) the switching frequency limits of 15-kV SiC MOSFET for a dc-dc boost converter with a phase leg configuration at 10-kV output voltage; and 3) comparative evaluation of 15-kV SiC MOSFET and 15-kV SiC IGBT in a unidirectional dc-dc boost converter for 10 V output voltage.

Optimum Number of Cascaded Cells for High-Power Medium-Voltage AC–DC Converters

For power electronic systems to interface medium-voltage grids, e.g., in future electric ships, usually cascaded cells converters need to be employed, whereby either few cells featuring power semiconductors with high blocking voltage capability or a larger number of cells using low-voltage (LV) semiconductors can be used. As shown in this paper, physics-inspired empirical models of the dependence of Insulated-Gate Bipolar Transistor (IGBT) power modules' loss-relevant characteristics on the blocking voltage enable an analytic optimization of the efficiency of a cascaded H-bridges (ac-dc) converter, which is complemented by a full efficiency versus power density ηρ-Pareto optimization. For a 10-kV grid, 1200V or 1700V are identified as optimum blocking voltages, resulting in a suitable trade-off between efficiency and power density. Significant efficiency and power density gains can be realized by replacing silicon IGBTs by LV silicon carbide (SiC) devices in multi-cell systems, whereas single-cell designs based on high-voltage SiC devices suffer from the high dv/dt and di/dt values required to limit switching losses. Reliability is analyzed considering redundancy, showing that the reliability of designs based on lower blocking voltages can be comparable with that of designs using higher blocking voltages, and hence fewer cells, if similar effort concerning additionally installed power capability is considered.

(Invited) Progress in Buried Grid Technology for Improvements in on-Resistance of High Voltage SiC Devices

Silicon Carbide (SiC) is regarded as the material of choice for high voltage (>1kV) power devices due to its material properties, mature fabrication technology, and availability of 150mm diameter wafer material. SiC power devices like Schottky barrier diodes (SBDs) and MOSFETs with voltage ratings of 1700V and current handling capabilities of 50A and more are commercially available from several vendors. Commercial SiC SBDs are based on the merged p-n junction and Schottky (MPS) concept or the junction barrier controlled Schottky (JBS) concept. Commercial MOSFETs utilize the VDMOS concept having a vertical device design with lateral channel and the UMOS concept with vertical channel at trench sidewalls. Common for these device concepts is that the electric field at device areas like Schottky contacts and MOS interfaces is relatively high and limits often the device performance. This leads to that the full potential of SiC devices cannot be realized. For example, in planar surface p-grid JBS diode structures the protection of the Schottky areas from high electric field is not sufficient and result in high leakage currents limiting the SOA in terms of junction and operation temperature. In addition, the edge termination is realized at the top surface of the SiC material and has to be carefully designed to not exceed the limitations of passivation and packaging materials. Buried grid technology is suggested to decrease the electric field at field sensitive device areas and to move areas of high electric field into the SiC bulk. It was demonstrated for SiC JBS diodes that buried grid technology gives more than three orders of magnitude lower leakage currents even at high temperature operation due to the superior shielding effect. The drawback is that the introduction of the buried grid increases the total resistance and therefore increases the forward voltage drop at rated current and the conduction losses. In this paper, we review our work on improving the on-state characteristics of buried grid SiC devices. The work is mainly done for buried grid JBS-diodes (BG-JBS), but can be applied also to buried grid MOSFETs (BG-MOSFET). For the BG-SiC devices, a p-grid is fabricated either by aluminum implantation followed by high temperature anneal or trench etching with subsequent epitaxial re-growth and planarization to fill up etched trenches with p-type material. As a final step, the p-grid is buried by another re-growth step of a thin n-layer. The epitaxial grid approach is done with Ascatron’s 3D-SiC core technology based on embedded epitaxial growth techniques, replacing high dose ion implantation at elevated temperatures and high temperature anneal by epitaxial growth in trenches. For cost-effective fabrication, this process should be performed in multi-wafer reactors. For devices with blocking capability of up to 1700V, we typically employ floating ring type edge termination formed simultaneously with the active area p-grid. For higher voltages than 1700V we suggest to use a JTE type edge termination formed by ion implantation in the same layer as the p-grid. Hence, the edge termination is also buried in the SiC bulk. By carefully designing the drift and re-growth layers as well as the epitaxial or implanted p-grid, the fabrication process can be optimized in terms of trade-off between current handling capability in forward and blocking behavior and leakage current in reverse. In addition, the size and spacing of the p-areas are critical parameters to optimize the BG-SiC device performance to realize maximum current handling capability at forward voltage similar or below surface grid devices and minimum leakage current especially for high temperature operation. To reduce the forward voltage, we employed relatively high n-doping in the channel regions between the p-islands and optimized the drift and re-grown top layer doping. Due to the superior material quality, epitaxial grown BG-structures result in increased bipolar injection at high current densities and thus give improved surge current capabilities. In addition, epitaxial p-n junctions show lower leakage currents than implanted ones.

A Gate Drive With Power Over Fiber-Based Isolated Power Supply and Comprehensive Protection Functions for 15-kV SiC MOSFET

This paper presents a 15kV silicon carbide (SiC) MOSFET gate drive, which features high common-mode (CM) noise immunity, small size, light weight, and robust yet flexible protection functions. To enhance the gate-drive power reliability, a power over fiberbased isolated power supply is designed to replace the traditional design based on isolation transformer. It delivers the gate-drive power by laser light via optical fiber over a long distance (>1 m), so a high isolation voltage (>20 kV) is achieved, and the circuit size and weight are reduced. More importantly, it eliminates the parasitic CM capacitance coupling the power stage and control stage, and thus eradicates the control signal distortion caused by high dv/dt in switching transients of the high-voltage SiC devices. In addition, the gate-drive circuit design integrates comprehensive protection functions, including the overcurrent protection, undervoltage/overvoltage lockout, active miller clamping, soft turn off, and fault report. The overcurrent protection responds within 400 ns. The experimental results from a 15kV double-pulse tester are presented to validate the design.

A Transformerless Intelligent Power Substation: A three-phase SST enabled by a 15-kV SiC IGBT

The solid-state transformer (SST) is a promising power electronics solution that provides voltage regulation, reactive power compensation, dc-sourced renewable integration, and communication capabilities, in addition to the traditional step-up/step-down functionality of a transformer. It is gaining widespread attention for medium-voltage (MV) grid interfacing to enable increases in renewable energy penetration, and, commercially, the SST is of interest for traction applications due to its light weight as a result of medium-frequency isolation. The recent advancements in silicon carbide (SiC) power semiconductor device technology are creating a new paradigm with the development of discrete power semiconductor devices in the range of 10-15 kV and even beyond-up to 22 kV, as recently reported. In contrast to silicon (Si) IGBTs, which are limited to 6.5-kV blocking, these high-voltage (HV) SiC devices are enabling much simpler converter topologies and increased efficiency and reliability, with dramatic reductions of the size and weight of the MV power-conversion systems.

Bevel Junction Termination Extension—A New Edge Termination Technique for 4H-SiC High-Voltage Devices

A new edge termination method, referred to as a bevel junction termination extension (Bevel-JTE), is presented for high-voltage silicon carbide devices. The 4H-SiC PiN rectifiers, with a breakdown voltage of 1600 V ( $\sim 95$ % of the theoretical value), were fabricated using Bevel-JTEs. The Bevel-JTE technique significantly reduces the chip size by decreasing space occupied by edge termination while providing broad process latitude for parameter variations, such as implantation dose and activation anneal condition.

High-Performance Smoothly Tapered Junction Termination Extensions for High-Voltage 4H-SiC Devices

A novel taper-doping anode termination method is introduced for high-voltage silicon carbide devices. The method employs a subresolution two-tone termination mask to achieve a gray-scale exposure and a smoothly tapered photoresist profile. Using the tapered profile as an implantation mask, self-aligned 6-kV SiC PiN diodes are demonstrated with 90% of the parallel-plate breakdown voltage. The avalanche breakdown for the design is controlled and reversible. This one-step technique allows wide design control over the width and shape of the termination profile and has wide device and material applicability.

Study of Polyimide Films as Passivation for High Temperature High Voltage Silicon Carbide Devices

Characterizations of Al/Polyimide/Al capacitors in a temperature range extended up to 400°C are presented. The aim is to determine the retained BPDA/PPD polyimide (PI) intrinsic dielectric and conduction properties, as a first stage in the evaluation of its ability to be applied as a passivation material for high temperature operating silicon carbide power devices. The dielectric constant, dielectric loss factor, and the static leakage current of the “as-prepared” Al/PI/Al structures are strongly affected above 175°C, reaching critical values at 400°C with regard to the aimed application. However, an evolution of these characteristics after the sample exposure at high temperature is observed, resulting in a very good and stabilized electrical behavior even at 400°C.

Estimation of Converters with SiC Devices for Distribution Networks

The objective of this paper is to indicate the advantages of Silicon Carbide (SiC) devices and to introduce the instruction which type of devices should be developed. For recent years, several-kV-class high voltage SiC devices have been manufactured, and it is expected that converters for medium voltage distribution networks can be realized using these devices. In this paper, some kinds of converters have been designed and compared with each other in respect of total losses and size. As a result, it has been confirmed that carrier frequency doubles and total loss reduces by half approximately when SiC devices replace Silicon devices, SiC-FET + SiC-SBD is better than SiC-IGBT + SiC-PND, and the series connection of more devices with lower design voltage is better in the case of SiC-FET.