High-voltage Driver Circuits Research Articles

DC-biased Suzuki stack circuit for Josephson-CMOS memory applications

Josephson-CMOS hybrid memory leverages the high speed and low power operation of single-flux quantum logic and the high integration densities of CMOS technology. One of the commonly used type of interface circuits in Josephson-CMOS memory is a Suzuki stack, which is a latching high-voltage driver circuit. Suzuki stack circuits are typically powered by an AC bias voltage that has several limitations such as synchronization and coupling effects. To address these issues, a novel DC-biased Suzuki stack circuit is proposed in this paper. As compared to a conventional AC-biased Suzuki stack circuit, the proposed DC-biased design can provide similar output voltage levels and parameter margins, approximately two times higher operating frequency, and three orders of magnitude lower heat load of bias cables.

Suzuki Stack Circuit With Differential Output

Suzuki stack circuits, a type of latching high-voltage driver circuit, are widely used in Josephson–CMOS hybrid memories. The existing Suzuki stack designs utilize only single-ended signaling when connected to a CMOS amplifier. In this article, a Suzuki stack circuit with a differential output is proposed by producing both the positive and negative output voltages. The negative output voltage is produced by using a negative biasing network and a negative single-flux quantum (SFQ) input pulse, which is generated by the proposed positive-to-negative SFQ converter. As compared to a conventional single-ended Suzuki stack circuit, the proposed differential design can provide two times higher output voltage swing and better immunity to noise without degrading the operating margins. Potential advantages and drawbacks of the proposed circuit are explored in this article.

SPAD-Based LiDAR With Real-Time Accuracy Calibration and Laser Power Regulation

This brief reports a light detection and range (LiDAR) imager which incorporates an image sensor based on a single-photon avalanche diode (SPAD) with the resolution of 32 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathbf {\times }$ </tex-math></inline-formula> 32, a VCSEL-based laser emission system with the same resolution as image sensor as well as the pixel spacing, and a field programmable logic gate array (FPGA) used to realize the calibration algorithm and control the working time of the LiDAR imager. A gating high-voltage driver circuit drives the image sensor to reduce background noise interference and realize real-time accuracy calibration for the time-to-digital converter (TDC) with the resolution of 200 ps. The common-cathode driver circuit with the narrow pulse, adaptive frequency and power regulation drives different channels of VCSEL based on the time-division multiplexing method to improve the signal-to-noise ratio and reduce power consumption of the LiDAR imager. The LiDAR imager based on the proposed circuit architecture and calibration algorithm can achieve depth imaging up to 10 m revealing a repeatability error of 10 cm at 10 frames/s.

A monolithic low-power-consumption driver circuit based on a Dickson charge pump for MEMS actuator applications

This paper introduces a monolithic high-voltage driver circuit for use in MEMS applications. The proposed design offers an output voltage which can linearly sweep from 0 V to 72.8 V under zero-load conditions. To minimize the power consumption of the driver circuit, an advanced charge recycling strategy and finger capacitor structure are implemented in the Dickson charge pump which acts as the high-voltage generator. At the maximum output voltage, the total power consumption of the driver circuit is only 2.337 mW.

Build a nixie-S style clock without the fuss

STANLEY KUBRICK'S 1968 SCIENCE FICTION FILM 2001: A Space Odyssey still stands up pretty well. But there's a telling anachronism in the scene where scientists visit a monolith that's been uncovered on the moon. On their lunar shuttle's control panel, there are numerical indicator lights clearly made with cold-cathode displays, also known as Nixie tubes. This technology was in vogue during the mid-1950s but fell out of favor in the 1970s. Nixie tubes still enjoy a following among enthusiasts of retro technology. I've sometimes been tempted to build a Nixie-tube clock, but the difficulties and expense always put me off. It's hard even to purchase Nixie tubes at this point—especially larger ones-and they require high-voltage driver circuits, which are inherently dangerous. So I was delighted when I stumbled on something designed to mimic the appearance of Nixie tubes without the complications-something its designer calls a Lixie display.

Special issue: selected papers from NORCHIP 2014 conference

32nd Norchip Conference was held at Tampere, Finland in October 2014. The Nordic Microelectronics event has been the annual meeting-place of Nordic IC and ASIC designers since 1983, when it was first held in Copenhagen. Already in early 1980s MPW runs were constantly arranged for Nordic research institutes and this helped to educate the designers needed for the 1990s telecommunication boom, for example. Since 1992 Springer (initially Kluwer) has published a special issue containing the best papers of the conference. Now Norchip conference is following the path of ESSCIRC: due to gradually reducing number of attendants, it will change to a combined conference with a bit broader scope. In 2015 the meeting will not be called Norchip anymore, but joined together with SoC conference, it will continue under a name of NORCAS (IEEE Nordic Circuits and Systems Conference). So NORCHIP is signing out, but warmly welcomes NORCAS to continue as a meeting forum of IC and ASIC designer. Interested readers are welcomed to read a short history of the conference at http:// www.norchip.org/NORCHIP_HISTORY.htm and submit their papers to NORCAS (http://www.norcas.org/). The strength of Norchip has always been that it has plenty of presentations showing fabricated and tested circuits. For this special issue I chose eight interesting papers that I’ll introduce now briefly. ‘‘Integrated Reconfigurable High-Voltage Transmitting Circuit for CMUTs’’ by Muntal et al. presents a highvoltage driver circuit for capacitive micromachined ultrasonic transducers (CMUT). Implementing a large array of transducers for a portable ultrasound scanner forced the designers to minimize the power needed in the level translating circuit and carefully choosing proper type of transistors for the partially high-voltage application. ‘‘A 4 9 128 SPAD array with a 78-ps 512-Channel TDC for time-gated pulsed Raman spectroscopy’’ by Nissinen et al. is another high-voltage application, where pn diodes are biased in avalanche breakdown region to implement very high-gain photo-receivers, where a single photon is sufficient for triggering a timing pulse in a complete long-range, low-power laser radar. ‘‘Integrated 16-Channel Neural Recording and Stimulation Circuit’’ by Kursu et al. shows the implementation of a system for real-time recording of neural signals that may eventually help us to understand what cockroaches really think about human beings or life in general. ‘‘A novel cascading scheme to improve the performance of voltage multiplier circuits’’ by Chouchan et al. is a timely implementation of an RF energy harvester circuit operating at 433 MHz. The active rectifying circuit was modified to give higher efficiency at high input powers. ‘‘A 28 GHz SiGe PLL for an 81–86 GHz E-band beam steering transmitter and an I/Q phase imbalance detection and compensation circuit’’ by Tired et al. describes a twochip PLL system and preliminary results for controlling the phase of a 80 GHz transmission. It is designed using 1.5 V, 200 GHz SiGe HBT process. ‘‘W-Band Phase Shifter in 28-nm CMOS’’ by Vahdati et al. is another paper related to electrical beam-steering applications. It presents a 4-step controllable, 39 mW, 1-V phase shifter for 80–100 GHz band. & Timo Rahkonen timor@ee.oulu.fi

Turning an SOI Into MEMS Devices for Optics and RF

This paper reports a use of SOI wafers in various MEMS (microelectromechanical systems) applications in micro optics and radio frequency devices. SOI wafer was originally developed for integrated circuits of improved performances in terms of suppressed current leakage and stray capacitance. At the same time, SOI has been used a lot in the field of MEMS due to the readiness of use as a mechanical material. Microstructures of high aspect ratio and small footprint have been made relatively easily by using the recent DRIE (deep reactive ion etching) processes compared with the anisotropic etching in a liquid phase. Despite the simple layer structure of SOI, various mechanical and electrical topologies were possible by using an electrical interconnection between the layers via a stiction bar. As an example of DRIE-processed SOI MEMS devices, we show a vertical-comb drive actuator with an initial offset angle for optical scanners, MEMS with integrated high-voltage driver circuits, micro XYZ-stages with electrostatic actuators, and all silicon passive RF device using integrated SPDT (single-pole double throw) switches.

Low cost bulk-silicon CDMOS technology and enhanced dv/dt high voltage driver circuit for PDP data driver IC

In this paper, a 256-channel data driver IC for plasma display panels (PDPs) is proposed. A new low cost 0.5μm bulk-silicon CDMOS (CMOS and DMOS) technology is developed, resulting in the improvement of input data frequency up to 120MHz and reduction of die cost about 20% compared with the conventional one. A novel high voltage driver circuit is also presented to optimize dv/dt of the output signal from 1.2 to 0.2V/ns. The proposed circuit can avoid unwanted turning on of the pLEDMOS transistors in output stage and cut down the power dissipation by 12% compared with the conventional one. The application results show rising and falling times of the output stage are 45 and 84ns, respectively.

0.25 μm 표준 CMOS 로직 공정을 이용한 Single Polysilicon EEPROM 셀 및 고전압소자

For low-cost embedded EEPROM, in this paper, single polysilicon EEPROM and n-channel high-voltage LDMOST device are developed in a <TEX>$0.25{\mu}m$</TEX> standard CMOS logic process. Using these devices developed, the EEPROM chip is fabricated. The fabricated EEPROM chip is composed of 1 Kbit single polysilicon EEPROM away and high voltage driver circuits. The program and erase characteristics of the fabricated EEPROM chip are evaluated using 'STA-EL421C'. The fabricated n-channel high-voltage LDMOST device operation voltage is over 10 V and threshold voltage window between program and erase states of the memory cell is about 2.0 V.