Abstract
This brief reports a light detection and range (LiDAR) imager which incorporates an image sensor based on a single-photon avalanche diode (SPAD) with the resolution of 32 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathbf {\times }$ </tex-math></inline-formula> 32, a VCSEL-based laser emission system with the same resolution as image sensor as well as the pixel spacing, and a field programmable logic gate array (FPGA) used to realize the calibration algorithm and control the working time of the LiDAR imager. A gating high-voltage driver circuit drives the image sensor to reduce background noise interference and realize real-time accuracy calibration for the time-to-digital converter (TDC) with the resolution of 200 ps. The common-cathode driver circuit with the narrow pulse, adaptive frequency and power regulation drives different channels of VCSEL based on the time-division multiplexing method to improve the signal-to-noise ratio and reduce power consumption of the LiDAR imager. The LiDAR imager based on the proposed circuit architecture and calibration algorithm can achieve depth imaging up to 10 m revealing a repeatability error of 10 cm at 10 frames/s.
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More From: IEEE Transactions on Circuits and Systems II: Express Briefs
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