High Thermal Boundary Conductance Research Articles

AlN: An Engineered Thermal Material for 3D Integrated Circuits

AbstractAluminum nitride (AlN) is a promising material for thermal management in 3D integrated circuits (ICs) due to its high thermal conductivity. However, achieving high thermal conductivity in AlN thin films grown at low temperatures on amorphous substrates poses significant challenges for back‐end‐of‐line (BEOL) compatibility. This study reports high cross‐plane thermal conductivities approaching 90 Wm−1K−1 for sub‐300 nm‐thick AlN films sputter‐deposited at low temperatures (<200 °C) on ordinary SiO2 substrates. The correlations between cross‐plane and in‐plane thermal conductivity, texture, grain size, oxygen content, Al:N atomic ratio, and thermal boundary conductance of these films are explored. These findings reveal the crucial role of grain orientation alignment in achieving high thermal conductivity and high thermal boundary conductance. A method is introduced to effectively monitor the thermal conductivity of the AlN thin films using X‐ray diffraction. This study offers valuable insights that can aid in the implementation of an effective thermal management material in the semiconductor production line.

Stability of Interface Morphology and Thermal Boundary Conductance of Direct Wafer Bonded GaN|Si Heterojunction Interfaces Annealed at Growth and Annealing Temperatures

The properties of thin (~2 um) GaN templates on a silicon support substrate were studied to assess the stability of the direct wafer bonded GaN / Si interface. EVG® ComBond® equipment was used for bonding under high vacuum (~10-8 mtorr) at room temperature to remove unwanted native surface oxides [1,2]. For the bonded samples, the [1010] GaN edge was aligned parallel to the Si [110] edge. An X-ray diffraction reciprocal space map of the (004) Si and (0004) GaN revealed that there is a ~0.2° tilt between the GaN and Si layers and is simply due to the relative miscut between the two wafers. The treatment of the surfaces prior to bonding produces an amorphous region at the bonded interface that has been seen in many other bonded systems [3-5]. In the as-bonded sample, high resolution scanning transmission electron microscopy revealed a ~2 nm amorphous region on the Si side of the bonded interface, as confirmed by energy dispersive x-ray spectroscopy (EDX). Subsequent annealing was performed in an effort to recrystallize the amorphous interface. Previous work has shown that recrystallization between Si|Si wafer bonded samples occurred when annealed at 450 °C for 12 hours [3]. However, in the GaN|Si system, we found that the amorphous interface did not recrystallize when annealed under those conditions. Annealing at temperatures up to 450 °C and 120 hours showed only initial stages of interdiffusion and a stable interface. However, after annealing at 700 °C for 24 hours, high resolution EDX revealed the formation of amorphous SiN as well as the diffusion of gallium into silicon.Preliminary thermal results show that the thermal boundary conductance (TBC) of the as bonded sample is ~140 MW/(m2K). The TBC results of wafer bonded GaN|Si reported here is higher than previously reported TBC values of epitaxially grown interfaces such as GaN on Si [6], GaN on SiC [7], and GaN on diamond [8]. The TBC for the annealed interface is degraded by a factor of two compared to the as-bonded interface for the sample that was annealed at 700 °C for 24 hours. These results demonstrate that high TBC can be achieved through wafer bonding of GaN with materials such as silicon and that such interfaces are stable even up to device operation up to 300 °C. However, chemically rough interfaces formed due to high temperature annealing are detrimental to thermal transport across these interfaces. V. Dragoi, et al., ECS Trans., 86(5), 23 (2018)C. Flötgen, et al., ECS Trans., 64(5), 103 (2014)M.E. Liao, et al., ECS Trans., 86(5), 55 (2018)Y. Xu, et al., Ceramics International, 45, 6552 (2019)F. Mu, et al., Appl. Surf. Sci., 416, 1007 (2017)L. Yates, et al., ASME InterPACK (2015)J. Cho, et al., Phys. Rev. B, 89, 115301 (2014)H. Sun, et al., APL, 106(11), 111906 (2015) Figure 1

A novel strategy for GaN-on-diamond device with a high thermal boundary conductance

To achieve high device performance and high reliability for the gallium nitride (GaN)-based high electron mobility transistors (HEMTs), efficient heat dissipation is important but remains challenging. Enormous efforts have been made to transfer a GaN device layer onto a diamond substrate with a high thermal conductivity by bonding. In this work, two GaN-diamond bonded composites are prepared via modified surface activated bonding (SAB) at room temperature with silicon interlayers of different thicknesses (15 nm and 22 nm). Before and after post annealing process at 800 °C, thermal boundary conductance (TBC) across the bonded interface including the interlayer and the stress of GaN layer are investigated by time-domain thermoreflectance and Raman spectroscopy, respectively. In the case of as-bonded samples, TBC of the 15 nm Si interlayer (32.4 MW/m2-K) was higher than that of the 22 nm (28.0 MW/m2-K); but after annealing, TBC of the 15 nm Si interlayer (71.3 MW/m2-K) became lower than that of the 22 nm (85.9 MW/m2-K), because the annealing is especially effective for thicker interlayer to improved interfacial TBC. The obtained stress was less than 230 MPa for both before and after the annealing, and this high thermal stability indicates that the room-temperature bonding can realize a GaN-on-diamond template suitable for further epitaxial growth or device process.

Perspective on thermal conductance across heterogeneously integrated interfaces for wide and ultrawide bandgap electronics

Heterogeneous integration is important to create multi-functionality in future electronic devices. However, few thermal studies of the interfaces formed in these integrated devices have been reported before. Recently, integrated interfaces by surface-activated bonding were found to have high thermal boundary conductance, which provides a solution for heat dissipation of GaN and β-Ga2O3-based power electronics. Here, we review the recent progress on the interfacial thermal transport across heterogeneously integrated interfaces, including transferred van der Waals force bonded interfaces, surface-activated bonded interfaces, plasma bonded interfaces, and hydrophilic bonded interfaces. This Perspective specifically focuses on applications of thermal management strategies of electronics, especially power electronics. Finally, the challenges, such as high-throughput thermal measurements of buried interfaces, thermal property-structure relations of interfaces bonded under different conditions, theoretical understanding of interfacial thermal transport, and device demonstrations, are pointed out.

Heteroepitaxial growth of β-Ga2O3 films on SiC via molecular beam epitaxy

β-Ga2O3 is a promising ultrawide bandgap semiconductor for next generation radio frequency electronics. However, its low thermal conductivity and inherent thermal resistance provide additional challenges in managing the thermal response of β-Ga2O3 electronics, limiting its power performance. In this paper, we report the heteroepitaxial growth of β-Ga2O3 films on high thermal conductivity 4H-SiC substrates by molecular beam epitaxy (MBE) at 650 °C. Optimized MBE growth conditions were first determined on sapphire substrates and then used to grow β-Ga2O3 on 4H-SiC. X-ray diffraction measurements showed single phase (2¯01) β-Ga2O3 on (0001) SiC substrates, which was also confirmed by TEM measurements. These thin films are electrically insulating with a (4¯02) peak rocking curve full-width-at-half-maximum of 694 arc sec and root mean square surface roughness of ∼2.5 nm. Broad emission bands observed in the luminescence spectra, acquired in the spectral region between near infrared and deep ultraviolet, have been attributed to donor-acceptor pair transitions possibly related to Ga vacancies and its complex with O vacancies. The thermal conductivity of an 81 nm thick Ga2O3 layer on 4H-SiC was determined to be 3.1 ± 0.5 W/m K, while the measured thermal boundary conductance (TBC) of the Ga2O3/SiC interface is 140 ± 60 MW/m2 K. This high TBC value enables the integration of thin β-Ga2O3 layers with high thermal conductivity substrates to meliorate thermal dissipation and improve device thermal management.

Thermal conductance across harmonic-matched epitaxial Al-sapphire heterointerfaces

A unified fundamental understanding of interfacial thermal transport is missing due to the complicated nature of interfaces. Because of the difficulty to grow high-quality interfaces and lack of materials characterization, the experimentally measured thermal boundary conductance (TBC) in the literature are usually not the same as the ideally modelled interfaces. This work provides a systematic study of TBC across the highest-quality (atomically sharp, harmonic-matched, and ultraclean) epitaxial (111) Al||(0001) sapphire interfaces to date. The comparison of measured high TBC with theoretical models shows that elastic phonon transport dominates the interfacial thermal transport and other mechanisms play negligible roles. This is confirmed by a nearly constant transmission coefficient by scaling the TBC with the Al heat capacity and sapphire heat capacity with phonon frequency lower than 10 THz. Finally, the findings in this work will impact applications such as electronics thermal management, thermoelectric energy conversion, and battery safety.

(Invited) Thermal Transport in 2D Materials from First Principles: The Role of Interface and Substrate

The persistent down-scaling of nanostructures, such as electronic devices, sensors, NEMS, and nanocomposites, increases the surface-to-volume ratio and introduces atomic-scale disorder at boundaries and interfaces. To avoid these issues, the nanoelectronics community has turned to intrinsically two-dimensional (2D) materials platforms. 2D materials have tremendous potential for next-generation nanoelectronics beyond the 5 nm technology node due to their atomic flatness and absence of dangling bonds, which prevents scattering from interface roughness. However, heat dissipation and its removal from hot spots in the monolayer remains a critical concern to the design of 2D-based devices [1]. Thermal currents flowing in an atomic layer can either dissipate through source/drain contacts in a transistor configuration, or through a supporting substrate via van der Waals (vdW) coupling to it. When a 2D material is supported by a substrate, the interfacial area formed between it and the substrate is often far larger than the lateral source/drain contact area. Thus, the majority of waste heat is removed across the 2D-substrate interface and then via the substrate.The thermal boundary conductance (TBC) between the 2D layer and substrate should be well characterized for reliable 2D device performance. Interfaces formed between 2D vdW materials and 3D substrates are fundamentally different than same-dimension 3D-3D and 2D-2D interfaces due to the presence of a vdW gap and the different dimensionalities of the phase spaces on either side of the interface. In this invited talk, I will review the progress in understanding lattice thermal transport, both in-plane and cross-plane, in 2D mono and few-layer materials from first principles. This work builds on vibrational properties of the 2D materials calculated from Density Functional Theory combined with Boltzmann transport equation for phonons. Then I will introduce our recent work aimed to tackle the question of selecting the best substrate for each 2D material from the point of view of heat dissipation and apply these results to 2D devices. Several recent papers measured the TBC between various monolayers and mostly the silicon dioxide (SiO2) substrate, reporting a wide range of values due to inconsistent sample quality. Therefore, it is imperative to build predictive methods for quantifying the TBC between MLs and various substrates. Here, we use a combination of phonon dispersions from first-principles density functional perturbation theory simulations and our 2D-3D TBC model [2, 3]. We investigate the TBC between combinations of six atomic layers (h-BN, graphene, MoS2, MoSe2, WS2, and WSe2) and six substrates (SiO2, AlN, GaN, 6H-SiC, diamond, and Al2O3). We show that TBC is higher for softer substrates with smaller speed of sound, but of the 6 substrates we compared, amorphous SiO2 consistently produced higher TBC than crystalline substrates. Our work helps build a roadmap for quantifying the TBC between various 2D monolayers and their substrates and provides a framework for other 2D-3D interfaces to be studied.Next, we employ our first-principles model to calculate the TBC of several beyond-graphene 2D materials, such as and blue and black phosphorene, on amorphous and crystalline substrates. A trend emerges that 2D materials with lower ZA branch frequencies have higher TBCs when placed on a-SiO2. Our results provide selection criteria for 2D materials that improve interfacial heat transport in 2D devices with amorphous and crystalline substrates.To further probe the role of interfacial phonon transport, we develop a coupled electro-thermal model for FL-WSe2 stacks where we simultaneously solve for the current and Joule heating by treating the stack a resistor network. The resulting rise in temperature is obtained from a FL-TBC model [4] to shed light on self-heating and heat dissipation in such devices. We find that the temperature rise in the top layers is significantly larger than the bottom layers because the bottom layers have higher TBC and conduct heat more efficiently to the substrate [4,5]. The higher temperature of top layers, in turn, significantly reduces their mobility, which is strongly temperature-dependent as they are shielded by the bottom layers from substrate impurity scattering. We also uncover that, unlike monolayer FETs, a significant amount of heat is dissipated laterally through the contacts in FL devices at high VDS due to relatively large thermal healing lengths of the top layers.

Integration of polycrystalline Ga2O3 on diamond for thermal management

Gallium oxide (Ga2O3) has attracted great attention for electronic device applications due to its ultra-wide bandgap, high breakdown electric field, and large-area affordable substrates grown from the melt. However, its thermal conductivity is significantly lower than that of other wide bandgap semiconductors such as SiC, AlN, and GaN, which will impact its ability to be used in high power density applications. Thermal management in Ga2O3 electronics will be the key for device reliability, especially for high power and high frequency devices. Similar to the method of cooling GaN-based high electron mobility transistors by integrating it with high thermal conductivity diamond substrates, this work studies the possibility of heterogeneous integration of Ga2O3 with diamond for the thermal management of Ga2O3 devices. In this work, Ga2O3 was deposited onto single crystal diamond substrates by atomic layer deposition (ALD), and the thermal properties of ALD-Ga2O3 thin films and Ga2O3–diamond interfaces with different interface pretreatments were measured by Time-domain Thermoreflectance. We observed a very low thermal conductivity of these Ga2O3 thin films (about 1.5 W/m K) due to the extensive phonon grain boundary scattering resulting from the nanocrystalline nature of the Ga2O3 film. However, the measured thermal boundary conductance (TBC) of the Ga2O3–diamond interfaces is about ten times larger than that of the van der Waals bonded Ga2O3–diamond interfaces, which indicates the significant impact of interface bonding on TBC. Furthermore, the TBC of the Ga-rich and O-rich Ga2O3–diamond interfaces is about 20% smaller than that of the clean interface, indicating that interface chemistry affects the interfacial thermal transport. Overall, this study shows that a high TBC can be obtained from strong interfacial bonds across Ga2O3–diamond interfaces, providing a promising route to improving the heat dissipation from Ga2O3 devices with lateral architectures.

Thermal boundary conductance between high thermal conductivity boron arsenide and silicon

Thermal boundary conductance (TBC) is important for heat dissipation in light-emitting diodes (LEDs). In this study, we predicted the TBC between the high thermal conductivity boron arsenide (BAs) and silicon (Si) by nonequilibrium molecular dynamics (MD) simulations. From the thermal conductivity accumulation function with respect to phonon frequency, the dominant phonon frequencies for heat conduction in BAs are extremely different from those in Si. However, our nonequilibrium MD simulations indicated that the TBC of the BAs/Si interface was still high compared to most other interfaces, even though there was a major frequency mismatch in the thermal conductivity accumulation function between BAs and Si. The primary reason for the high TBC is the overlap of phonon density of states between BAs and Si in the frequency range of 5–8 THz. The range of predicted TBC of the BAs/Si interface was between 200 and 300 MW/m2 K in the temperature range of 300–700 K, and the values of the TBC were not sensitive to the temperature. We also found that the TBCs in Si/BAs and Si/Ge interfaces were close to each other considering the simulation uncertainty. This work indicates BAs as an excellent material for heat dissipation across the interfaces.

High Thermal Boundary Conductance across Bonded Heterogeneous GaN-SiC Interfaces.

High-power GaN-based electronics are limited by high channel temperatures induced by self-heating, which degrades device performance and reliability. Increasing the thermal boundary conductance (TBC) between GaN and SiC will aid in the heat dissipation of GaN-on-SiC devices by taking advantage of the high thermal conductivity of SiC substrates. For the typical growth method, there are issues concerning the transition layer at the interface and low-quality GaN adjacent to the interface, which impedes heat flow. In this work, a room-temperature bonding method is used to bond high-quality GaN to SiC directly, which allows for the direct integration of high-quality GaN with SiC to create a high TBC interface. Time-domain thermoreflectance is used to measure the GaN thermal conductivity and GaN-SiC TBC. The measured GaN thermal conductivity is larger than that of grown GaN-on-SiC by molecular beam epitaxy. High TBC is observed for the bonded GaN-SiC interfaces, especially for the annealed interface (∼230 MW m-2 K-1, close to the highest value ever reported). Thus, this work provides the benefit of both a high TBC and higher GaN thermal conductivity, which will impact the GaN-device integration with substrates in which thermal dissipation always plays an important role. Additionally, simultaneous thermal and structural characterizations of heterogeneous bonded interfaces are performed to understand the structure-thermal property relation across this new type of interface.

Quantifying thermal boundary conductance of 2D–3D interfaces

Heat dissipation in next-generation electronics based on two-dimensional (2D) materials is a critical issue in their development and implementation. A potential bottleneck for heat removal in 2D-based devices is the thermal pathway from the 2D layer into its supporting substrate. The choice of substrate, its composition and structure, can strongly impact the thermal boundary conductance (TBC). Here we investigate the temperature-dependent TBC of 42 interfaces formed between a group of six 2D materials and seven crystalline and amorphous substrates. We use first-principles density functional perturbation theory to calculate the full phonon dispersion of the 2D layers and substrates and then input them into our model for phonon transport across the 2D–3D interface. Our results show that the TBC depends on the overlap between the vibrational frequencies and can be varied by nearly two orders of magnitude, from as low as ∼0.6 MW · m K−1 (h-BN on diamond) to ∼40 MW · m K−1 (h-BN on SiO2), for the same 2D layer by changing the substrate material. We find that amorphous materials significantly boost the TBC relative to their crystalline counterparts, assuming the two interfaces have the same adhesion, owing to the low-frequency Boson peak feature in their vibrational density of states (vDOS). For crystalline substrates, we further correlate constituent material properties with the calculated TBCs and find that the TBC strongly depends on a combination of the speed of sound, Debye temperature, and density of the substrate as well as the bandwidth of the flexural branch in the 2D material. We conclude that softer substrates with sharp low-frequency features in their vDOS, such as amorphous materials, polymers, and nanoparticles, could have higher TBC, leading to a trade-off between TBC and the thermal conductivity of the substrate.

Oxidation limited thermal boundary conductance at metal-graphene interface

Thermal management is a substantial challenge in high-power-density micro- and nanoelectronic devices, and the thermal resistance at the interfaces in these devices is a major bottleneck to heat removal. Graphene has emerged as a potential candidate for next generation nanoelectronic devices because of its exceptional transport properties; however, the thermal interaction between graphene and other materials such as metals is not completely understood. Here we report thermal boundary conductance (TBC) measurements at metal-graphene-metal (M-G-M) interfaces at room temperature using time-domain thermoreflectance. The metals used in this study represent two classes based on the type of bonding formed with graphene. Ti and Ni form chemisorbed interfaces (strong bonding) with graphene and high TBC is expected while Au forms physisorbed interfaces (weak bonding). The measured TBC at M-G-M interfaces showed little variation (∼30 MW/m2-K) and was similar to metal-graphene-SiO2 interfaces, contrary to high TBC predicted by previous simulation studies. X-ray photoelectron spectroscopy was used to estimate thickness of the native oxide layer of bottom Ti (2.8 nm) and Ni (2.5 nm) layers. The conductance of these thin native oxide layer was much greater than the overall TBC but prevented formation of chemisorbed interfaces between graphene and metal for Ti and Ni cases leading to significantly lower TBC and highlighting an important consideration for practical applications.

The Role of Interfacial Electronic Properties on Phonon Transport in Two-Dimensional MoS2 on Metal Substrates.

We investigate the role of interfacial electronic properties on the phonon transport in two-dimensional MoS2 adsorbed on metal substrates (Au and Sc) using first-principles density functional theory and the atomistic Green's function method. Our study reveals that the different degree of orbital hybridization and electronic charge distribution between MoS2 and metal substrates play a significant role in determining the overall phonon-phonon coupling and phonon transmission. The charge transfer caused by the adsorption of MoS2 on Sc substrate can significantly weaken the Mo-S bond strength and change the phonon properties of MoS2, which result in a significant change in thermal boundary conductance (TBC) from one lattice-stacking configuration to another for same metallic substrate. In a lattice-stacking configuration of MoS2/Sc, weakening of the Mo-S bond strength due to charge redistribution results in decrease in the force constant between Mo and S atoms and substantial redistribution of phonon density of states to low-frequency region which affects overall phonon transmission leading to 60% decrease in TBC compared to another configuration of MoS2/Sc. Strong chemical coupling between MoS2 and the Sc substrate leads to a significantly (∼19 times) higher TBC than that of the weakly bound MoS2/Au system. Our findings demonstrate the inherent connection among the interfacial electronic structure, the phonon distribution, and TBC, which helps us understand the mechanism of phonon transport at the MoS2/metal interfaces. The results provide insights for the future design of MoS2-based electronics and a way of enhancing heat dissipation at the interfaces of MoS2-based nanoelectronic devices.

Qualitative link between work of adhesion and thermal conductance of metal/diamond interfaces

We report Time-Domain ThermoReflectance experiments measuring the Thermal Boundary Conductance (TBC) of interfaces between diamond and metal surfaces, based on samples consisting of [111]-oriented diamond substrates with hydrogen or with sp2 carbon surface terminations created using plasma treatments. In a concurrent theoretical study, we calculate the work of adhesion between Ni, Cu, and diamond interfaces with (111) surface orientation, with or without hydrogen termination of the diamond surface, using first-principles electronic structure calculations based on density functional theory (DFT). We find a positive correlation between the calculated work of adhesion and the measured conductance of these interfaces, suggesting that DFT could be used as a screening tool to identify metal/dielectric systems with high TBC. We also explain the negative effect of hydrogen on the thermal conductance of metal/diamond interfaces.

Thermal boundary conductance of transition metals on diamond

An experimental process that was used to obtain a direct measurement of thermal boundary conductance (TBC) between a diamond substrate and several transition metals, deposited by sputtering, is described. Using time-domain thermoreflectance (TDTR), the critical parameters, for a proper interpretation of the results, are evaluated to be the laser spot size and the thickness of the metallic thin films. Values of TBC between Cu, Cr, Nb, Mo, W and diamond are presented and vary between 30 and 280 MW/m2/K. The adhesion of the layer to the substrate is seen to be critical to obtain a high TBC. Annealing in vacuum at temperatures up to 600°C does not significantly seem to change the results obtained. When diamond surface is oxygen plasma treated for better adhesion, the TBC between Cr and diamond is measured to be 325 MW/m2/K. This represents an 11-fold increase compared to untreated diamond.