Stability of Interface Morphology and Thermal Boundary Conductance of Direct Wafer Bonded GaN|Si Heterojunction Interfaces Annealed at Growth and Annealing Temperatures

Abstract

The properties of thin (~2 um) GaN templates on a silicon support substrate were studied to assess the stability of the direct wafer bonded GaN / Si interface. EVG® ComBond® equipment was used for bonding under high vacuum (~10-8 mtorr) at room temperature to remove unwanted native surface oxides [1,2]. For the bonded samples, the [1010] GaN edge was aligned parallel to the Si [110] edge. An X-ray diffraction reciprocal space map of the (004) Si and (0004) GaN revealed that there is a ~0.2° tilt between the GaN and Si layers and is simply due to the relative miscut between the two wafers. The treatment of the surfaces prior to bonding produces an amorphous region at the bonded interface that has been seen in many other bonded systems [3-5]. In the as-bonded sample, high resolution scanning transmission electron microscopy revealed a ~2 nm amorphous region on the Si side of the bonded interface, as confirmed by energy dispersive x-ray spectroscopy (EDX). Subsequent annealing was performed in an effort to recrystallize the amorphous interface. Previous work has shown that recrystallization between Si|Si wafer bonded samples occurred when annealed at 450 °C for 12 hours [3]. However, in the GaN|Si system, we found that the amorphous interface did not recrystallize when annealed under those conditions. Annealing at temperatures up to 450 °C and 120 hours showed only initial stages of interdiffusion and a stable interface. However, after annealing at 700 °C for 24 hours, high resolution EDX revealed the formation of amorphous SiN as well as the diffusion of gallium into silicon.Preliminary thermal results show that the thermal boundary conductance (TBC) of the as bonded sample is ~140 MW/(m2K). The TBC results of wafer bonded GaN|Si reported here is higher than previously reported TBC values of epitaxially grown interfaces such as GaN on Si [6], GaN on SiC [7], and GaN on diamond [8]. The TBC for the annealed interface is degraded by a factor of two compared to the as-bonded interface for the sample that was annealed at 700 °C for 24 hours. These results demonstrate that high TBC can be achieved through wafer bonding of GaN with materials such as silicon and that such interfaces are stable even up to device operation up to 300 °C. However, chemically rough interfaces formed due to high temperature annealing are detrimental to thermal transport across these interfaces. V. Dragoi, et al., ECS Trans., 86(5), 23 (2018)C. Flötgen, et al., ECS Trans., 64(5), 103 (2014)M.E. Liao, et al., ECS Trans., 86(5), 55 (2018)Y. Xu, et al., Ceramics International, 45, 6552 (2019)F. Mu, et al., Appl. Surf. Sci., 416, 1007 (2017)L. Yates, et al., ASME InterPACK (2015)J. Cho, et al., Phys. Rev. B, 89, 115301 (2014)H. Sun, et al., APL, 106(11), 111906 (2015) Figure 1