High-temperature Post-deposition Annealing Research Articles

Post-deposition annealing challenges for ALD Al0.5Si0.5Ox/n-GaN MOS devices

In this work, we investigate the impact of high-temperature Post-Deposition Annealing (PDA) on Al0.5Si0.5Ox deposited by Atomic Layer Deposition (ALD). Reversed hysteresis is observed and explained by mobile charges originating from K+ and Na+ impurities. The high-temperature annealing does not cure the presence of these mobile charges. We also report the onset of film and interface degradation after annealing above 750 °C under N2, with both inhomogeneous aluminium and silicon composition, signs of AlSiO crystallization and interfacial gallium oxide growth.

Low-temperature synthesis of crystalline vanadium oxide films using oxygen plasmas

Vanadium oxide (VOx) compounds feature various polymorphs, including V2O5 and VO2, with attractive temperature-tunable optical and electrical properties. However, to achieve the desired material property, high-temperature post-deposition annealing of as-grown VOx films is mostly needed, limiting its use for low-temperature compatible substrates and processes. Herein, we report on the low-temperature hollow-cathode plasma-enhanced atomic layer deposition (ALD) of crystalline vanadium oxide thin films using tetrakis(ethylmethylamido)vanadium and oxygen plasma as a precursor and coreactant, respectively. To extract the impact of the type of plasma source, VOx samples were also synthesized in an inductively coupled plasma-enhanced ALD reactor. Moreover, we have incorporated in situ Ar-plasma and ex situ thermal annealing to investigate the tunability of VOx structural properties. Our findings confirm that both plasma-ALD techniques were able to synthesize as-grown polycrystalline V2O5 films at 150 °C. Postdeposition thermal annealing converted the as-grown V2O5 films into different crystalline VOx states: V2O3, V4O9, and VO2. The last one, VO2 is particularly interesting as a phase-change material, and the metal-insulator transition around 70 °C has been confirmed using temperature-dependent x-ray diffraction and resistivity measurements.

Low‐Temperature, Scalable, Reactive Deposition of Tin Oxide for Perovskite Solar Cells

Perovskite Solar Cells In article number 2200263, David George Lidzey and co-workers fabricated SnOx electron-extraction layers via a reactive electron-beam evaporation process from a metal source under a partial pressure of oxygen. These are then used in standard (n-i-p) architecture perovskite solar cells and achieve power conversion efficiencies up to 19.3%. The SnOx deposition process is performed onto substrates maintained at low temperature compared to similar techniques, with films not requiring any subsequent high-temperature post-deposition annealing. This demonstrates the potential compatibility of reactive electron-beam evaporation with roll-to-roll processing onto flexible polymeric substrates.

Improved dielectric constant and leakage current characteristics of BaTiO3 thin film on SrRuO3 seed layer

The fabrication of high-k BaTiO3 (BTO) films for applications such as multilayer ceramic capacitors or dynamic random access memory has been achieved via the ex-situ crystallization of amorphous BTO into perovskite structure through post-deposition annealing (PDA). However, high-temperature PDA at temperatures exceeding 700 °C results in the severe degradation of BTO properties. In other words, ex-situ crystallization via PDA results in an increased dielectric constant but is accompanied by inferior leakage current characteristics caused by rough surface morphologies and defects such as voids and cracks. In this study, we demonstrate the in-situ crystallization of BTO films by introducing a high-quality SrRuO3 (SRO) film as a seed layer. The SRO film is deposited using rf magnetron sputtering at 270–350 °C, and stoichiometric SRO films are obtained on SiO2, Al2O3, and TiN substrates by controlling the growth temperature; subsequently, rapid thermal annealing at 700 °C is conducted to crystallize the SRO film. The polycrystalline SRO film on the TiN substrate exhibits excellent morphology with uniform grains as well as a continuous and smooth surface, whereas the SRO films on the SiO2 and Al2O3 substrates exhibit rough and discontinuous surfaces. The SRO seed layer on TiN permits the in-situ growth of crystalline BTO films at a relatively low temperature of 500 °C featuring a high dielectric constant of 160 and a low leakage current density of 9.5 × 10−7 A/cm2 at 0.8 V, which are 2.2 and 3.4 × 107 times improved compared with those of the ex-situ crystallized BTO film on bare TiN, respectively.

Defects and Surface Electrical Property Transformation Induced by Elemental Interdiffusion at the p-n Heterojunction via High-Temperature Annealing.

Heterojunction annealing is widely used to improve the efficiency of kesterite thin-film solar cells. However, the efficiency will decrease when the annealing temperature is high, and the reason why high-temperature postdeposition annealing results in the deterioration of device performance is not well-studied, which restricts the efficiency promotion of kesterite solar cells. This study investigates the effect of high-temperature postdeposition annealing on the p-n heterojunction and, thus, on the performance of the solar cell. The surface potential of the absorber layer inverts, the number of deep-level defects increases, and the CdS/CZTSe interface barrier height increases after high-temperature postdeposition annealing. A combination of different characterization methods reveals that excessive elemental diffusion at the p-n heterojunction during high-temperature postdeposition annealing is the key reason for deterioration of the performance of CZTSe devices. This study discloses the mechanism for the change in device properties with high-temperature postdeposition annealing and will also be helpful for understanding the mechanism of efficiency change as the solar cell keeps working.

Low-Temperature As-Grown Crystalline β-Ga2O3 Films via Plasma-Enhanced Atomic Layer Deposition.

We report on the low-temperature growth of crystalline Ga2O3 films on Si, sapphire, and glass substrates using plasma-enhanced atomic layer deposition (PEALD) featuring a hollow-cathode plasma source. Films were deposited by using triethylgallium (TEG) and Ar/O2 plasma as metal precursor and oxygen co-reactant, respectively. Growth experiments have been performed within 150-240 °C substrate temperature and 30-300 W radio-frequency (rf) plasma power ranges. Additionally, each unit AB-type ALD cycle was followed by an in situ Ar plasma annealing treatment, which consisted of an extra (50-300 W) Ar plasma exposure for 20 s ending just before the next TEG pulse. The growth per cycle (GPC) of the films without Ar plasma annealing step ranged between 0.69 and 1.31 Å/cycle, and as-grown refractive indices were between 1.67 and 1.75 within the scanned plasma power range. X-ray diffraction (XRD) measurements showed that Ga2O3 films grown without in situ Ar plasma annealing exhibited amorphous character irrespective of substrate temperature and rf power values. With the incorporation of the in situ Ar plasma annealing process, the GPC of Ga2O3 films ranged between 0.76 and 1.03 Å/cycle along with higher refractive index values of 1.75-1.79. The increased refractive index (1.79) and slightly reduced GPC (1.03 Å/cycle) at 250 W plasma annealing indicated possible densification and crystallization of the films. Indeed, X-ray measurements confirmed that in situ plasma annealed films grow in a monoclinic β-Ga2O3 crystal phase. The film crystallinity and density further enhance (from 5.11 to 5.60 g/cm3) by increasing the rf power value used during in situ Ar plasma annealing process. X-ray photoelectron spectroscopy (XPS) measurement of the β-Ga2O3 sample grown under optimal in situ plasma annealing power (250 W) revealed near-ideal film stoichiometry (O/Ga of ∼1.44) with relatively low carbon content (∼5 at. %), whereas 50 W rf power treated film was highly non-stoichiometric (O/Ga of ∼2.31) with considerably elevated carbon content. Our results demonstrate the effectiveness of in situ Ar plasma annealing process to transform amorphous wide bandgap oxide semiconductors into crystalline films without needing high-temperature post-deposition annealing treatment.

Modified atomic layer deposition of MoS2 thin films

As one of the most attractive transition metal dichalcogenides (TMDs), the growth of molybdenum disulfide (MoS2) with industrial compatibility is of great importance. Atomic layer deposition (ALD) has been shown to be a promising method to achieve the growth of high-quality TMD materials. However, MoS2 films deposited by ALD often are amorphous with nonideal stoichiometry and require high-temperature post-deposition annealing. In this study, we introduce a modified ALD recipe using Mo(CO)6 and H2S, resulting in controllable linear growth behavior, a S-to-Mo ratio of 2:1, and crystalline films at a temperature as low as 190 °C. The growth mechanisms and key factors leading to this improvement are proposed and complemented by kinetics calculations. This newly developed methodology relies on aligning the process time with the reaction kinetics of carbonyl disassociation. The MoS2 films prepared herein were shown to be active hydrogen evolution reaction catalysts.

Effect of post-deposition treatment on electrical properties of solution-processed a-IGZO Schottky diodes

The fabrication of solution-processed electronic devices based on amorphous In–Ga–Zn–O (a-IGZO) requires high-temperature post-deposition annealing to activate IGZO layers and minimize impurities. Deep-ultraviolet (DUV) treatment can reduce the post-deposition annealing temperature when manufacturing a-IGZO thin-film transistors. Here, we investigate the effect of thermal annealing and DUV treatment in a nitrogen and ozone atmosphere on the properties of vertical thin-film Pt–IGZO–Cu Schottky diodes based on spin-coated a-IGZO. The DUV treatment in nitrogen allowed reducing the process temperature to 200 °C. A defect-induced hysteresis was observed on the current–voltage characteristics of as-fabricated Schottky diodes. The values of rectification ratio and barrier height were higher and the values of ideality factor were lower upon the backward bias sweep. It is assumed that the hysteresis behavior is caused by the presence of trap states in the semiconductor layer or at the Schottky interface. A trap density of 108 cm−2 to 1011 cm−2 was deduced from the current–voltage characteristics. The defect-induced hysteresis effect could be suppressed by depositing an Al2O3 layer and applying an additional thermal treatment of the whole diode structure.

Influence of post-deposition annealing on the photoelectrochemical performance of CuBi2O4 thin films

Complex metal oxide semiconductors are promising candidates to be used as photoelectrodes in solar water splitting devices. One particular example is copper bismuth oxide (CuBi2O4), which is a p-type semiconductor with an ideal bandgap of 1.6–1.8 eV and suitable band positions. However, the performance has been reported to be limited by photocorrosion and the mismatch between its optical absorption and charge carrier transport properties. It has been shown that the former can be overcome by the deposition of protection layers, while the latter can be addressed by the modification of the bulk properties of the material. Here, we deposited thin films of CuBi2O4 using pulsed laser deposition (PLD). This results in high quality films, as evident from the internal quantum efficiency, which is comparable to the best-performing CuBi2O4 photoelectrodes. We investigate the bulk modification of the films by exploring post-deposition annealing treatment at various temperatures and oxygen partial pressures. These post-deposition annealing parameters influence the morphology of the films through the formation of aggregated particles/islands with higher crystallinity. The anneal treatment reduces bulk recombination in the film and increases the AM1.5 photocurrent by a factor of more than three. The influence of the high temperature post-deposition annealing treatment on other properties of CuBi2O4 (absorption, formation, and suppression of defects) is also discussed. This study underlines the importance of high temperature post-deposition annealing treatment in optimizing the performance of complex metal oxide photoelectrodes.

Insight into gate dielectric reliability and stability of SiO2/GaN MOS devices

Gate dielectric reliability and stability of SiO2/GaN metal–oxide–semiconductor (MOS) capacitors were systematically investigated by means of area-dependent and time-dependent dielectric breakdown (TDDB) characteristics. It was found that, although high-temperature post-deposition annealing (PDA) that causes Ga diffusion in SiO2 gate dielectrics has only a minor impact on electrical properties of the SiO2/GaN interfaces, PDA at temperatures above 800 °C severely degrades dielectric reliability and stability of GaN MOS devices. Area dependences of time-zero and TDDB characteristics revealed the formation of local weak spots and generation of uniform charge trapping sites throughout the gate oxides depending on the PDA temperatures. Determinant factors for dielectric reliability of SiO2/GaN gate stacks and reasonable measures for improving their reliability and stability are discussed on the basis of the experimental findings.

Effect of high-temperature post-deposition annealing on cesium lead bromide thin films deposited by vacuum evaporation

The effects of high-temperature (500 °C) post-deposition annealing (PDA) on the properties of cesium lead bromide (CsPbBr3) films deposited by vacuum evaporation were studied. The PDA effectively improved the grain size of the CsPbBr3 films. This improvement of the grain size leads to the improvement of carrier diffusion length from 0.1 µm to 0.5 μm. A CsPbBr3 solar cell fabricated using a CsPbBr3 layer with PDA at 500 °C for 60 min showed a conversion efficiency of 6.62% (VOC = 1.465 V, JSC = 6.57 mA/cm2, and FF = 0.688). Our CsPbB3 solar cell also showed a conversion efficiency of 22.5% (VOC = 1.502 V, JSC = 53.7 mA/cm2, and FF = 0.574) for blue LED light (peak wavelength of 453 nm) with an intensity of 206 mW/cm2.

VCC-α nullification and leakage reduction in Pt/Ba0.5Sr0.5TiO3/Pt thin-film capacitor by MgO barrier and PDA for energy storage application

A critical performance parameter of thin-film metal–insulator–metal capacitors when used for energy storage application is leakage current. Introduction of another insulator barrier layer at metal–insulator interface having low electron affinity enhances leakage current performance. The probability of deterioration in capacitance is higher while enhancing leakage performance by barrier layer establishment. The effects of Pt-Ba0.5Sr0.5TiO3 (BST) interface barrier layer and post deposition annealing (PDA) on voltage coefficient of capacitance and leakage current density in Pt/Ba0.5Sr0.5TiO3/Pt thin-film capacitor are reported in this paper. The capacitance measurement is done at low frequency as it meant for energy storage. It is observed that PDA of Pt/MgO/Ba0.5Sr0.5TiO3/MgO/Pt thin-film capacitor at 700 0C in O2 gas environment for 30 min nullifies quadratic voltage coefficient of capacitance (VCC-α). The VCC-α obtained for as-deposited capacitor is −34408 ppm V−2 while that of capacitor annealed at 700 0C is 4.88 ppm V−2 which is the least VCC-α ever reported. A gradual leakage current performance enhancement is observed while increasing annealing temperature and a very low leakage current density of 48 nA cm−2 is observed when annealed at 700 0C. The diffraction peaks in XRD pattern of capacitor annealed at 700 0C indicate good crystallinity achieved in Pt, Ba0.5Sr0.5TiO3 and MgO layers due to high-temperature PDA process. This substantiates the best leakage current characteristics in Pt/MgO/Ba0.5Sr0.5TiO3/MgO/Pt thin-film capacitor annealed at 700 0C than as-deposited capacitor and capacitor annealed at lower temperatures. Further we observed an energy band gap enhancement of 0.055 eV in every 100 0C rise in temperature from the UV–Vis NIR spectroscopy. This continuous energy band gap enhancement while increasing annealing temperature also justifies the reduction in leakage current density at high PDA temperature.

Highly reliable AlSiO gate oxides formed through post-deposition annealing for GaN-based MOS devices

The electrical stabilities of AlSiO gate oxides formed through post-deposition annealing (PDA) and intended for GaN-based power devices were assessed. No degradation of the interface properties of AlSiO/n-type GaN or the oxide breakdown voltage was observed, even after PDA up to 1050 °C. Furthermore, higher temperature PDA drastically reduced the trap density in the oxide, as indicated by current–voltage and positive bias temperature instability data. Time-to-breakdown characteristics showed sufficient lifetimes above 20 years at 150 °C in an equivalent field of 5 MV cm−1. Therefore, AlSiO films fabricated by high-temperature PDA are reliable gate oxide films for GaN-based devices.

Hysteresis effect in current–voltage characteristics of Ni/n-type 4H-SiC Schottky structure**Project supported by the National Natural Science Foundation of China (Grant Nos. 61804118, 61774117, and 61774119), the Fundamental Research Funds for the Central Universities, China (Grant Nos. 20101185935 and 20106186647), the National Key Basic Research Program of China (Grant No. 2015CB759600), the Shaanxi Key Research and Development Program, China (Grant No.

Hysteresis current–voltage (I–V) characteristics are often observed in a highly non-ideal (n > 2) as-deposited nickel (Ni)/4H-SiC Schottky contact. However, we find that this kind of hysteresis effect also exists in an as-deposited Ni/n-type 4H-SiC Schottky structure even if the ideality factor (n) is less than 1.2. The hysteresis I–V characteristics is studied in detail in this paper by using the various measurements including the hysteresis I–V, sequential I–V sweeping, cycle I–V, constant reverse voltage stress (CRVS). The results show that the hysteresis I–V characteristics are strongly dependent on the sweeping voltage and post-deposition annealing (PDA). The high temperature PDA (800 °C) can completely eliminate this hysteresis. Meanwhile, the magnitude of the hysteresis effect is shown to decrease in the sequential I–V sweeping measurement, which is attributed to the fact that the electrons tunnel from the 4H-SiC to the localized states at the Ni/n-type 4H-SiC interface. It is found that the application of the reverse bias stress has little effect on the emission of those trapped electrons. And a fraction of the trapped electrons will be gradually released with the time under the condition of air and with no bias. The possible physical charging mechanism of the interface traps is discussed on the basis of the experimental findings.

Comparative study of photoluminescence properties obtained from SiO2/GaN and Al2O3/GaN structures

Photoluminescence properties of SiO2/GaN and Al2O3/GaN structures formed with plasma-enhanced chemical vapor deposition (PECVD) or atomic layer deposition (ALD) methods were systematically investigated. Intensities related to the band edge (BE) transition for the ALD-SiO2/GaN and ALD-Al2O3/GaN structures significantly decrease compared with the intensity for the GaN surface after a wet-chemical cleaning. The BE intensities have dependences on the temperature of post-deposition annealing (PDA), while they do not achieve the intensity for the wet-cleaned sample even after high-temperature PDA. On the other hand, we found that the BE intensity for the PECVD-SiO2/GaN structure showed almost no reduction compared with the wet-cleaned sample. These results suggest that the interface between PECVD-SiO2 and GaN is well passivated, and that the PECVD-SiO2/GaN structure is suitable for future electrical and optical GaN devices.

Multi- and single-step in situ microwave annealing as low-thermal-budget techniques for solution-processed indium–gallium–zinc oxide thin films

In this study, low-thermal-budget in situ microwave annealing of solution-processed indium–gallium–zinc oxide (IGZO) thin films was investigated as a potential alternative to the conventional high-thermal-budget annealing process. The low-temperature baking and high-temperature post-deposition annealing of the solution-processed IGZO film were continuously performed using the same microwave equipment, leading to a reduced heat treatment processing time and temperature. We compared the electrical characteristics of IGZO thin film transistors (TFTs) produced using single- and multi-step in situ microwave annealing methods with those of TFTs manufactured via the conventional annealing method and found that the proposed single-step microwave annealing method yielded TFTs with electrical characteristics better than those of the TFTs fabricated using the multi-step and conventional annealing methods. In addition, the reliability was evaluated by conducting positive and negative gate bias stress tests, in which the IGZO TFTs manufactured using the proposed heat treatment method proved superior to those fabricated via the conventional heat treatment method. We investigated the effects of heat treatment on the composition and energy band structures of the IGZO films by performing x-ray photoelectron spectroscopy analysis and found that the proposed in situ microwave annealing method is more effective than the conventional method in solution processing.

Room temperature pulsed-DC sputtering deposition process for CIGS absorber layer: Material and device characterizations

A pulsed-DC sputtering process at room temperature has been developed for the deposition of the CIGS absorber layer. It uses a single quaternary target and is followed by a high temperature post-deposition annealing process. It has to be particularly noticed that no additional selenium supply was used. The annealed layers have shown a high microstructural quality: micrometric grain size, highly oriented (112) chalcopyrite phase, no phase decomposition and no Cu2-xSe secondary phase at the surface. The use of such an absorber layer for the fabrication of 0.5 cm2 solar cells has allowed reaching a conversion efficiency of 11.8% with an open circuit voltage of 558 mV, a short circuit current density of 32.1 mA·cm−2 and a fill factor of 65.8%.

Normally-off Al2O3/GaN MOSFET: Role of border traps on the device transport characteristics

Based on the self-terminating gate recess technique, two different processes featuring gate-recess-first (GF) and ohmic-contact-first (OF) were proposed for E-mode Al2O3/GaN MOSFETs. Increased maximum drain current (Idmax) ∼30% (420 vs 325 mA/mm), field-effect mobility (μFEmax) ∼67% (150 vs 90 cm2/Vs) and reduced on-state resistance (Ron) ∼42% (9.7 vs 16.8 Ω·mm) were observed in the devices fabricated by GF process. Such significant performance difference of GF- and OF-devices resulted from the presence of border traps at Al2O3/GaN interface with a time constant ∼7 × 10−6 s. Experimental results indicated that: (1) the near interface border traps in Al2O3 dielectric significantly affect device channel mobility; (2) a high temperature post-deposition annealing process could effective suppress generation of border traps.

Effect of Post-Deposition Annealing on the Interface Electronic Structures of Al2O3-Capped GaN and GaN/AlGaN/GaN Heterostructure

The interface electronic structures of GaN and GaN/AlGaN/GaN samples, capped with atomic-layer-deposited Al2O3 and subjected to varying post-deposition annealing (PDA) temperatures, are investigated by X-ray photoelectron spectroscopy (XPS) and Hall-effect measurement. XPS study shows a decrease in the Ga 3d and N 1s core level binding energy after a high-temperature PDA, implying a decrease of the interface defect density and the associated positive trapped-charge. From Hall-effect measurement, the density and mobility of the two-dimensional electron gas (2DEG) are found to decrease and increase, respectively, after PDA, supporting the XPS results. The XPS data, however, reveal a clear Ga-O signal for all samples and no apparent change in the Ga-O to Ga-N bond ratio for the range of annealing temperatures studied. These findings imply that the observed improvement in 2DEG mobility (and the associated decrease of interface defect density) should be ascribed to the structural change of the disordered GaOx interfacial layer formed during the atomic-layer-deposition of the Al2O3.

Blistering Induced Degradation of Thermal Stability Al2O3Passivation Layer in Crystal Si Solar Cells

Different kinds of post-deposition annealing (PDA) by a rapid thermal process (RTP) are used to enhance the field-effect passivation of Al2O3 film in crystal Si solar cells. To characterize the effects of PDA on Al2O3 and the interface, metalinsulator semiconductor (MIS) devices were fabricated. The effects of PDA were characterized as functions of RTP temperature from 400~700 °C and RTP time from 30~120 s. A high temperature PDA can retard the passivation of thin Al2O3 film in c-Si solar cells. PDA by RTP at 400 °C results in better passivation than a PDA at 400 °C in forming gas (H2 4% in N2) for 30 minutes. A high thermal budget causes blistering on Al2O3 film, which degrades its thermal stability and effective lifetime. It is related to the film structure, deposition temperature, thickness of the film, and annealing temperature. RTP shows the possibility of being applied to the PDA of Al2O3 film. Optimal PDA conditions should be studied for specific Al2O3 films, considering blistering.