High-speed Requirements Research Articles

Geometrical Feature Analysis of the Movement of the New Type of Double-Hemisphere Rolling Gear Globoidal Cam Indexing Mechanism

A novel kind of double-hemisphere rolling gear globoidal indexing cam mechanism was proposed，which can satisfy high speed and precision motion requirement. Fundamental principle and meshing characteristics were studied based on conjugate surface principle. Pure rolling of the transmision mechanism was applicated in engineering，and combination property was improved.

"ON-AXIS" LINEAR FOCUSED SPOT SCANNING MICROSTEREOLITHOGRAPHY SYSTEM: OPTOMECHATRONIC DESIGN, ANALYSIS AND DEVELOPMENT

Microstereolithography (MSL) is technology of fabrication of three-dimensional (3D) components by using layer-by-layer photopolymerization. Typical design goals of MSL system are: small features, high resolution, high speed of fabrication, and large overall size of component. This paper focuses on design and development of such a system to meet these optomechatronic requirements. We first analyze various optical scanning schemes used for MSL systems along with the proposed scheme via optical simulations and experiments. Next, selection criteria for various subsystems are laid down and appropriate design decisions for the proposed system are made. Further, mechanical design of the scanning mechanism is carried out to meet requirements of high speed and resolution. Finally, system integration and investigation in process parameters is carried out and fabrication of large microcomponent with high resolution is demonstrated. The proposed system would be useful for fabrication of multiple/large microcomponents with high production rate in various applications.

Design of 45nm Switched Inverter Scheme (SIS) ADCs for Low Power and High Speed Applications

The Analog to Digital converters (ADC) play a very important role in today’s world of electronic systems. The requirement of present applications demands high speed, low power dissipation, minimum area, low noise and application specific resolution. Out of the various types of ADCs available the flash ADC is most popular for its highest conversion rate and its wide applications. On the down side the flash ADC dissipates high power due to the presence of resistance ladder. The power dissipation further increases with increase in resolution. In this research two different approaches are presented which eliminates the resistor ladder completely and hence reduce the power demand drastically. The first approach is Switched Inverter Scheme (SIS) ADC; it is realized for 3 bits using 7 comparator circuits of varying size in CMOS 45nm technology with Predictive Technology Model (PTM). The test result obtained indicates an offset error of 0.014 LSB. The full scale error is of -0.112LSB. The gain error is of 0.07 LSB, actual full scale range of 0.49V, worst case DNL & INL each of -0.3V. The power dissipation for the SIS ADC is 207.987 µwatts; Power delay product (PDP) is 415.9 fWs, and the area overhead is 1.89µm 2 . The second approach is Sleep transistor SIS ADC. This approach shows 71% improvement in power dissipation. Whereas PDP is found to be 107.3 fWs and area overhead is 1.94 µm2 for Sleep transistor SIS ADC.

Defect Detection of SMT Electronic Modules

To automatically detect SMT (surface mount technology) electronic modules, algorithms are investigated for geometry and shape features, module matching and detection in PCB (printed-circuit board) components. First, geometry and shape features of SMT electronic modules are presented. Then matching technology and process for SMT electronic modules are studied through optimization searching algorithms, such as similarity based detection and pyramid algorithms. Based on the analysis of major defects, algorithms for detecting major defects in SMT electronic modules are investigated. Finally, the crucial factors affecting inspection precision and speed, i.e., components contour, searching range and minimum similarity, are analyzed. The experimental results show the detection time for Circuit Boards without defect is 0.82s, and for those with one component absent 0.89s, yet for multiple components absent 10.68s. Therefore, it can satisfy the requirements of high reliability, stability, precision, inspection speed and anti-interference for defect detection in SMT electronic module of Circuit Boards.

Wavelet Shrinkage Estimation for Non-Homogeneous Poisson Process Based Software Reliability Models

We develop a novel estimation approach for quantitative software reliability by means of wavelet-based technique, where the underlying software reliability model is described by a non-homogeneous Poisson process. Our approach involves some advantages over the commonly used techniques such as maximum likelihood estimation: 1) the wavelet shrinkage estimation enables us to carry out the time-series analysis with high speed and accuracy requirements; and 2) The wavelet shrinkage estimation is classified into a non-parametric estimation without specifying a parametric form of the software intensity function. We consider data-transform-based wavelet shrinkage estimation with four kinds of thresholding schemes for empirical wavelet coefficients to estimate the software intensity function. In numerical experiments with real software-fault count data, we show that our wavelet-based estimation methods can provide better goodness-of-fit performance than not only the conventional maximum likelihood estimation and least squares estimation but also the local likelihood estimation method, in many cases, in spite of their non-parametric nature. Furthermore, we investigate the predictive performance of the proposed methods by employing the so-called one-stage look-ahead prediction method, and estimate some predictive measures such as software reliability.

Coexistence Studies between Mobile Communication Systems and Broadcasting Systems

With the rapid development of mobile internet, more and more frequency band will be needed to meet the requirement of high data speed. The system coexistence between mobile system and broadcast system is studied, including the scenarios, models, simulation results, related analysis, and finally the solution to resolve the coexistence is given. In urban, an additional 37dB isolation between broadcast system and mobile base station should been satisfied. And an additional 15.7dB is needed between mobile base station and broadcast receiver.

Integral Type Multi-Ramp for Single-Slope ADC

This paper presents a integral type Multi-ramp architecture apply to MRSS ADC (Multiple-ramp single-slope ADC).On the one hand to improve the capacitance mismatch by change voltage reference, On the other hand to reduced the power consumption greatly. Implemented in the GSMC 180nm 2P4M CMOS process, in the power supply voltage of 1.8 V, 11-bit resolution, 10 MHZ sampling frequency, the result of max power consumption is 1.33mW of single unit .The DNL < 0.1LSB and max INL < 0.49LSB .The Multi-ramp achieved requirements for high speed and high accuracy MRSS ADC.

Study on control algorithm of micro-displacement platform

The control system of high precision micro-displacement platform has been designed according to the high precision, high speed and high stability requirements. A hardware platform of the control system has been established with TMS320C6713 DSP chip, XC95144 CPLD chip, CY7C68013 USB chip and 24-bit A/D chip, D/A chip. An improved PID control algorithm was put forward, including set-value weighting control algorithm, resisting saturation of integral with tracking coefficient control algorithm, differential forward control algorithm and incomplete differential control algorithm. The algorithm is simulated in the MATLAB environment. The results show that this control system has high control accuracy, fast response, non-overshoot and strong stability. The algorithm is programmed and loaded into the DSP chip to the control the micro-displacement platform. When the set-value is 1 micron, the displacement platform can move to 1 micron quickly, and the adjustment time is 14 microseconds.

Efficient Implementations of NTRU in Wireless Network

NTRU is a lattice-based public key cryptosystem featuring reasonably short, easily created keys, high speed, and low memory requirements, seems viable for wireless network. This paper presents two optimized designs based on the enhanced NTRU algorithm. One is a light-weight and fast NTRU core, it performs encryption only. This work has a gate-count of 1175 gates and a power consumption of 1.51 μW. It can finish the whole encryption process in 1498 μs at 500 kHz. As such, it is perfect for wireless sensor network. Another high-speed NTRU core is capable of both encryption and decryption, with delays of 16,064 μs and 128,010 μs in encryption and decryption respectively. Moreover, it consists of 25,758 equivalent gates and has a total power consumption of 59.2 μW (it will be reduced greatly if low power methods were adopted). This core is recommended to be used in base stations or servers in wireless network.

Cutter Workpiece Engagement Calculations for Five-axis Milling Using Composite Adaptively Sampled Distance Fields

Composite adaptively sampled distance fields are a new approach to shape representation that is well suited for Numerically Controlled (NC) milling simulation. In NC milling, as the milling tool moves along the tool path, it carves out a swept volume and a portion of the workpiece is removed. During the milling tool motion, it is in contact with the workpiece over an instantaneous common surface which is called Cutter Workpiece Engagement (CWE) surface. In order to model the process mechanics and dynamics accurately, it is important to have a precise geometric representation of the CWE surface. One of the fundamental difficulties has been the accurate and computationally efficient determination of this surface along the tool path for five-axis milling applications. In this paper, we provide a brief introduction to distance fields for swept volumes and describe a new method for determining the CWE surface for general and complex five-axis NC milling. The combination of high simulation speed, high accuracy and modest memory requirements provide significant improvements over existing approaches.

Motion Analysis and Control of a Single Leg of Hydraulically Actuated Quadruped Robots during Vertical Hopping

To address the requirements of high speed and mobility for quadruped robots under unstructured environments,a structure model of hydraulically actuated single leg is proposed.For vertical hopping,a two-phase kinematic model and a three-phase dynamic model of a single leg are established under the structure model.After that,the state analysis on the vertical hopping is conducted,and the inverse kinematics solution and the simulation of the hopping are also implemented for a single leg mass-center’s instant vertical hopping with 1.5 m/s.Then,the ground impact on the body structure,the operation characteristics and the output force of the hip joint and knee joint’s hydraulic cylinder,as well as the hydraulic system design during vertical hopping are discussed.Meanwhile,taking the periodicity of vertical hopping of a single leg into consideration,a PD(proportional-derivative) iterative learning control algorithm is applied to joint trajectory tracking,based on single leg’s dynamic model with hydraulic offset.The simulation results indicate that rapid and robust convergence is achieved in trajectory tracking using the presented model,which offers the design and control references for the succeeding prototype development.

Technique of silico cloning and its application in medicine

The strategy of silico cloning based on the express sequence tags sequence (ESTs)and genome database is a new technique developed in recent years,and the core of the technique is to use bioinformatics technique to assemble and extend ESTs to get part of cDNA and even all sequence.It has the virtue of low investment,high speed,low and well-targeted technical requirements,etc.The relationship between human disease and genes has been widely confirmed,therefore,silico cloning technology will become the important means of disease research.This paper aims at elaborating the progress of silico cloning in medicine. Key words: Expressed sequence tags; In silico cloning; Bioinformatics; Gene cloning

Hardware Design of 2-D High Speed DWT by using Multiplierless 5/3 Wavelet Filters

This paper represents the hardware implementation of high speed DWT using details of 5/3 wavelet filters for image compression applications. Wavelets also find application in speech compression, which reduces transmission time in mobile applications. The main aim of this work was to show that great complexity reduction with excellent performance can be achieved by multiplier less implementation of DWT on FPGA using 5/3 wavelet filters. DWT performs multiresolution analysis which enables to have a scale-invariant interpretation of image. To optimize high speed and memory requirement, we propose novel VLSI architecture for 2D DWT using Conditional Carry Adder.

A Modified Proportional Fair Scheduling Algorithm for the Electric Power Wireless Private Network

With the development of smart grid, the requirements of high speed, low delay and better coverage have motivated a electric power wireless network that bridge the communication gaps between the transmission system and the load. In this paper, we introduce a new electric power wireless communication network, and give a general overview of studies on the major characters of communication such as wide coverage, a lot of measurement points in distribution networks as well. In order to improve the communication performance, the paper proposes a modified proportional fair algorithm, which allocates the radio resources by introducing a Quality-of-Service (QoS) scale factor. By comparing with the proportional fair algorithm, we get the conclusion that the modified algorithm is more suitable for the electric power wireless private network.

The Research of Fuzzy-PID Control Based on Grey Predition for AUV

The complexity of sea environment and the uncertainty of AUV model lead to difficulties of heading control. It is difficult to satisfy its requirement for high accuracy and fast speed through the use of a single control method, based on the peculiarity of AUV and the existing problem of control, We propose a fuzzy-PID control method based on a grey model, which combines fuzzy control with PID control, Our simulations confirm that our method provides higher robustness and adaptive property than regular PID, it is suitable for the use of AUV in complexity sea environment.

Active Disturbance Rejection Control for Hydraulic Position Control System of High-Quality Cold Rolling Mill

Active disturbance rejection controller (ADRC) instead of the conventional PID controller in the hydraulic position control system is proposed to satisfy high accuracy and speed requirements in cold rolling mill. Based on the simplified model, frequency-domain analysis of the two kinds of controllers is performed. The results show that ADRC produces better performances, such as bandwidth, stability margins. Because of the extended state observer (ESO) that can estimate and compensate the tracking system in real time, ADRC reduces the dependence on accurate mathematical model, improves anti-disturbance capability of the system, and maintains good dynamic characteristics. The simulation results verified the effect of the conclusion.

Curvature-Based Real-Time NURBS Surface Interpolator with Look-Ahead ACC/DEC Control

Real-time parametric surface interpolation is very useful in high-performance machining. A curvature-based NURBS surface interpolator with look-ahead acceleration/deceleration (ACC/DEC) control has been developed. The cutter contact (CC) paths are planned through iso-parametric line method. The CC feedrate profile is optimized using global flexible control strategy and local adaptive ACC/DEC optimization strategy according to the look-ahead algorithm. The real-time surface interpolation algorithm was programmed on Windows XP platform. The stability and efficiency of the proposed interpolation method were verified by a NURBS curve and a NURBS surface. It is shown that the proposed parametric interpolation algorithm can satisfy the high speed and high precision requirements of high-speed CNC systems.

FPGA Implementation of a Floating-Point Quaternion-Based Attitude Determination Solution Using Peano-Baker Algorithm

This paper presents an FPGA implementation of quaternion-based attitude determination solution using Peano-Baker algorithm. Hardware design architecture and logic implementation flow are proposed in detail. Utilizing parallel pipelining technique and functional module reuse method, the solution achieves high performances both in resource consumption and processing speed. Meanwhile, floating-point number format is employed to enhance computation accuracy. Experimental results show that our solution shares comparable accuracy performance with expensive commercial device, but its processing frequency can reach as high as 0.26MHz which is much superior and makes it particularly suitable for practical applications with high speed requirement.

Design of Double SDRAM Controller for Multibus Ground-Based Test Equipment

A double SDRAM controller based on ping-pong operation as the data buffer is designed to meet the requirement of large data amount and high transmission speed for multibus ground-based test equipment of a missile system.The design scheme which uses FPGA as the main controller is presented in detail,including the internal interface of SDRAM,process of data transmission and realization of ping-pong operation.The function of this controller is validated through the picked images from image generator,and the result shows that it can write and read data at the steady rate of 125Mbit/s,which indicates this SDRAM controller is feasible for the multibus ground-based test equipment.

Design of Double SDRAM Controller for Multibus Ground-Based Test Equipment

A double Synchronous Dynamic Random Access Memory controller based on ping-pong operation as the data buffer is designed to meet the requirement of large data amount and high transmission speed for multibus ground-based test equipment of a certain missile system. The design scheme which use FPGA as the main controller is presented in detail, including the internal interface of SDRAM, processings of data transmission and realization of ping-pong operation. The function of this controller is validated through the picked images from image generator, and the result shows that it can write and read data at the steady rate of 125Mbit/s, which indicate this SDRAM controller is feasible for the multibus ground-based test equipment