An internally compensated monolithic operational amplifier, fabricated using only junction-isolated bipolar processing, slews in excess of 500 V//spl mu/s, and settles to within 0.1 percent in 200 ns as a pulse inverter. Performance in the noninverting mode is only slightly degraded in comparison with the inverting mode. In addition, the following performance levels have been achieved: 50-MHz unity-gain bandwidth with 96-dB open-loop gain, 30-mW quiescent power at /spl plusmn/3 V, /spl plusmn/50-mA output current capability, and output voltage to within 0.5 V of either supply. In order to achieve the above performance, the following innovations were made: 1) a process for junction-isolated compatible complementary p-n-p transistors with low collector series resistance, 2) a high-speed class-B output stage, 3) push-pull middle stages, 4) driven internal reference voltages locked to the noninverting input, and 5) very small voltage drops across large internal shaping capacitors which permit use of high-capacitance junctions.