High-resistivity Silicon Research Articles

3D Heterogenous Integrated Wideband Switchable Bandpass Filter Bank for Millimeter Wave Applications

This article proposes a three-dimensional heterogenous-integrated (3DHI) switchable bandpass filter bank with two independent wideband filter channels that cover 26–40 GHz and 32.5–40 GHz, respectively. An accurate wafer-level process with a high hollowed ratio of the applied 8-inch high-resistivity-silicon (HR-Si) interposer wafers is presented to form both compact filter channels. Above the interdigital filter patterns fabricated on the bottom interposer wafer, deep cavities are etched in the cap interposer wafer to improve the quality factor of the filter bank. Besides the cavities, the cap interposer wafer is 35% hollow inside, which two bare dies of GaAs single-pole double-throw (SPDT) switches and two thin film resistors are attached to the bottom interposer after the wafer-to-wafer (W2W) bonding. To ensure good out-of-band performance, a 3D EM co-simulation of the switch layout at the chip level and filter patterns at the package level is applied. Measurement results show that the switchable filter bank achieves a high isolation of 50 dB and a competitive shape factor (BW30dB/BW3dB) of about 1.3. In addition, the size of the switchable filter bank is only 7.0 mm × 3.5 mm × 0.6 mm, and the weight is only 0.1 g.

Design and Optimization of an S-Band MEMS Bandpass Filter Based on Aggressive Space Mapping.

Aggressive space mapping (ASM) is a common filter simulation and debugging method. It plays an important role in the field of microwave device design. This paper introduces ASM and presents the design and fabrication of a compact fifth-order microstrip interdigital filter with a center frequency of 2.5 GHz and a relative bandwidth of 10% using ASM. The filter used a double-layer silicon substrate structure and stepped impedance resonators (SIRs) and was optimized by ASM. After five iterations, the filter achieved the design specification, which greatly improves the efficiency of the filter design compared with the traditional method. It was fabricated on high-resistance silicon wafers by micro-electro-mechanical systems (MEMSs) technology, and the final size of the chip is 9.5 mm × 7.6 mm × 0.8 mm. The measurement results show that the characteristics of the filter are similar to the simulation results, which also shows the efficiency and precision of the ASM algorithm.

Suppression of p-type parasitic channel formation at the interface between the aluminum nitride nucleation layer and the high-resistivity silicon substrate

In this study, GaN-based epitaxial structures were grown on high-resistivity silicon (HRSi) substrates by metalorganic chemical vapor deposition. The p-type parasitic channels generated at the interfaces of the aluminum nitride (AlN) nucleation layers and HRSi substrates were characterized by surface capacity measurement, backside secondary ion mass spectrometry, and spread resistance profiling. The 2-nm thick silicon nitride (SiNx) layer formed by nitridation on the HRSi substrates was used to suppress the Al diffusion from the 50-nm AlN nucleation layer and also prevented from generation of the p-type parasitic channels. The p-type parasitic channels induced insertion losses at high frequencies. Transmission line measurement was used to determine the insertion losses. The insertion loss of the GaN-based epitaxial structure with the optimized 25-nm AlN nucleation layer on the 2-nm SiNx layer was -2.72 dB/mm. It was only 0.04 dB/mm higher than that of the annealed HRSi substrate (-2.68 dB/mm) at 10 GHz. Obviously, the diffusion of Al from the optimized 25-nm thick AlN nucleation layer into the HRSi substrate can be alleviated by the SiNx layer, thereby reduced insertion loss.

Current-voltage simulation analysis of MIS structure utilizing aluminium nitride on high resistivity silicon

High resistivity silicon is increasingly becoming one of the subjects of interest in optimizing the performance of MIS photodetectors as it offers better bias responses compared to low resistivity silicon. The incorporation of thin AlN as the tunnelling insulator in MIS structure utilizing high resistivity silicon has shown promising photocurrent to dark current ratios, suggesting potential integration of the structure. In this work, the MIS structure on high resistivity silicon with AlN tunnelling insulator is simulated and empirically modelled using previous experimental work. The effects of substrate resistivity and AlN thickness are then evaluated. Simulation work shows good agreement with the previous experimental work, except for the photocurrent characteristics in the inversion region, where the recorded values are 107 magnitude lower than the reported experimental values. The photocurrent characteristics for MIS structures on high resistivity silicon is recorded to be higher than the structures on low resistivity silicon. Meanwhile, both dark current and photocurrent increases with decreasing AlN thickness up until 1 nm. Lastly, no conclusive evidence from this simulation work to show any tunnelling behaviour in the inversion region for all cases.

Experimental Investigation of a Photogenerated Silicon Plasma Monopole Antenna

This work investigates the photoconductive effect in high-resistivity silicon (HRS) as the radiating element of a plasma monopole antenna. A silicon chiplet forming the monopole is mounted on top of an antenna feed network patterned on a printed circuit board (PCB) substrate. By exciting the silicon chiplet with a light source supplied by optical fibers, the monopole can be changed from a dielectric to a conductor, thus making the antenna indistinguishable from typical substrates in the OFF-state and radiating in its ON-state. The experimental results show a peak broadside realized gain of −2.6 dBi at 16.9 GHz and an ON/OFF ratio greater than 17.8 dB from 14.2 to 20 GHz. The silicon plasma antenna is also shown to radiate between 43% and 62% of the broadside power in comparison to a fully copper monopole antenna with equivalent dimensions. The proposed photogenerated silicon plasma monopole antenna demonstrates significant potential as an antenna element for integration within a plasma antenna array system.

ЕЛЕКТРОННІ ТЕРМОЧУТЛИВІ СЕНСОРИ ДЛЯ АВТОНОМНИХ СУДЕН

The article deals with temperature sensors, the operation of which is based on the use of a change of voltage on a p-n junction of the semiconductor transistor at the set direct current. It sets out the theoretical justification for requirements for the structure of diodes and transistors used as temperature sensors. It is shown that for the improvement of thermometric parameters of sensors it is necessary to use transistors made of high-resistivity silicon with a thin base and small concentration of basic admixture. The task of creating fully electronic automatic measuring devices for control of the environment and mechanisms temperature is especially relevant for autonomous ships without a crew. The feature of the implementation of such a task is that initial signals of measuring devices must be only electric, electronic, and consistent with the systems of transmission of the coastal centres that manage autonomous ships. Electronic temperature sensors will become an obligatory part of future autonomous ships without a crew. They will be able not only to replace classic temperature measuring devices but also will allow, in real-time, to operatively inform the operators of coastal ship management centres of the current situation allowing taking necessary decisions about providing safety of navigation. Keywords: automatic ships, electronics data transmit, electronics thermosensors, safety of navigation, navigation, unmanned ships.

전자전에 사용되는 S-대역 스위치 필터 뱅크의 초소형화 광대역 MEMS 대역 통과 필터 구현

Wideband MEMS bandpass filters are important frequency-selective components in communications, radar and other microwave systems, and their performances affect overall system performances directly. Thus, it is critical to develop a compact and lightweight switch filter banks that can be applied to an unmanned aerial vehicle for electronic warfare, which is recently considered important in the defense industry. This paper introduces a high-performance wideband band pass filter fabricated by micro electromechanical systems (MEMS) process based on a high-resistance silicon substrate for low insertion loss. The center frequency of the filter is 4GHz, and it is designed in an inter-digital structure to have a fractional bandwidth of 100%. The fabricated filter has a volume of 6.95 mm × 4.7 mm × 0.42 mm and achieves an insertion loss of 4.0 dB, an attenuation of > 25 dB at 1.0 GHz and 7.5 GHz, and a return loss of < 10 dB.

Enhanced Robustness of a Bridge-Type Rf-Mems Switch for Enabling Applications in 5G and 6G Communications.

In this paper, new suspended-membrane double-ohmic-contact RF-MEMS switch configurations are proposed. Double-diagonal (DDG) beam suspensions, with either two or three anchoring points, are designed and optimized to minimize membrane deformation due to residual fabrication stresses, thus exhibiting smaller mechanical deformation and a higher stiffness with more release force than previously designed single diagonal beam suspensions. The two-anchor DDGs are designed in two different orientations, in-line and 90°-rotated. The membrane may include a window to minimize the coupling to the lower electrode. The devices are integrated in a coplanar-waveguide transmission structure and fabricated using an eight-mask surface-micro-machining process on high-resistivity silicon, with dielectric-free actuation electrodes, and including glass protective caps. The RF-MEMS switch behavior is assessed from measurements of the device S parameters in ON and OFF states. The fabricated devices feature a measured pull-in voltage of 76.5 V/60 V for the windowed/not-windowed two-anchor DDG membranes, and 54 V/49.5 V for the windowed/not-windowed three-anchor DDG membranes, with a good agreement with mechanical 3D simulations. The measured ON-state insertion loss is better than 0.7 dB/0.8 dB and the isolation in the OFF state is better than 40 dB/31 dB up to 20 GHz for the in-line/90°-rotated devices, also in good agreement with 2.5D electromagnetic simulations.

Thermal property evaluation of a 2.5D integration method with device level microchannel direct cooling for a high-power GaN HEMT device

Gallium nitride high electron mobility transistor (GaN HEMT) devices have become critical components in the manufacturing of high-performance radio frequency (RF) or power electronic modules due to their superior characteristics, such as high electron saturation speeds and high power densities. However, the high heat characteristics of GaN HEMTs make device level cooling a critical problem to solve since performance degradation or even failure may occur under high temperatures. In this paper, we proposed a 2.5D integration method with device-level microchannel direct cooling for a high-power GaN HEMT device. To demonstrate this technological concept, a multigate GaN HEMT device featuring a gate length/width/source drain spacing of 0.5 μm/300 μm/6 μm that underwent in-house backside thinning and metallization was used as the test vehicle. A high-resistivity silicon (HR Si) interposer embedded with four-layer microchannels was designed, having widths/pitches of 30 μm/30 μm at the top microchannel. The high-power GaN HEMT device was soldered on a Si interposer embedded with open microchannels for heat dissipation. A pair of GSG Pad chips was soldered simultaneously to display the capacity for the heterogeneous integration of other chip types. Thermal property evaluation was conducted with experiments and simulations. The test results showed that the maximum surface temperature of the GaN HEMT device decreased to 93.8 °C when it experienced a heat dissipation density of 32 kW/cm2 in the gate finger area and an average heat dissipation density of 5 kW/cm2 was found in the active area with the DI water coolant at a flow rate of 3 mL/min. To our knowledge, among recently reported works, this finding was the best cooling capacity of heterogeneously integrated microchannels for GaN HEMT devices. In addition, this technology was scalable regarding the numbers of gate fingers or GaN HEMT devices.

Development of photo-diodes for Pohang-Accelerator-Laboratory X-ray free-electron laser

The Pohang-Accelerator-Laboratory X-ray free-electron laser (PAL-XFEL) provides intense ultra-short X-ray pulses via a self-amplified spontaneous emission (SASE) process. Since fluctuations are induced by the intrinsic characteristics of the SASE process, we designed and fabricated photo-diodes (PDs) to be used in quadrant beam position and pop-in monitoring systems for measuring intensity and position, and beam size, respectively. Six 500μm-thick high-resistivity silicon wafers were used for different fabrication processes to vary the thicknesses of bias electrode and anti-reflective coating layers optimized for the quantum efficiency (QE) at typical wavelengths of 266 and 400 nm used for pump–probe experiments at the PAL-XFEL. In this paper, we present the electrical characteristics, QE, signal-to-noise ratio, energy resolution of the fabricated PDs, and compared them with those of commercial PD.

On the depletion behaviour of low-temperature covalently bonded silicon sensor diodes

Low temperature covalent direct wafer-wafer bonding allows for the fusion of multiple semiconductor wafers without any additional material at the bonding interface. In the context of particle pixel detectors this might provide an alternative to bump-bonding for joining sensors to readout chips. Previous investigations have shown that the amorphous layer formed at the interface during bonding is detrimental to charge propagation. To investigate the influence of the bonding interface on signal collection we have fabricated custom test structures by bonding high-resistivity N to high-resistivity P-type silicon wafers thus forming P-N junctions. Scanning transmission electron microscopy shows indeed the formation of ca. 3 nm wide amorphous layer at the interface. Using a scanning transient current technique (TCT) setup we were able to record generated signals. Illuminating our sample with light of different wavelengths and from different sides, indicates that the P side of the bonded structures can be fully depleted, but not the N side. This indicates a strongly asymmetric depletion behaviour which we attribute to the presence of the bonding interface.

Technology and thermomechanics in growing tubular silicon single crystals

The problem of growing high-resistance low-dislocation tubular silicon single crystals for non-planar manufacturing technologies of epitaxial p-n junctions and the production of new-generation power semiconductor devices is considered. The possibilities of Stepanov method for growing volumetric profiled crystalline products, the application of which is based on the use of shapers of various designs, are discussed. In particular, the shortcomings of shapers associated with the melt contamination by foreign particles and impurities are discussed. Therefore, the main attention is paid to the use of equipment that implements crystal growth from a melt without a shaper by Czochralski method. The processes of thermal mechanics are preliminary analyzed in relation to the existing and well-established process of growing polycrystalline highly dislocation silicon pipes of large diameter by Czochralski method for epitaxial reactors.It is noted that the growth of tubular low-dislocation small diameter silicon single crystals requires a significant modernization of the standard hot zone, which in this work is implemented for “REDMET-10” Czochralski furnace. By means of computer simulation, thermal mechanical processes are calculated for such a modernized Czochralski furnace. The parameters of grown tubular silicon single crystals are characterized, and their manufacturing suitability for power semiconductor devices using nonplanar technology is assessed.

Gate-Tunable Transmon Using Selective-Area-Grown Superconductor-Semiconductor Hybrid Structures on Silicon

We present a gate-voltage-tunable transmon qubit (gatemon) based on planar $\mathrm{In}\mathrm{As}$ nanowires that are selectively grown on a high-resistivity silicon substrate using III-V buffer layers. We show that low-loss superconducting resonators with an internal quality of $2\ifmmode\times\else\texttimes\fi{}{10}^{5}$ can readily be realized using these substrates after the removal of buffer layers. We demonstrate coherent control and readout of a gatemon device with a relaxation time, ${T}_{1}\ensuremath{\approx}700\phantom{\rule{0.2em}{0ex}}\mathrm{ns}$, and dephasing times, ${T}_{2}^{\ensuremath{\ast}}\ensuremath{\approx}20\phantom{\rule{0.2em}{0ex}}\mathrm{ns}$ and ${T}_{2,\mathrm{echo}}\ensuremath{\approx}1.3\phantom{\rule{0.2em}{0ex}}\ensuremath{\mu}\mathrm{s}$. Further, we infer a high junction transparency of $0.4$--$0.9$ from an analysis of the qubit anharmonicity.

Full-field high-resolution terahertz imaging based on a high-resistance silicon solid immersion lens.

The spatial resolution of the direct imaging system depends on the wavelength and the numerical aperture. In the terahertz (THz) waveband, the wavelength is relatively large, and the higher numerical aperture of the imaging system usually promises the possibility of achieving higher spatial resolution. Solid immersion technique is an effective method to expand the numerical aperture. We design and fabricate a hemisphere lens with high-resistance silicon to achieve the effect of solid immersion, and obtain full-field, high-resolution focal-plane imaging. The characteristics of the direct refraction imaging and the secondary reflection imaging are analyzed by ray-tracing calculations. And the field curvature of the equivalent object plane and the spot diagram on the vertical image plane of the lens are quantifiably evaluated. It is shown that the secondary reflection imaging can effectively reduce the geometric distortion and achieve more ideal imaging quality. The method of blocking different regions before and after the solid immersion lens is proposed to obtain a clear magnified image of a two-dimensional grating with the period of 300 µm. This method provides a powerful tool for THz full-field microscopic imaging.

Measurement of the Low-Temperature Loss Tangent of High-Resistivity Silicon Using a High- Q Superconducting Resonator

Even though silicon is widely used in superconducting quantum processors as the substrate upon which qubits are fabricated, the effect of silicon on the performance of the qubits is not fully understood. Using ultrahigh-quality microwave cavities to measure dielectric loss with parts-per-billion precision, the authors clearly show that using silicon is detrimental to qubit coherence time. The loss tangent found here is an order of magnitude worse than previously measured. This study sheds light on the physical mechanisms behind dissipation in silicon, and highlights the need for further work to fully understand the origin of these losses, and how to mitigate them.

Investigation on time-dependent behavior of resistivity in high-resistivity silicon wafers

As a cornerstone of 5G, high-resistivity silicon on insulator plays an important role in telecommunications. But it is still a great challenge to measure the resistivity of high-resistivity silicon wafer quickly and accurately. Comparing to other methods, four-point probe (4PP) techniques are considered as the preferable approach. The time-dependent behavior of high-resistivity silicon wafer were first observed during 4PP measurement and the variation of chemical elements on the wafer surface was studied by X-ray photoelectron spectrum. The resistivity of P-type silicon decreases with storage time, while that of N-type silicon increases, which can be attributed to the surface energy band bending due to the variation of the interface states during native oxidation on wafer surface. The first-principles calculation was carried out to observe the effect of interface states on the electrical properties. Based on mechanism of time-dependent behavior of high-resistivity silicon, a thermal treatment method was proposed to realize stable resistivity rapidly for high-resistivity silicon wafer.

Fabrication and Characterization of a Novel Varistor Based on AlInGaN/GaN Heterojunction Epitaxy on High Resistance Silicon (111) Substrates

A high-resistance Si-based AlInGaN/GaN heterojunction epitaxy specifying AlN/AlGaN laminated buffer layers and AlInGaN barrier layer with 45% Al composition was successfully produced to show a high electron density of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.93\times10$ </tex-math></inline-formula> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−2</sup> and mobility of 2829.24 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /Vs and based on which a novel varistor is proposed in this work. The varistor is composed with a narrow groove etched into the GaN channel and Ti/Al/Ni/Au (20/130/50/50 nm) metal electrodes attached to the epitaxy surface. The processes to fabricate the varistor were investigated in-depth, including a narrow groove etching based on dry-wet hybrid cyclic etching technology employing oxygen plasma and hydrochloric acid and an optimized metal electrodes ohmic contact process based on HCl:H <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O = 1:10 liquid surface treatment and annealing at 875 °C to achieve a low contact resistance of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.45 \Omega \cdot $ </tex-math></inline-formula> mm. The device with a groove width of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3 ~\mu \text{m}$ </tex-math></inline-formula> and length of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$600 ~\mu \text{m}$ </tex-math></inline-formula> exhibits typical varistor characteristics with opening voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{{\mathrm {ON}}}$ </tex-math></inline-formula> ) of 33.8 V and a high nonlinear coefficient of 82.97 in the current range from 1 to 10 mA. The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{{\mathrm {ON}}}$ </tex-math></inline-formula> value of the varistors is directly proportional to the narrow groove width with a scaling coefficient of 10.18 V/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> , which means <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{{\mathrm {ON}}}$ </tex-math></inline-formula> can be adjusted by altering the width of the groove. The varistor with a simple structure could be used in GaN on-chip integrated switches, electro-static discharge (ESD) protection, and other applications.

Ultra-Low-Loss and Broadband All-Silicon Dielectric Waveguides for WR-1 Band (0.75–1.1 THz) Modules

This study presents ultra-low-loss and broadband all-silicon dielectric waveguides for the WR-1 band (0.75–1.1 THz). The waveguides are built in high-resistivity silicon (10 kΩ-cm) and integrated with supportive frames fabricated from the same silicon wafer in a single etch process to achieve a compact design. We pursued low-loss, broadband, substrateless, unclad and effective medium waveguides. Smaller propagation losses of 0.3 dB/cm and 0.1 dB/cm were achieved for the unclad and effective medium waveguides, respectively. The 3 dB bandwidth was not encountered in the frequency range of interest and was as broad as 350 GHz. An unclad waveguide was employed to devise a Y-junction to demonstrate its practical applications in terahertz imaging. An integrated circuit card was successfully scanned. In addition, we developed unclad waveguide, effective medium waveguide, and Y-junction modules. The modules incorporated an input/output interface compatible with a standard WR-1 flange (254 μm × 127 μm). Unlike the conventional hollow waveguide modules, the unclad waveguide and effective medium waveguide modules reported total loss improvements of 6 dB and 8 dB, respectively, across the operation band. Our results provided a systematic way of achieving low-loss, compact, and versatile modules in the WR-1 band based on all-dielectric-waveguide platforms.

Bias-free terahertz generation from a silicon-compatible photoconductive emitter operating at telecommunication wavelengths

We present a telecommunication-compatible bias-free photoconductive terahertz emitter composed of a bilayer InAs structure directly grown on a high-resistivity silicon substrate. The bilayer InAs structure includes p+-doped and undoped InAs layers, inducing a strong built-in electric field that enables terahertz generation without requiring any external bias voltage. A large-area plasmonic nanoantenna array is used to enhance and confine optical generation inside the photoconductive region with the highest built-in electric field, leading to the generation of a strong ultrafast photocurrent and broadband terahertz radiation. Thanks to a higher terahertz transmission through the silicon substrate and a shorter carrier lifetime in the InAs layers grown on silicon, higher signal-to-noise ratios are achieved at high terahertz frequencies compared with previously demonstrated bias-free terahertz emitters realized on GaAs. In addition to compatibility with silicon integrated optoelectronic platforms, the presented bias-free photoconductive emitter provides more than a 6 THz radiation bandwidth with more than 100 dB dynamic range when used in a terahertz time-domain spectroscopy system.

Photonic Crystal Resonator in the Millimeter/Terahertz Range as a Thin Film Sensor for Future Biosensor Applications

With recent developments, terahertz (THz) technology has attracted great interest in many different fields of research and application. In particular, biosensors that detect a thin film of captured pathogens are in high demand for rapid diagnosis. Based on the interaction between analytes under test and electromagnetic (EM) field, THz resonators are sensitive to changes in the permittivity of the analyte and have the potential to become sensitive thin-film sensors. However, conventional metamaterial methods have low Q factors, leading to small amplitude variations and ambiguous detection. Here, we present a photonic crystal (PhC)–based resonator with a high Q factor that is sensitive to a monolayer of beads in the µm size range. The PhC resonator made of high resistivity silicon (HRSi) shows a Q factor of 750, which is much higher compared to metamaterial-based methods. Its resonance shift is linearly related to the coverage of the micron-sized beads on its surface. Moreover, simulation results with a thin film model of a single layer of the beads showed agreement with the experimental results. Although the achieved sensitivity needs to be improved by enhancing the field concentration on the analyte, our results suggest that THz PhC resonators with high Q factor are promising for biosensing applications. We anticipate our work to be a starting point for biochips with improved sensing capabilities and more functionality.