High Processing Power Research Articles

Neuronal Multi Unit Activity Processing with Metal Oxide Memristive Devices

AbstractIntra‐cortical brain‐machine interfaces (BMIs), able to decode neural activity in real‐time, represent a revolutionary opportunity for treating medical conditions. However, traditional systems focusing on single‐neuron spike detection require high processing rates and power, hindering the up‐scaling for neurons‐population monitoring in clinical application. An intriguing proposition is the memristive integrating sensor (MIS) approach, which uses resistive RAM (RRAM) for threshold‐based neural activity detection. MIS leverages analogue multi‐state switching properties of metal‐oxide RRAM to compress neural inputs by encoding above‐threshold events in resistance displacement, facilitating efficient data down‐sampling in the post‐processing, enabling low‐power, high‐channel systems. Initially tested on spikes and local field potentials, here MIS is adapted to process multi‐unit activity envelope (eMUA)—the envelope of entire spiking activity—which has recently been proposed as crucial input for real‐time neuro‐prosthetic control. Prior necessary modifications to the MIS for effective operation, this adaptation achieved over 95% sensitivity across two types of metal‐oxide devices: Pt/TiOx/Pt and TiN/HfOx/TiN, proving its platform‐agnostic capabilities. Furthermore, towards the integration of MIS with silicon chips, it is shown that it can reduce total system power consumption to below 1 µW, as RRAM encoding stage relaxes the signal preservation and noise requirements that challenge traditional complementary metal‐oxide‐semiconductor (CMOS) front‐ends. This eMUA‐MIS adaptation offers a viable pathway for developing more scalable and efficient BMIs for clinical use.

Using Time-Series Databases for Energy Data Infrastructures

The management of energy market data, such as load, production, forecasts, and prices, is critical for energy market participants, who develop in-house energy data infrastructure services to aggregate data from many sources to support their business operations. Energy data management frequently involves time sensitive operations, including rapid data ingestion, real-time querying, filling in gaps from missing or delayed data, and updating large volumes of timestamped and loosely structured data, all of which demand high processing power. Traditional relational database management systems (RDBMSs) often struggle with these operations, whereas time series databases (TSDBs) appear to be a more efficient solution, providing enhanced scalability, reliability, real-time data availability and superior performance. This paper examines the advantages of TSDBs over RDBMS for energy data management, demonstrating that TSDBs can either replace or complement RDBMSs. We present quantitative improvements in digestion, integration, architecture, and performance, demonstrating that operations such as importing and querying time-series energy data, along with the overall system’s efficiency, can be significantly improved, achieving up to 100 times faster operations compared to relational databases, all without requiring extensive modifications to the existing information system’s architecture.

Digital Implementation of Chaotic Systems UsingNvidia Jetson AGX Orin and Custom DAC Converter

Digital implementation of chaotic systems has numerous advantages, offering higher flexibility and computational accuracy compared to traditional analog systems. This is particularly important for engineering applications. Digital solutions are also more cost-effective. In this study, the Nvidia Jetson AGX Orin board and a 16-bit converter board are used for the digital realization of chaotic systems. The Nvidia Jetson AGX Orin provides high processing power and energy efficiency, while the 16-bit converter card ensures precise data processing. This setup allows for advanced, flexible, reliable, and economical solutions, enhancing various engineering applications, such as modeling, simulation, and control of complex systems. Digital platforms also facilitate parametric investigations and optimization processes, enabling more in-depth analysis.

Dynamic Power Saving for CMOS Circuits

With more functionalities being integrated into a microchip today, higher processing power is drawn. As a result of this, clock and logic power consumption has turned out to be a critical issue to be coped with by chip designers. In this paper, we present various power-saving approaches employed in complementary metal oxide semiconductor (CMOS) circuit designs. The approaches involve restructuring the logic circuits, performing clock gating, and selecting the appropriate circuits for counters and frequency divisions. In order to show their efficacies in power optimization, the approaches were applied to a phase-locked loop (PLL), clock divider (CD), full adder (FA), counter, arithmetic logic unit (ALU), and microprocessor without interlocked pipelined stages (MIPS) circuits and validated using Intel Quartus Prime Lite and Mentor Graphics Modelsim. The following conclusions can be drawn from the results: Firstly, the efficacy of minimizing power dissipation using logic restructuring is found to be in direct proportion with the rate of the switching activity (SA); secondly, a maximum of 3.5% of thermal power dissipation can be saved using clock gating; thirdly, gray counters give the lowest power consumption; and, finally, the thermal power estimation for the phase-locked loop (PLL) is relatively higher than that for the clock divider (CD) when both of them are implemented for dividing frequencies.

Fixed-Wing UAV Pose Estimation Using a Self-Organizing Map and Deep Learning

In many Unmanned Aerial Vehicle (UAV) operations, accurately estimating the UAV’s position and orientation over time is crucial for controlling its trajectory. This is especially important when considering the landing maneuver, where a ground-based camera system can estimate the UAV’s 3D position and orientation. A Red, Green, and Blue (RGB) ground-based monocular approach can be used for this purpose, allowing for more complex algorithms and higher processing power. The proposed method uses a hybrid Artificial Neural Network (ANN) model, incorporating a Kohonen Neural Network (KNN) or Self-Organizing Map (SOM) to identify feature points representing a cluster obtained from a binary image containing the UAV. A Deep Neural Network (DNN) architecture is then used to estimate the actual UAV pose based on a single frame, including translation and orientation. Utilizing the UAV Computer-Aided Design (CAD) model, the network structure can be easily trained using a synthetic dataset, and then fine-tuning can be done to perform transfer learning to deal with real data. The experimental results demonstrate that the system achieves high accuracy, characterized by low errors in UAV pose estimation. This implementation paves the way for automating operational tasks like autonomous landing, which is especially hazardous and prone to failure.

Prediction of influential nodes in social networks based on local communities and users’ reaction information

Identifying influential nodes is one of the basic issues in managing large social networks. Identifying influence nodes in social networks and other networks, including transportation, can be effective in applications such as identifying the sources of spreading rumors, making advertisements more effective, predicting traffic, predicting diseases, etc. Therefore, it will be important to identify these people and nodes in social networks from different aspects. In this article, a new method is presented to identify influential nodes in the social network. The proposed method utilizes the combination of users’ social characteristics and their reaction information to identify influential users. Since the identification of these users in the large social network is a complex process and requires high processing power and time, clustering and identifying communities have been used in the proposed method to reduce the complexity of the problem. In the proposed method, the structure of the social network is divided into its constituent communities and thus the problem of identifying influential nodes (in the entire network) turns into several problems of identifying an influential node (in each community). The suggested method for predicting the nodes first predicts the links that may be created in the future and then identifies the influential nodes based on an iterative strategy. The proposed algorithm uses the criteria of centrality and influence domain to identify this category of users and performs the identification process both at the community and network levels. The efficiency of the method has been evaluated using real databases and the results have been compared with previous works. The results demonstrate that the proposed method provides a more suitable performance in detecting the influential nodes and is superior in terms of accuracy, recall and processing time.

Federated Learning: Attacks and Defenses, Rewards, Energy Efficiency: Past, Present and Future

Federated Learning (FL) was first introduced as an idea by Google in 2016, in which multiple devices jointly train a machine learning model without sharing their data under the supervision of a central server. This offers big opportunities in critical areas like healthcare, industry, and finance, where sharing information with other organizations’ devices is completely prohibited. The combination of Federated Learning with Blockchain technology has led to the so-called Blockchain Federated learning (B.F.L.) which operates in a distributed manner and offers enhanced trust, improved security and privacy, improved traceability and immutability and at the same time enables dataset monetization through tokenization. Unfortunately, vulnerabilities of the blockchain-based solutions have been identified while the implementation of blockchain introduces significant energy consumption issues. There are many solutions that also offer personalized ideas and uses. In the field of security, solutions such as security against model-poisoning backdoor assaults with poles and modified algorithms are proposed. Defense systems that identify hostile devices, Against Phishing and other social engineering attack mechanisms that could threaten current security systems after careful comparison of mutual systems. In a federated learning system built on blockchain, the design of reward mechanisms plays a crucial role in incentivizing active participation. We can use tokens for rewards or other cryptocurrency methods for rewards to a federated learning system. Smart Contracts combined with proof of stake with performance-based rewards or (and) value of data contribution. Some of them use games or game theory-inspired mechanisms with unlimited uses even in other applications like games. All of the above is useless if the energy consumption exceeds the cost of implementing a system. Thus, all of the above is combined with algorithms that make simple or more complex hardware and software adjustments. Heterogeneous data fusion methods, energy consumption models, bandwidth, and controls transmission power try to solve the optimization problems to reduce energy consumption, including communication and compute energy. New technologies such as quantum computing with its advantages such as speed and the ability to solve problems that classical computers cannot solve, their multidimensional nature, analyze large data sets more efficiently than classical artificial intelligence counterparts and the later maturity of a technology that is now expensive will provide solutions in areas such as cryptography, security and why not in energy autonomy. The human brain and an emerging technology can provide solutions to all of the above solutions due to the brain's decentralized nature, built-in reward mechanism, negligible energy use, and really high processing power In this paper we attempt to survey the currently identified threats, attacks and defenses, the rewards and the energy efficiency issues of BFL in order to guide the researchers and the designers of FL based solution to adopt the most appropriate of each application approach.

40‐1: Development of the Auto Monitoring Method of Laser Beam Shape and Size by Employing the AI and Computer Vision Algorithm

The beam shape of the laser cut process to change the display shape is very important in the laser cutting quality, and the laser beam shape was measured by using the beam profiler as a measuring instrument. Since the beam profiler cannot be used due to damage caused by the high laser processing power used in mass production, the beam shape be managed that the sample was created by laser beam cross shot drawing on the material and it was manually measured by using a microscope. However, this method had problems with a long management period (measured once a month), a machine down for the measurement, the measurement deviation between engineers, and inability to manage history, so it was necessary to develop AI‐based shape automatic management technology. To solve this problem, an AI agent program with the AI technology to determine OK, NG of laser beam and the beam size measurement technology based on the image processing was developed and applied to the production line. Through this program, automatic management and history management of beam shape and size that was not possible with previous method have become possible. It was confirmed that the AI and image processing technologies developed through this study can be important technologies that can have a ripple effect on the development of other technologies.

Modification of a convolutional neural network for the weave pattern classification

The fabric quality in textile industry is characterized by the texture (weave pattern) as it plays a vital role for the production and design of best quality fabric. The earlier proposed automated weave identification methods based on image processing techniques are highly dependent on the lighting conditions. The machine learning methods have been reported to show better accuracy. However, they require very large training datasets, very high processing power and computation time. This study proposes improved accuracy with smaller dataset and reduced computation time by proposing a modification of VGG16 model by adding two additional pooling layers. Using evaluation metrics of both models, the modified model results were analysed according to accuracy, balanced accuracy, and F1-score. On the basis of investigational outcomes, a comparison has been performed with earlier work. The results show that the proposed VGG-16 model is capable to achieve state-of-the-art accuracy and avoid unnecessary activation features by freezing the main convolutional base layers. Ultimately, as evidenced by the performance of the modified VGG-16 deep learning model, the proposed method demonstrated improved accuracy. The study results show that the proposed modified VGG16 algorithm is able to recognize the features of provided database with 90% accuracy and F1-Score ranging from 0.8 to1.

Parallel- and micro-beamforming challenges in real-time, high-frame-rate, ultrasound imaging

Delay-and-sum beamforming for classic (line-by-line) ultrasound imaging is usually performed in real-time by FPGAs and GPUs. However, when a high-frame-rate (HFR) has to be achieved, beamforming becomes challenging. Here, the echoes following the transmission of multi-line focused beams, plane waves, or diverging waves, must be simultaneously beamformed along multiple view lines. Such parallel beamforming is feasible online when the scanner is endowed with high flexibility and processing power. This talk will show how the FPGAs of the ULA-OP 256, a hardware-based open scanner, were efficiently utilized to enable parallel beamforming at high speed. The talk will also discuss how the data transfer between the scanner boards impacts the frame rate, which actually achieved 4400 frames per second through a new communication topology. The talk will also examine the image quality deterioration emerging when HFR imaging sequences are implemented in probes equipped with a microbeamformer (uB) that was designed for focused beam transmission. Simulations show how the transmitted beamwidth and uB size impact the image contrast and resolution, taking into account that the uB ASIC cannot handle multiple sets of delays and apodization weights after each transmit event. Technological improvements needed in the next generation uBs will be finally discussed.

Implementing Virtualization on Single-Board Computers: A Case Study on Edge Computing

The widespread adoption of cloud computing has resulted in centralized datacenter structures; however, there is a requirement for smaller-scale distributed infrastructures to meet the demands for speed, responsiveness, and security for critical applications. Single-Board Computers (SBCs) present numerous advantages such as low power consumption, low cost, minimal heat emission, and high processing power, making them suitable for applications such as the Internet of Things (IoT), experimentation, and other advanced projects. This paper investigates the possibility of adopting virtualization technology on Single-Board Computers (SBCs) for the implementation of reliable and cost-efficient edge-computing environments.The results of this study are based on experimental implementations and testing conducted in the course of a case study performed on the edge infrastructure of a financial organization, where workload migration was achieved from a traditional to an SBC-based edge infrastructure. The performance of the two infrastructures was studied and compared during this process, providing important insights into the power efficiency gains, resource utilization, and overall suitability for the organization’s operational needs.

Edge Computing Framework for Enhanced Robotic Adaptivity in Line-Less Mobile Assembly Systems

In response to the shortage of skilled workers and the increasing diversity of products and variants, integrating adaptive and flexible mobile manipulators into line-less mobile assembly systems (LMAS) stands out as a promising solution. To fully benefit from these robotic systems in LMAS, offloading computationally intensive tasks from mobile manipulators to edge computing systems is essential. This offloading of computational tasks not only lightens the processing load on individual robots but also enhances AI based perception, improving the overall system capabilities in dynamic manufacturing environments. Achieving these goals requires a robotic edge computing framework that serves as the key to flexible and adaptive mobile manipulation in LMAS. To construct such an edge computing framework, a comprehensive set of building blocks is required. These building blocks include a powerful edge system with high processing power, sensor-equipped mobile manipulators with the ability to perceive the environment, and a robust edge-to-robot connectivity. A comprehensive software stack, including software modules for localization and navigation in dynamic assembly environments, AI perception for precise pose estimation of assembly components, and motion planning for interaction between manipulators and assembly components, is crucial. Furthermore, virtualization techniques, a comprehensive deployment strategy, and a detailed description of robot hardware, site, and resources are essential. The proposed edge computing framework presents a solution that addresses mobile manipulators in LMAS and paves the way towards advanced industrial automation. Through implementation in a research assembly environment, the realized proof-of-concept showcased the feasibility of the proposed edge computing framework in a real-world pick-and-place scenario, highlighting its potential to enhance adaptivity and flexibility. There is a potential to refine and expand the framework to accommodate a broader range of industrial applications and streamline diverse manufacturing processes through the integration of mobile manipulators and edge computing within industrial settings.

A New Method for Intelligent Multimedia Compression Based on Discrete Hartley Matrix

Multimedia data (video, audio, images) require storage space and transmission bandwidth when sent through social media networking. Despite rapid advances in the capabilities of digital communication systems, the high data size and data transfer bandwidth continue to exceed the capabilities of available technology, especially among social media users. The recent growth of multimedia-based web applications such as WhatsApp, Telegram, and Messenger has created a need for more efficient ways to compress media data. This is because the transmission speed of networks for multimedia data is relatively slow. In addition, there is a specific size for sending files via email or social networks, because much high-definition multimedia information can reach the Giga Byte size. Moreover, most smart cameras have high imaging resolution, which increases the bit rate of multimedia files of video, audio, and image. Therefore, the goal of data compression is to represent media (video, audio, images, etc.) as accurately as possible with the minimum number of bits (bit rate). Traditional data compression methods are complex for users. They require a high processing power for media data. This shows that most of the existing algorithms have loss in data during the process of compressing and decompressing data, with a high bitrate for media data (video, audio, and image). Therefore, this work describes a new method for media compression systems by discrete Hartley matrix (128) to get a high speed and low bit rate for compressing multimedia data. Finally, the results show that the proposed algorithm has a high-performance speed with a low bit rate for compression data, without losing any part of data (video, sound, and image). Furthermore, the majority of users of social media are satisfied with the data compression interactive system, with high performance and effectiveness in compressing multimedia data. This, in turn, will make it easier for users to easily send their files of video, audio, and images via social media networks.

Exploring the Feasibility of Parallel I2c Sensor Interfacing on an Educational FPGA Board: Resource Utilization Analysis and Design Considerations

The goal of this work is to showcase the capabilities of Field Programmable Gate Arrays (FPGAs) as powerful reconfigurable computing devices for educational and research purposes. The work will demonstrate the high processing power of an FPGA by controlling multiple I2C buses to and from peripheral sensors. The article will provide a guide on implementing a state machine in VHDL hardware description language and will present the response of the sensors and the working capacity of Basys 3 FPGA. The I2C signals will be visualized using a Logic Analyzer and explained. The conclusion of the article will highlight the capabilities of FPGAs and explore the potential for their use in other complex tasks. Keywords: FPGA, sensor, I2C, fast processing, resource usage.

Artificial Intelligent-Based Wake Word Detection at Edge Device

Deep Neural Network based wake word (such as Hi Alexa or Hey Siri) systems allow increasingly accurate speech communication between humans and machines. However, this setup requires high processing power or cloud services which may not be accessible by edge devices. Currently, the accuracy of machine learning methods for cloudless edge devices in voice activation hovers below 90%. This paper explores wake word implementation on edge devices using a 2-Dimensional Convolutional Neural Network (CNN) with improved and balanced accuracy and latency. The proposed CNN model is created, trained and quantized using TensorFlow on a PC and exported to a Raspberry Pi Zero 2 W. The quantization method reduces the model size by 20% and spectral gating is adopted to lower wake word inaccuracy detection in moderately noisy environment. The proposed system achieved more than 90% wake word detection accuracy across 30 to 50 dB background noise with an average of 1.03 second of response time for the intended user. The result shows low-powered edge device still offers competitive performance for detecting wake word without cloud services.

Desarrollo de arquitectura SoPC para robot móvil basado en FPGA

In the context of the rapid progress in the field of mobile robotics, the need for efficient systems with high embedded processing power has emerged as a fundamental challenge. This paper addresses this issue by using FPGAs, devices underutilized in the literature for the development of architectures with H/S (hardware/software) co-design in mobile robots. The suitability of FPGAs for this purpose is highlighted, as they offer a balance between efficiency and low power consumption. The paper focuses on the implementation of a SoPC (System on Programmable Chip) based architecture designed specifically for an FPGA-based differential drive mobile robot. The most relevant aspects of the design are presented by means of diagrams illustrating the layout and interconnection of key components. The practical implementation of this architecture was carried out on a mobile robot whose processing unit is a DE0 Nano development board equipped with a Cyclone® IV FPGA. The results obtained reveal a successful behavior of the architecture in terms of interfacing with sensors, actuators, and data processing. The efficiency of the design is reflected in the balanced occupation of resources in the FPGA, highlighting the 67% of logical area still available for future implementations of modules for hardware acceleration. This paper demonstrates the feasibility and efficiency of FPGAs in the design of advanced architectures for mobile robots, providing a solid foundation for future research and development in the field of robotics.

Suspicious Activity Classification in Classrooms using Deep Learning

Video processing is attracting the attention of both research and industry. The existence of intelligent surveillance cameras with high processing power has paved the way for designing intelligent visual surveillance systems. Along with analyzing video for information recovery, it is nowadays used to analyze live surveillance video to detect activities. These systems are implemented in real time. The proposed work's goal is to create a method that can examine and discover suspicious behaviors in the lecture room environment. Video analytics offers the most efficient answer because it enables pointing an occasion and retrieves applicable statistics from the video recorded. The method aims to identify suspicious activities like fighting, sleeping, looking elsewhere, eating, etc. that the students might be doing. The proposed method involves breaking a video input into frames and converting it into image data because the model has been trained on images collected from the internet. Several models were tested and experimented with, including efficientnet_b2, spnasnet_100, efficientnet_b3, and mobilenetv3_large_100. Parameters such as the Learning Rate were optimized to find out the best method and create a system with the best results.

Reduced CPU Workload for Human Pose Detection with the Aid of a Low-Resolution Infrared Array Sensor on Embedded Systems

Modern embedded systems have achieved relatively high processing power. They can be used for edge computing and computer vision, where data are collected and processed locally, without the need for network communication for decision-making and data analysis purposes. Face detection, face recognition, and pose detection algorithms can be executed with acceptable performance on embedded systems and are used for home security and monitoring. However, popular machine learning frameworks, such as MediaPipe, require relatively high usage of CPU while running, even when idle with no subject in the scene. Combined with the still present false detections, this wastes CPU time, elevates the power consumption and overall system temperature, and generates unnecessary data. In this study, a low-cost low-resolution infrared thermal sensor array was used to control the execution of MediaPipe’s pose detection algorithm using single-board computers, which only runs when the thermal camera detects a possible subject in its field of view. A lightweight algorithm with several filtering layers was developed, which allowed the effective detection and isolation of a person in the thermal image. The resulting hybrid computer vision proved effective in reducing the average CPU workload, especially in environments with low activity, almost eliminating MediaPipe’s false detections, and reaching up to 30% power saving in the best-case scenario.

FPGA-based Deep Learning Inference Accelerators: Where Are We Standing?

Recently, artificial intelligence applications have become part of almost all emerging technologies around us. Neural networks, in particular, have shown significant advantages and have been widely adopted over other approaches in machine learning. In this context, high processing power is deemed a fundamental challenge and a persistent requirement. Recent solutions facing such a challenge deploy hardware platforms to provide high computing performance for neural networks and deep learning algorithms. This direction is also rapidly taking over the market. Here, FPGAs occupy the middle ground regarding flexibility, reconfigurability, and efficiency compared to general-purpose CPUs, GPUs, on one side, and manufactured ASICs on the other. FPGA-based accelerators exploit the features of FPGAs to increase the computing performance for specific algorithms and algorithm features. Filling a gap, we provide holistic benchmarking criteria and optimization techniques that work across several classes of deep learning implementations. This article summarizes the current state of deep learning hardware acceleration: More than 120 FPGA-based neural network accelerator designs are presented and evaluated based on a matrix of performance and acceleration criteria, and corresponding optimization techniques are presented and discussed. In addition, the evaluation criteria and optimization techniques are demonstrated by benchmarking ResNet-2 and LSTM-based accelerators.

PredDRBP-MLP: Prediction of DNA-binding proteins and RNA-binding proteins by multilayer perceptron

Proteins interact with many molecules in order to maintain the vital activities in cells. Proteins that interact with DNA are called DNA-binding proteins (DBP), and proteins that interact with RNA are called RNA-binding proteins (RBP). Since DBPs and RBPs are involved in critical biological processes, their classification is quite important. Although the convolutional neural network and bidirectional long-short-term memory hybrid model (CNN-BiLSTM) is very popular in DBP and RBP classification, it has problems such as requirement of high processing power and long training time. Therefore, a multilayer perceptron (MLP) based predictor, PredDRBP-MLP (Predictor of DNA-Binding Proteins and RNA-Binding Proteins - Multilayer Perceptron) was developed in this study. PredDRBP-MLP is an artificial learning model that performs multi-class classification of DBPs, RBPs and non-nucleic acid-binding proteins (NNABP). PredDRBP-MLP achieved quite successful results on the independent dataset, specifically in the NNABP class, compared to the existing predictors, in addition to requiring lower processing power and being able to train quicker compared to CNN-BiLSTM based predictors. In NNABP class, PredDRBP-MLP predictor achieved 0.578 precision, 0.522 recall and 0.549 F1-score, while other multi-class predictor achieved 0.486 precision, 0.183 recall and 0.266 F1-score. A desktop application was developed for PredDRBP-MLP. The application is freely accessible at https://sourceforge.net/projects/preddrbp-mlp.