High-power Bipolar Transistors Research Articles

Accelerated Testing of High Power Transistors for Long Operation when Solving Problems of Prediction of their Reliability by the Method of Imitation Simulation

When evaluating the individual reliability of semiconductor devices by gradual failures for a given operating time, the value of the electrical parameter of a particular instance for this operating time is predicted using the simulation method. To obtain a prediction of an electrical parameter, it is necessary to have a simulation model in the form of a function of the relationship between a given operating time and the level of simulation impact. The simulation model is obtained with the help of preliminary studies (training experiment) of a training sample of semiconductor devices of the type of interest with the volume of approximately 50 ... 100 copies. The application of the model is reduced to the calculation of the level of simulation impact corresponding to a given operating time. The result of measuring the electrical parameter at the calculated level of the imitation impact in a new specimen of the same type that did not take part in the training experiment should be considered as a prediction of this parameter for a given operating time. An integral part of the preliminary research to obtain a simulation model is the testing of semiconductor devices of the training set for a long operating time, which can be tens of thousands of hours, which necessitates planning and conducting accelerated tests. The article substantiates the conditions for conducting accelerated forced tests in relation to high-power bipolar transistors of the KT872A type. The increased temperature and the reverse voltage applied to the collector junction of the transistors are chosen as factors accelerating the tests. The test acceleration coefficient is calculated relative to the operating mode of the transistors. Based on the results of the accelerated tests for the electrical parameter (collector-emitter saturation voltage), a mathematical model was obtained in the form of a dependence of its average value on the operating time. The presence of this model is necessary to determine the function of recalculating the given operating time of transistors to the value of the simulation impact.

Individual prediction of the reliability of high power transistors for electronic devices of medical purposes

When assembling electronic complexes for medical purposes, it is important to install highly reliable semiconductor devices in electronic equipment. Experimental studies and the example of high-power bipolar transistors in this work show how you can select copies of an increased level of reliability for their subsequent installation in critical electronic devices. To select highly reliable samples, individual forecasting was used according to informative parameters measured for a particular sample at the initial moment in time. Experimental studies (training experiment) included measuring at the initial moment of time for each sample of transistors of electrical parameters, which may contain information on reliability, and then conducting accelerated tests of transistors for reliability for a time corresponding to normal operating conditions specified in the technical documentation. The training experiment is performed once and used to obtain a predictive rule, which is applied to other similar samples that did not participate in the training experiment. To obtain a predictive rule, the method of majority logic was used. Prediction is performed in the form of assigning a specific sample to the class of highly reliable samples for a given future operating time. To perform prediction, the values of the informative parameters are measured at the initial moment of time for a particular sample of interest, they are converted into binary numbers (zero or one) using the threshold values found from the results of the training experiment, and the decision on the correspondence of the sample to the class of highly reliable transistors is made by a set of binary numbers. To classify a sample as a highly reliable one, it is sufficient that the number of ones exceeds the number of zeros in the resulting set of binary numbers.

A Bipolar Transistor-Based High-Power Chaotic Oscillator with Selected Inertia

The feasibility of creating a high-power wideband source of chaotic microwave signals that is constructed around a single high-power bipolar transistor has been demonstrated for the first time. This has become possible after implementing a selected-inertia oscillator. Theoretical calculations supporting the idea of fabricating such an oscillator are presented. A hybrid integrated prototype of a selected-inertia chaotic oscillator that is based on a 2T982A-2 high-power transistor has been designed. The feasibility of generating chaotic microwave signals with a center frequency of 4.55 GHz and an overall power of 1.1 W has been proved. The effective width of the chaotic signal power spectrum equals 11% at a spectral characteristic ripple of 3 dB, the spectral density of noise oscillations is 2.2 × 10–3 W/MHz, and the e1fficiency is 15%.

Individual forecasting of reliability of bipolar transistors by using electrical voltage as a simulation factor

Individual forecasting of the reliability of semiconductor devices, taking into account gradual failures, is an urgent task, as it allows you to choose highly reliable instances for critical electronic devices of long-term functioning. In relation to bipolar transistors, an approach is proposed that allows us to solve this problem by using the voltage applied to the collector-emitter junction as a simulated effect. Using the example of highpower bipolar transistors of the KT872A type, it is shown how the problem is solved. For the sample of transistors of this type using the results of a training experiment, two equations were obtained to describe the electrical parameter under consideration (a static base current transfer coefficient in a circuit with a common emitter), the value of which judges the absence or presence of a gradual failure for a specific instance. The first equation shows how the electrical parameter changes on average depending on the voltage applied to the collector – emitter junction. The second equation describes the average degradation of the electrical parameter during long-term operating time of transistors. Based on these two equations, a simulation model of the reliability of bipolar transistors of the type in question is obtained in the form of a communication function that shows what level of simulation voltage corresponds to a given operating time. As applied to the transistors of the type under consideration, the obtained simulation model allows us to individually predict reliability by the gradual failures of the same type of samples that did not participate in the training experiment. To do this, first determine the value of the simulation voltage corresponding to a given operating time. This is achieved by substituting a given operating time into the model. The individual forecasting of the reliability of a new onetype instance consists in measuring the electrical parameter of this instance at a voltage on the transistor collector corresponding to the calculated simulation value, and comparing the measurement result with the norm set on the electrical parameter.

High-efficiency on-line measurement of junction temperature based on bipolar transistors in accelerated experiment

Junction temperature is an important factor affecting the reliabilities of semiconductor devices. Usually, the method of measuring the junction temperature is not tested on-line. However, due to the fact that neither contact thermal resistance nor thermal resistance varying with temperature is taken into account, there exists an error in the off-line measurement. A way to solve the problem of off-line measurement is to measure the junction temperature on-line. In this paper, we propose an electrical method of measuring the temperature rise of high-power bipolar transistor in the working condition. The measurement method is based on a good linear relationship between base-emitter voltage (Vbe) and temperature during the steady-state. Taking the model 2N3055 of bipolar high power transistor for example, in this paper we study the relationship between base-emitter voltage (Vbe) and temperature under the conditions of constant collector-emitter voltage (Vce) and collector-current (Ice). During the experiment, the device is placed in a thermostat. A voltage is applied to the device collector, a current is applied to the base, and the emitter is earthed. Before the device is measured, we set different temperatures and make sure that the equipment is in a steady state. In order to avoid the effect of self-heating, the pulse current is used in the experiment. The pulse width and the period are 500 μups and 1 ms, respectively.The research result shows that the base-emitter voltage (Vbe) decreases linearly with temperature increasing and the base-emitter current is changed below 4% when the temperature is in a range of 40 ℃-140 ℃. In this paper we also deduce the mathematical expressions for base-emitter voltage (Vbe) and temperature under a steady state. It is proved that the Vbe-temperatrue curve is linear and temperature error is less than 0.5 ℃ when the changes of base current value does not exceed 4%. Therefore, in this paper we deduce a new method of testing the junction temperature in the speeding up measurement experiment. By measuring any of the reference points on the calibration curve under certain experimental conditions, the junction temperature can be calculated quickly according to the proposed formula.Finally, the phase 11 is used to verify the proposed method. We measure the thermal resistance upper the case for the junction of model 2N3055 and the thermal resistance under the case for the junction of model 2SD1047. The measurement results of phase11are compared with the junction temperature calculated using the test formula. The results show that the error of junction temperature between the two methods is less than 0.7%, which is corresponding with the needs of practical application. It proves the correctness and feasibility of the method.

Thermoelectric models of high-power bipolar semiconductor devices. Part I. Model of a high-frequency transistor with defects

A generalized thermoelectric model of a bipolar semiconductor device that takes into account thermoelectric feedback and the presence of various macrodefects is proposed. It is used to develop thermoelectric models of high-frequency high-power bipolar transistor (PBT) with electrophysical and thermophysical defects. The dependences of the maximum overheating of the working surface of crystal on the defect size and position are obtained. It is demonstrated that the temperature dependence of the power density emitted in the PBT structure leads to a nonlinear dependence of the maximum and mean temperatures of the crystal surface on the PBT power consumption. The calculated results are in reasonable agreement with the experimental dependences of the junction—housing thermal resistances of particular PBTs on the scattered power.

Radiation-heat treatment of high-power bipolar transistors with anti-multiplication layer

Radiation-heat treatment of high-power bipolar transistors with anti-multiplication layer

Generator of chaotic microwave oscillations based on a high-power bipolar transistor

A chaotic microwave autooscillatory system has been designed, implemented on a high-power bipolar transistor (2T 982 A-2), and studied. The experiments showed stable generation of chaotic oscillations in a 5.26–5.44 GHz range with a spectral power density of 1.3 × 10−3 W/MHz.

Monitoring of the current-distribution uniformity in bipolar transistors from the dependence of internal-feedback factor on collector voltage

On the basis of the two-section model of a high-power bipolar transistor, it is shown that the slope of dependence of the small-signal feedback coefficient on the collector voltage in the presence of defects in the transistor is proportional to the defect size. The setup for the automated monitoring of the current-distribution nonuniformity in the transistor device structure from the indicated dependence with using the combination of linearly increasing and small harmonic variations in the collector voltage is described. The experimental dependences confirming the results of the theoretical analysis are presented.

1600 V, 5.1 mΩ●cm<sup>2</sup> 4H-SiC BJT with a High Current Gain of β=70

This paper reports a newly achieved best result on the common emitter current gain of 4H-SiC high power bipolar junction transistors (BJTs). A fabricated 1600 V – 15 A 4H-SiC power BJT with an active area of 1.7 mm2 shows a high DC current gain (b) of 70, when it conducts 9.8 A collector current at a base current of only 140 mA. The maximum AC current gain (DIC/DIB) is up to 78. This high performance BJT has an open base collector-to-emitter blocking voltage (VCEO) of over 1674 V with a leakage current of 1.6 μA, and a specific on-resistance (RSP-ON) of 5.1 mW.cm2 when it conducts 7.0 A (412 A/cm2) at a forward voltage drop of VCE = 2.1 V. A large area 4H-SiC BJT with a footprint of 4.1 mm x 4.1 mm has also shown a DC current gain over 50. These high-gain, high-voltage and high-current 4H-SiC BJTs further support a promising future for 4H-SiC BJT applications.

Self-heating in multi-emitter SiGe HBTs

High power bipolar transistors often have multiple emitters, to achieve high currents, and efficient use of the whole emitter area. The emitters experience high current densities and are self-heated above the ambient temperature, leading to concerns about thermal run-away and damage to the device. Here we use a multi-emitter SiGe HBT, with multiple emitter contacts, to examine the temperature distribution in the emitters in such devices. We have measured the temperature increase in different emitters by biasing one emitter at a time and using the other base–emitter junctions as thermometers. We show that use of a selectively implanted collector does not alter the temperature increase or thermal coupling between the emitters.

High Power (500V-70A) and High Gain(44-47) 4H-SiC Bipolar Junction Transistors

This paper reports high power 4H-SiC BJTs with record high current handling capabilities. Wet-oxygen low-temperature re-oxidation and aluminum-free Ohmic contacts were applied in the fabrication processing. Up to 7A(Jc=583A/cm 2 ) with a single BJT cell has been achieved at V CE =5.5V. The peak DC common emitter current gain reached 47 at Ic=4.7A (Jc=392A/cm 2 ) and Vce=6.5V. The open base blocking voltage (Vceo) reached up to 858V with 1mA leakage current. The specific on-resistance was measured to be 8.7m Ω·cm 2 up to Ic=5.5A (Jc=458A/cm 2 ) at Vce=4.0V. At 150 o C, the peak current gain was still as high as 36 at Ic=3.6A at Vce=10V. The specific on-resistance at 150 o C was 13.2m Ω·cm 2 up to Ic=4.0A (Jc=333A/cm 2 ) at Vce=4.4V. At 100 o C, the open base blocking voltage was measured up to 875V with 1mA leakage current. A 4H-SiC BJT package containing nine similar BJT cells was also fabricated and tested. The highest collector current was measured up to 70A. The peak DC current gain was 44.3 at Ic=44.3A(Jc=410A/cm 2 ) and Vce=5.5V. The open base blocking voltage for the package at 500V showed a leakage current of 8mA. Its inductively-loaded half-bridge switching results are also reported.

Temperature distribution and heating in multiple emitter SiGe HBTs

High power bipolar transistors require the use of multiple emitters which, at high current densities, show significant self-heating and temperature increases. In this study we use a multiemitter SiGe HBT, with multiple emitter contacts, to examine the temperature distribution in the emitters in such a device. By biasing one emitter at a time and using the other base-emitter junctions as thermometers we have measured the temperature increase in different emitters and effectively the thermal coupling between the emitters. We compare the data with simulations for a simple thermal model.

A high current gain 4H-SiC NPN power bipolar junction transistor

This work reports the development of high power 4H-SiC bipolar junction transistors (BJTs) by using reduced implantation dose for p+ base contact region and annealing in nitric oxide of base-to-emitter junction passivation oxide for 2 hours at 1150/spl deg/C. The transistor blocks larger than 480 V and conducts 2.1 A (J/sub c/=239 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ) at V/sub ce/=3.4 V, corresponding to a specific on-resistance (R/sub sp on/) of 14 m/spl Omega/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , based on a drift layer design of 12 μm doped to 6×10/sup 15/cm/sup -3/. Current gain /spl beta//spl ges/35 has been achieved for collector current densities ranging from J/sub c/=40 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> to 239 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> (I/sub c/=2.1 A) with a peak current gain of 38 at J/sub c/=114 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

Investigation of thermal properties in fabricated 4H-SiC high power bipolar transistors

Silicon carbide bipolar junction transistors have been fabricated and investigated. The transistors had a maximum current gain of approximately 10 times, and a breakdown voltage of 450 V. When operated at high power densities the device showed a clear self-heating effect, decreasing the current gain. The junction temperature was extracted during self-heating to approximately 150 °C, using the assumption that the current gain only depends on temperature. Thermal images of a device under operation were also recorded using an infrared camera, showing a significant temperature increase in the vicinity of the device. The device was also tested in a switched setup, showing fast turn on and turn off at 1 MHz and 300 V supply voltage. Device simulations have been used to analyze the measured data. The thermal conductivity is fitted against the self-heating, and the lifetime in the base is fitted against the measurement of the current gain.

Investigation of Thermal Properties in Fabricated 4H-SiC High-Power Bipolar Transistors

Silicon Carbide bipolar junction transistors have been fabricated and investigated. The transistors had a maximmn current gain of approximately 10 times, and a breakdown voltage of up to 600 V. When operated at high power densities the device showed a clear self-heating effect, decreasing the current gain. The junction temperature was extracted during self-heating to approximately 150 °C, using the assumption that the current gain only depends on temperature. Thermal images of a device under operation were also recorded using an infrared camera, showing a significant temperature increase in the vicinity of the device. Physical device simulations have been used to analyze the measured data. The thermal conductivity is fitted to model the measured self-heating, and the lifetime in the base is fitted against the measurement of the current gain.

Exploiting electro-thermal resonance in high voltage power bipolar devices

It is theoretically and experimentally proven that the fast heating mechanism that takes place in high voltage power bipolar transistors can be coupled with the electrical dynamics to obtain stable electro-thermal oscillations. Finding such a resonance condition allows the experimental extraction of fast thermal transient parameter values.

A five-port deembedding method for floating two-port networks

Radio frequency (RF) high-power bipolar transistors are often constructed with the collector accessible at the bottom of the device. Characterization is carried out substrate mounted devices. The classical methods developed for the on wafer capacitance-voltage (CV) and alternating current (ac) measurement of grounded devices are then no longer applicable. A (general) deembedding algorithm is presented in which the medium surrounding the transistor is taken to be a generic five port and the transistor is treated as a floating two port. Using this approach, one can model a wide variety of configurations, including coupled lines, bondwire complexes with mutual coupling, vies and packages enabling one pass deembedding. Use of this algorithm facilitates an integrated approach improving accuracy and speed. Implementation of the five-port algorithm in HP's-microwave design software, MDS, and HP's parameter extraction software, IC-CAP as well as its application to high-frequency power transistor modeling are described.

1 W Ku-band AlGaAs/GaAs power HBT's with 72% peak power-added efficiency

High power and high-efficiency multi-finger heterojunction bipolar transistors (HBT's) have been successfully realized at Ku-band by using an optimum emitter ballasting resistor and a plated heat sink (PHS) structure. Output power of 1 W with power-added efficiency (PAE) of 72% at 12 GHz has been achieved from a 10-finger HBT with the total emitter size of 300 /spl mu/m/sup 2/. 72% PAE with the output power density of 5.0 W/mm is the best performance ever reported for solid-state power devices with output powers more than 1 W at Ku-band.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Spectral characteristics of resonant-link inverters

The limitations on the operating frequency of hard switched and resonant link inverters are studied. The maximum operating frequency of a hard switched inverter is found to be well defined by the allowed power dissipation due to on-state and switching losses. For resonant link inverters the upper limit is not as well defined and depends upon a trade-off between a number of different factors. For a system using high power bipolar transistors, it is seen that a resonant line system may achieve switching frequencies approximately ten times greater than those possible with a comparable hard switched inverter. The frequency spectrum of the resonant line configuration was compared with PWM (pulse width modulation). It was shown that the improvement in harmonic distortion associated with a delta modulated resonant link inverter is not as great as may be expected from the increase in link frequency that may be obtained. This is a result of constraints placed on switching instants and the need to use integral pulse modulation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>