High-performance Voltage-controlled Oscillator Research Articles

Design of 50-GHz Low Phase Noise VCO Employing Two-Branches DGS Resonator in 0.18-μm CMOS Technology

This letter presents a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula> -band low phase noise voltage-controlled oscillator (VCO) design using a novel integrated two-branches defected ground structure (DGS) resonator in 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> complementary metal-oxide-semiconductor (CMOS) technology. The proposed DGS resonator is realized in the top metal layer (M6) which has not only a higher quality factor than its predecessors but is also effective to reduce the length of interconnects. The measured carrier frequency and phase noise are 49 GHz and −122.05 dBc/Hz (−102.58 dBc/Hz) at 10-MHz (1-MHz) offset frequencies, respectively. The VCO core consumes 5.5 mW of dc power from the dc supply, which results in a figure of merit (FoM) of −189 dBc/Hz. The proposed VCO using the two-branches DGS resonator may give an alternative low-cost solution for designing a high-performance VCO or frequency synthesizer at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V$ </tex-math></inline-formula> -band and beyond.

Design and Optimization of High Performance K-band Voltage Controlled Oscillator

A high performance voltage-controlled oscillator (VCO) fabricated in TSMC 90nm CMOS process is designed. Design methods of VCO and its buffer are demonstrated. Furthermore, simulation results of VCO are presented. The VCO and its buffer proposed are integrated into a K-band phase-locked loop (PLL). The proposed VCO including buffer consumes only 27mW from a 1.2V power supply and occupies chip area of 540um×360um. The measurement results exhibit phase noise could achieve -93.5dBc/Hz at 1MHz frequency offset. The measured tuning range of VCO is 22.7GHz-28.6GHz.

High Frequency Power Optimized Ring Voltage Controlled Oscillator for 65nm CMOS Technology-Review

Voltage Controlled Oscillator (VCO) is key building block of Phase Locked Loop (PLL) and Radio Frequency (RF) communication system. The design of high performance VCOs has been increasingly more important and still is an active research area. Research on VCOs for the past decade has been concentrated in the areas of higher frequency, lower phase noise, low power, low operating voltage, and increased tuning range. Among the architectures of VCO, Ring Oscillator shows better performance so it is selected for the research. The VCO exhibit at high frequency tuning range from 1.06-1.17GHz; its power consumption is only 8.63mW.The circuit is simulated in Tanner Tool version-13environment. The optimization design and layout are done using S-EDIT software to make the oscillator as small as possible. In addition, T-spice and W-EDIT tools are used in the analysis and simulation to verify the predicted performance. Index Terms- CMOS, Phase noise, ring oscillator, voltage controlled oscillator (VCO).

A phase-noise reduction technique for RF CMOS voltage-controlled oscillator with a series LC resonator

This paper proposes a novel phase-noise reduction technique for high performance voltage-controlled oscillator (VCO) using a cross-coupled series LC resonator, rather than parallel LC resonator. The proposed technique makes a time difference between the zero crossing point of the drain node voltages and that of the gate node voltages of the switching pair. By adding cross coupled PMOS loading, the drain voltages are made close to a rectangular shape, which makes an ideal on–off switching of the VCO. Since the current source contributes large portion of noise to the output, it is removed in the proposed VCO to further improve the noise performance. While the series connected inductor and capacitor enhances the fundamental frequency swing at the LC connection node, it gives a cleaner spectral purity output and suppresses the overall noise at the drain node of the cross-coupled switching cell.The proposed technique is verified using a 65nm CMOS process with the VCO operating at around 3.6GHz frequency range. The post-layout phase noise of the VCO is −123dBc/Hz, −126dBc/Hz, and −137dBc/Hz at 600kHz, 800kHz, and 3MHz offset frequencies, respectively, which satisfy the stringent phase noise requirements such as GSM standards operating at 900-MHz, 1800-MHz and 1900-MHz band. The proposed VCO consumes 5.6mW dc power from a 1-V supply. The proposed VCO achieves the calculated figure-of-merit (FOM) of −201dBc/Hz at 3MHz offset.

Analysis and Design of High Performance Ring Voltage Controlled Oscillator

The voltage controlled oscillator (VCO) may be considered one of the most important building blocks in modern communication applications such as microprocessor clock generation, wired and wireless communications, system synchronization, and frequency synthesis. The search in the field of design for high performance VCOs has been increasingly more important and becomes an active research area. In the past decade, The Researches on VCOs have been based on the areas of higher frequency, lower phase noise, low power, low operating voltage, and increased tuning range. However many of these objectives can be only achieved at the expense of some other objectives. This thesis analyzes the design of high performance ring VCOs. The beginning of the thesis is reviewing the basic ring VCOs. The different designs are also introduced. Finally, the circuit techniques used in a proposed VCO based on the new technique is designed and simulated in 65nm CMOS SOI process. The results of proposed device are compared and confirmed the usability of the new ring VCO cell topology. Finally, a conclusion of the proposed design of high performance ring VCOs is explained.

Design and Analysis of a 0.4V 1.08mW 12GHz High-Performance VCO in 0.18μm CMOS (Invited Paper)

This paper presents the design and analysis of a high-performance fully-integrated 0.18μm CMOS voltage-controlled oscillator (VCO) with low supply voltage and low dc power consumption. To enhance the transconductance (gm) of MOSFETs and negative conductance (-Gm) of a cross-coupled pair, the device size of the nMOS cross-coupled pair is enlarged. For reducing the supply voltage and minimizing the dc power consumption, forward-body biased technique is utilized in this VCO, leading to the threshold voltage (Vt) reduction. Moreover, process variations are taken into accounted at low supply voltage, and the Monte-Carlo analysis is used to analyze the VCO phase noise and output power. At 0.4V low supply voltage, the fabricated 0.18μm CMOS VCO consumes 1.08mW low core power. At this bias condition, the measured phase noise at 1MHz offset from 12.77GHz carrier is -110.2 dBc/Hz, and the measured tuning range is 5.75%. Compared to recently published 0.18μm X-band CMOS VCOs, this work demonstrates the low supply voltage, low dc power dissipation, superior figure-of-merit (FOM), and better figure-of-merit including the tuning range (FOMT).

Performance Review of High-Quality-Factor, Low-Noise, and Wideband Radio-Frequency LC-VCO for Wireless Communication [Application Notes

The rapid growth in the network-communication-system market has placed higher demands on radio-frequency (RF) transceivers. The voltage-controlled oscillator (VCO) is one of the most important building blocks of any communications system, and a high-performance VCO is critical to cover new requirements in communication systems such as required frequency bandwidth recommended by ITU-R, high phase noise performance, power consumption, die size and its cost.

High Performance Voltage Controlled Oscillator (VCO) Using 65NM VLSI Technology

refers to both a particular style of digital circuitry design, and the family of processes used to implement that circuitry on integrated circuits (chips). CMOS circuitry in VLSI dissipates less power when static, and is denser than other implementations having the same functionality. As this advantage has grown and become more important, CMOS processes and variants for VLSI have come to dominate, so that the vast majority of modern integrated circuit manufacturing is on VLSI technology processes. A key circuit use in modern communication is voltage control oscillator VCO’s output is a AC waveform whose frequency is dependent upon the input voltages. In today’s wireless communication system, greater maximum frequency required by the VCO w.r.t. to the digital phones that use these circuit, low power consumption, small size & low fabrication cost are important design factor. The layout of VCO which is develop by us is a modified design of high performance VCO .This is a optimum design for use in industries at 65 nm VLSI technology . In the estimated design ,more emphases is given on power consumption, layout design and many more. This report is a brief study of high performance VCO on 65 nm VLSI technology to achieve some objectives as mention above