A phase-noise reduction technique for RF CMOS voltage-controlled oscillator with a series LC resonator

Abstract

This paper proposes a novel phase-noise reduction technique for high performance voltage-controlled oscillator (VCO) using a cross-coupled series LC resonator, rather than parallel LC resonator. The proposed technique makes a time difference between the zero crossing point of the drain node voltages and that of the gate node voltages of the switching pair. By adding cross coupled PMOS loading, the drain voltages are made close to a rectangular shape, which makes an ideal on–off switching of the VCO. Since the current source contributes large portion of noise to the output, it is removed in the proposed VCO to further improve the noise performance. While the series connected inductor and capacitor enhances the fundamental frequency swing at the LC connection node, it gives a cleaner spectral purity output and suppresses the overall noise at the drain node of the cross-coupled switching cell.The proposed technique is verified using a 65nm CMOS process with the VCO operating at around 3.6GHz frequency range. The post-layout phase noise of the VCO is −123dBc/Hz, −126dBc/Hz, and −137dBc/Hz at 600kHz, 800kHz, and 3MHz offset frequencies, respectively, which satisfy the stringent phase noise requirements such as GSM standards operating at 900-MHz, 1800-MHz and 1900-MHz band. The proposed VCO consumes 5.6mW dc power from a 1-V supply. The proposed VCO achieves the calculated figure-of-merit (FOM) of −201dBc/Hz at 3MHz offset.