High-performance Field-effect Transistors Research Articles

Direct self-assembled monolayers treatment on the polar polymer dielectric towards ultra-flexible organic field-effect transistors

• A direct SAM treatment on the polar polymer gate dielectric without any preprocess is introduced. • A hysteresis-free OFET with a high mobility of 1.51 cm 2 V −1 s −1 was achieved. • An ultra-flexible OFET was fabricated and presented a stable electrical performance under deformations. Surface treatment for the polymer gate dielectric plays a significant role in achieving the high-performance flexible field-effect transistors. In this work, the direct SAM treatment on the polar polymer gate dielectric is introduced and the effects on the electrical performance of OFETs are investigated. After an appropriate SAM treatment for the polar polymer dielectric, the mobility can be improved and the hysteresis and interfacial trap states are decreased obviously. Moreover, the SAM treated polymer dielectric is used to achieve the ultra-flexible OFET successfully, with a stable electrical performance under various deformations. These results demonstrate that the direct SAM treatment on polar polymer dielectric is a promising strategy for the high-performance flexible organic transistors, presenting the huge potential for the next-generation flexible electronics.

Uniaxial Alignment of Spin Coated Polymer Films for High-Performance Field Effect Transistors

Uniaxial Alignment of Spin Coated Polymer Films for High-Performance Field Effect Transistors

Evolution Application of Two-Dimensional MoS2-Based Field-Effect Transistors

High-performance and low-power field-effect transistors (FETs) are the basis of integrated circuit fields, which undoubtedly require researchers to find better film channel layer materials and improve device structure technology. MoS2 has recently shown a special two-dimensional (2D) structure and superior photoelectric performance, and it has shown new potential for next-generation electronics. However, the natural atomic layer thickness and large specific surface area of MoS2 make the contact interface and dielectric interface have a great influence on the performance of MoS2 FET. Thus, we focus on its main performance improvement strategies, including optimizing the contact behavior, regulating the conductive channel, and rationalizing the dielectric layer. On this basis, we summarize the applications of 2D MoS2 FETs in key and emerging fields, specifically involving logic, RF circuits, optoelectronic devices, biosensors, piezoelectric devices, and synaptic transistors. As a whole, we discuss the state-of-the-art, key merits, and limitations of each of these 2D MoS2-based FET systems, and prospects in the future.

Graphene-Induced Performance Enhancement of Batteries, Touch Screens, Transparent Memory, and Integrated Circuits: A Critical Review on a Decade of Developments.

Highlights Graphene possesses high electronic mobility, minimal light absorbance, large surface area and exclusive mechanical properties. Graphene’s unique characteristics make it the perfect material for use in batteries, touch screens, transparent memory, and integrated circuits. The development of high-quality homogenous graphene, simple transfer processes, a lack of effective characterization methods, and high production costs prevent graphene from being widely used in the electronic industry. The production of large-area, nearly defect-free graphene using contemporary synthesis techniques, such CVD, holds great potential for the development of nanoelectronic devices.Graphene achieved a peerless level among nanomaterials in terms of its application in electronic devices, owing to its fascinating and novel properties. Its large surface area and high electrical conductivity combine to create high-power batteries. In addition, because of its high optical transmittance, low sheet resistance, and the possibility of transferring it onto plastic substrates, graphene is also employed as a replacement for indium tin oxide (ITO) in making electrodes for touch screens. Moreover, it was observed that graphene enhances the performance of transparent flexible electronic modules due to its higher mobility, minimal light absorbance, and superior mechanical properties. Graphene is even considered a potential substitute for the post-Si electronics era, where a high-performance graphene-based field-effect transistor (GFET) can be fabricated to detect the lethal SARS-CoV-2. Hence, graphene incorporation in electronic devices can facilitate immense device structure/performance advancements. In the light of the aforementioned facts, this review critically debates graphene as a prime candidate for the fabrication and performance enhancement of electronic devices, and its future applicability in various potential applications.

Tuning Schottky Barrier of Single-Layer MoS2 Field-Effect Transistors with Graphene Electrodes.

Two–dimensional materials have the potential to be applied in flexible and transparent electronics. In this study, single-layer MoS2 field-effect transistors (FETs) with Au/Ti–graphene heteroelectrodes were fabricated to examine the effect of the electrodes on the electrical properties of the MoS2 FETs. The contact barrier potential was tuned using an electric field. Asymmetrical gate behavior was observed owing to the difference between the MoS2 FETs, specifically between the MoS2 FETs with Au/Ti electrodes and those with graphene electrodes. The contact barrier of the MoS2 FETs with Au/Ti electrodes did not change with the electric field. However, the contact barrier at the MoS2–graphene interface could be modulated. The MoS2 FETs with Au/Ti–graphene electrodes exhibited enhanced on/off ratios (~102 times) and electron mobility (~2.5 times) compared to the MoS2 FETs with Au/Ti electrodes. These results could improve the understanding of desirable contact formation for high-performance MoS2 FETs and provide a facile route for viable electronic applications.

High-performance vertical GaN field-effect transistor with an integrated self-adapted channel diode for reverse conduction

A vertical GaN field-effect transistor with an integrated self-adapted channel diode (CD-FET) is proposed to improve the reverse conduction performance. It features a channel diode (CD) formed between a trench source on the insulator and a P-type barrier layer (PBL), together with a P-shield layer under the trench gate. At forward conduction, the CD is pinched off due to depletion effects caused by both the PBL and the metal–insulator–semiconductor structure from the trench source, without influencing the on-state characteristic of the CD-FET. At reverse conduction, the depletion region narrows and thus the CD turns on to achieve a very low turn-on voltage (V F), preventing the inherent body diode from turning on. Meanwhile, the PBL and P-shield layer can modulate the electric field distribution to improve the off-state breakdown voltage (BV). Moreover, the P-shield not only shields the gate from a high electric field but also transforms part of C GD to C GS so as to significantly reduce the gate charge (Q GD), leading to a low switching loss (E switch). Consequently, the proposed CD-FET achieves a low V F of 1.65 V and a high BV of 1446 V, and V F, Q GD and E switch of the CD-FET are decreased by 49%, 55% and 80%, respectively, compared with those of a conventional metal–oxide–semiconductor field-effect transistor (MOSFET).

Non-Enzymatic Glucose Detection Based on GO/Ag Nanocomposite in SiO2Trench Embedded Field Effect Transistor

This study demonstrates the application of graphene oxide-silver (GO/Ag) nanocomposite to develop a non-enzymatic high-performance glucose-sensing field-effect transistor (FET). Lithography and etching processes are used to fabricate the SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> trench embedded FET. The fabricated device structure was used not only for glucose storage but also for glucose sensing. The bonding of the GO/Ag nanocomposite was validated by analysing their shape and structure. As the concentration of glucose rises ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1~\mu \text{M}$ </tex-math></inline-formula> to 10 mM range), the output electrical signal changes. With a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1~\mu \text{M}$ </tex-math></inline-formula> limit of detection (Signal to Noise ratio, S/N >3), the sensor has a response time of fewer than 5 seconds. It also demonstrated great long-term stability, outstanding reproducibility, and excellent glucose selectivity. This sensor has notable characteristics such as ease of production, simplicity of usage, and small size. It has the potential to fabricate portable glucose sensors for point-of-care sensing in the future. Additional liquid sensing applications could benefit from the sensor structure.

High-Performance Monolayer BeN2 Transistors With Ultrahigh On-State Current: A DFT Coupled With NEGF Study

Conventional field-effect transistors (FETs) based on silicon downscaling are approaching physical limits, and thus, it is urgent to explore additional novel solutions to address this issue. The 2-D semiconductors have unique advantages as the channel material and provide a promising prospect for high-performance FETs in the post-Moore era. In this work, a new 2-D semiconductor, monolayer BeN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> , is studied for the FET performance limits through first-principle quantum-transport simulations. Monolayer BeN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> exhibits a graphene-like planar structure with a direct bandgap of 1.3 eV. Transfer characteristics of sub-10-nm BeN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> FETs are thoroughly assessed through scaling gate length. In particular, 2-D BeN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> FETs with 10-nm gate present the ultrahigh ON-state current above <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4500\,\, \mu \text{A}/\mu \text{m}$ </tex-math></inline-formula> for high-performance applications. Also, we realize the significant reduction of gate length (only 2.5 nm) against the International Technology Roadmap for Semiconductors (ITRS) requirements through introducing underlap structures. In addition, the performance of single devices based on monolayer BeN <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> is evaluated and compared with some of the recently proposed 2-D devices.

Heterogeneous Integration of Atomically Thin Semiconductors for Non-von Neumann CMOS.

Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high-performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n-type TMDs such as MoS2 and WS2 grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p-type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n-type MoS2 and p-type vanadium doped WSe2 FETs with non-volatile and analog memory storage capabilities to achieve a non-von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n-type and p-type FETs, which is critical for any IC development. Inverters and a simplified 2-input-1-output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non-von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials.

Low-thermal-budget n-type ohmic contacts for ultrathin Si/Ge superlattice materials

Thermal budget is a vital element of Si-based superlattice material processing. In this work, a novel n-type ohmic contact scheme with a low thermal budget process is developed by combining high-dose ion implantation and low-temperature alloying techniques. The optimized specific contact resistivity (ρ c) is reduced to 6.18 × 10−3 Ω cm2 at a low thermal budget of 400 °C, and this is a result of the efficient low-temperature electrical activation of amorphous substances. It is indicated that both the high doping concentration and the formation of a NiSi(Ge) alloy phase contribute to the linear ohmic contact behavior. The ohmic contact resistance dependence on processing temperature is further revealed by a detailed Ni/Si(Ge)alloying model. A minimum ρ c of 2.51 × 10−4 Ω cm2 is achieved at a thermal budget of 450 °C, which is related to the high bonding intensity at the metal–semiconductor interface. Note that this technique is compatible with standard Si-based CMOS process flows and can be applied in high-performance insulated-gate field-effect transistor (IGFET) fabrication. Furthermore, it is verified that the Si/Ge superlattice structures in our IGFETs can serve as an efficient potential barrier to constrain electrons.

Performance Evaluation of CNTFETs Fabricated with Carbon Nanotubes of Different Synthesis Methods

Single walled carbon nanotubes (SWCNTs) exhibit extraordinary electronic properties that render it as an exciting candidate to be applied as the active channel of high-performance carbon nanotube field effect transistors (CNTFETs). The electronic properties of SWCNTs have been demonstrated to be dependent on the tube intrinsic properties that includes structural defects, chirality and diameter. Structural tube defects can be affected by the synthesis method and therefore the latter should also affect the device performance. Hence, this paper aims to present the influence of SWCNTs source synthesis method towards the resulting CNTFET device characteristics. A total of four SWCNT samples were sourced from different synthesis methods in fabricating CNTFETs. The synthesis methods are arc-discharge and three different variation of chemical vapor deposition (CVD) processes, which are DIPS, HiPco and CoMoCAT, respectively. Prior to fabrication, the SWCNT samples were characterized via Raman spectroscopy to quantifythe tube defect levels of each sample, which are directly proportional to the G-peak to D-peak height ratio, G/D. Electrical characterization was carried out via 3-terminal field effect I-Vmeasurement to evaluate key device performance parameters such ason-off current ratio, ION/IOFF, transconductance, gm,subthreshold slope, Spand field effect mobility, μFE.Analysis shows that G/Daffects the IOFFmore significantly relative to ION, resulting in increasing ION/IOFF, and hence switching performance, when G/Dincreases. It is shown an increase of ~50% to the G/Dof the SWCNT source resulted in ~ 860% increase in μFE. Based on the correlation between the optical analysis and electrical measurement, weconclude that theSWCNT growth method cansignificantly affectthe CNTFET device performance.

Atomic Layer Deposition of Metal Oxides and Chalcogenides for High Performance Transistors.

Atomic layer deposition (ALD) is a deposition technique well‐suited to produce high‐quality thin film materials at the nanoscale for applications in transistors. This review comprehensively describes the latest developments in ALD of metal oxides (MOs) and chalcogenides with tunable bandgaps, compositions, and nanostructures for the fabrication of high‐performance field‐effect transistors. By ALD various n‐type and p‐type MOs, including binary and multinary semiconductors, can be deposited and applied as channel materials, transparent electrodes, or electrode interlayers for improving charge‐transport and switching properties of transistors. On the other hand, MO insulators by ALD are applied as dielectrics or protecting/encapsulating layers for enhancing device performance and stability. Metal chalcogenide semiconductors and their heterostructures made by ALD have shown great promise as novel building blocks to fabricate single channel or heterojunction materials in transistors. By correlating the device performance to the structural and chemical properties of the ALD materials, clear structure–property relations can be proposed, which can help to design better‐performing transistors. Finally, a brief concluding remark on these ALD materials and devices is presented, with insights into upcoming opportunities and challenges for future electronics and integrated applications.

Key progresses of MOE key laboratory of macromolecular synthesis and functionalization in 2021

In 2021, The MOE Key Laboratory of Macromolecular Synthesis and Functionalization in Zhejiang University had achieved several important results. First, a series of versatile organoboron catalysts were synthesized for ring-opening (co)polymerizations. Second, a catalyst-free polycondensation mechanism was proposed for the production of polyesters with high molecular weights. Third, a co-assembly method that can fabricate films and coatings with controllable structures and properties on various substrates was demonstrated, providing a platform for the construction of novel surface coatings. Forth, facile methods for producing high-productivity poly(propylene carbonate) and semicrystalline polyester have been discovered. And linear non-conjugated polyesters exhibiting yellow-green clusteroluminescence were developed for the first time. Fifth, a supramolecular prodrug nano-assembly strategy has been developed for reactive nitrogen species potentiated chemotherapy. Sixth, a series of tough and stiff supramolecular hydrogels with shape memory properties have been used for information encryption. Seventh, reversible fusion and fission of wet-spun graphene oxide fibers has been successfully achieved. Eighth, three non-conjugated polypeptides were synthesized and the mechanism of clusteroluminescence was studied. Ninth, a series of conducting covalent organic frameworks with high electrical conductivity and carrier mobility have been used as high-performance chemiresistor, electrocatalyst, and organic field-effect transistor. Tenth, the exploration of non-fused electron acceptors, and their photostable mechanism are exemplified for developing high-performance, low-cost and eco-friendly polymer solar cells. Finally, gel-grown long-range ordering bulk-heterojunctions has achieved improved X-ray detector performance.

High synergy atomic layer etching of AlGaN/GaN with HBr and Ar

Here, we show a process of AlGaN/GaN atomic layer etching with a high synergy of &amp;gt;91%. Achieved by means of a cyclical HBr and Ar process, highly controllable layer removal was observed within the atomic layer etching window and is attributed to careful parameter calibration plus lower reactivity of the HBr chemistry. Such etching is a valuable component in the production of high-performance enhancement-mode GaN field effect transistor devices.

Performance Enhancement of SnS/h-BN Heterostructure p-Type FET via the Thermodynamically Predicted Surface Oxide Conversion Method.

Searching for the counterpart of well-developed two-dimensional (2D) n-type field effect transistors (FETs) is indispensable for complementary logic circuit applications for 2D devices. Although SnS is regarded as a potential candidate for high-performance p-type FETs, recent experiments only show poor results deviating from the theoretically predicted high mobility. In this research, the serious performance degradation due to the surface oxidation of SnS, which commonly occurs in most 2D materials, is addressed through surface oxide conversion using highly reactive Ti. In this conversion process, which is confirmed by systematic characterization, the reduction of SnS surface oxide is accompanied by the formation of functional titanium oxide, which works as both a conductive intermediate layer to improve the contact property and a buffer layer of the high-k top gate insulator at the channel region. Consequently, a record-high field effect mobility of 87.4 cm2 V-1 s-1 in SnS p-type FETs is achieved. The surface oxide conversion method applied here is consistent with our previous thermodynamic prediction, and this novel technique can be widely introduced to all 2D materials that are vulnerable to oxidation and facilitate the future development of 2D devices.

Electrohydrodynamic jet printing of small-molecule semiconductor crystals on chemically patterned surface for high-performance organic field-effect transistors

Direct writing of organic semiconducting crystals by electrohydrodynamic jet (EHD) printing has enabled the low-cost large-area fabrication of organic semiconducting crystal arrays without the need of complicated patterning procedures. However, morphological variations within a single printed pattern (e.g., variations in thickness, crystallinity, and local crystal orientation) caused by the “coffee-ring effect” can be an issue during their application in organic field-effect transistors (OFETs) since their charge-transport properties significantly affect the device characteristics. Herein, we report the EHD printing of small-molecule semiconducting crystals on a chemically patterned substrate to suppress the “coffee-ring effect” and produce uniform high-quality crystals oriented along the printing direction. The EHD printing of 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-PEN) on hydrophobic polyurethane acrylate line patterns on a dielectric surface enables the selective and guided growth of the crystals. The OFETs with the TIPS-PEN crystals printed on the patterned surface exhibit an average field-effect mobility of 0.34 cm2/(V s), which is more than twice of that of the OFETs fabricated with crystals grown on unpatterned surfaces. Thus, the use of chemically patterned surface to improve the uniformity and crystallinity of organic semiconducting crystals is expected to promote the application of EHD printing for fabricating high-performance OFETs.

Effective Suppression of MIS Interface Defects Using Boron Nitride toward High-Performance Ta-Doped-β-Ga2O3 MISFETs.

β-Ga2O3 is considered an attractive candidate for next-generation high-power electronics due to its large band gap of 4.9 eV and high breakdown electrical field of 8 MV/cm. However, the relatively low carrier concentration and low electron mobility in the β-Ga2O3-based device limit its application. Herein, the high-quality β-Ga2O3 single crystal with high doping concentration of ∼3.2 × 1019 cm-3 was realized using an optical float-zone method through Ta doping. In contrast to the SiO2/β-Ga2O3 gate stack structure, we used hexagonal boron nitride as the gate insulator, which is sufficient to suppress the metal-insulator-semiconductor (MIS) interface defects of the β-Ga2O3-based MIS field-effect transistors (FETs), exhibiting outstanding performances with a low specific on-resistance of ∼6.3 mΩ·cm2, a high current on/off ratio of ∼108, and a high mobility of ∼91.0 cm2/(V s). Our findings offer a unique perspective to fabricate high-performance β-Ga2O3 FETs for next-generation high-power nanoelectronic applications.

Theoretical insights into the diverse and tunable charge transport behavior of stilbene-based single-molecule junctions

Single-molecule junctions are an elementary class of future electronics devices, and therefore, it is of vital importance for deep understanding the charge transport behavior through molecular building blocks. Here, based on density functional theory (DFT) and non-equilibrium Green’s function (NEGF) method, we systematically investigate the electronic and charge transport properties of single-molecule junctions constructed with a series of stilbene molecules and gold electrodes. Consistent with available experimental results, the calculated conductance and current of para-connected molecular junction are significant larger than those of meta-connected molecular junction, indicating that the charge transport behavior is strongly correlated to the connectivity configurations. Our further frontier orbital analysis demonstrates that this phenomena is originated from the wave function population on the terminating anchor S atoms, which influences the quantum interference properties of single-molecule junctions. Furthermore, we discuss the effect of electrochemical gating on the conductance of single-molecule junctions and find that the conductance are greatly enhanced since the energies of molecular frontier orbitals can be well aligned with the Fermi level. These calculations not only offer a deep understanding of charge transport properties of stilbene-based single-molecule junctions, but also facilitate the design of high-performance field-effect transistors (FETs) in future.

Doping of Sn-based two-dimensional perovskite semiconductor for high-performance field-effect transistors and thermoelectric devices

SummaryDoping is an important technique for semiconductor materials and devices, yet effective and controllable doping of organic-inorganic halide perovskites is still a challenge. Here, we demonstrate a facile way to dope two-dimensional Sn-based perovskite (PEA)2SnI4 by incorporating SnI4 in the precursor solutions. It is observed that Sn4+ produces p-doping effect on the perovskite, which increases the electrical conductivity by 105 times. The dopant SnI4 is also found to improve the film morphology of (PEA)2SnI4, leading to reduced trap states. This doping technique allows us to improve the room temperature mobility of (PEA)2SnI4 field-effect transistors from 0.25 to 0.68 cm2 V−1 s−1 thanks to reduced trapping effects in the doped devices. Moreover, the doping technique enables the characterization and improvement of the thermoelectric performance of (PEA)2SnI4 films, which show a high power factor of 3.92 μW m−1 K−2 at doping ratio of 5 mol %.

Unveiling the electrical and photo-physical properties of intrinsic n-type 2D WSe2 for high performance field-effect transistors

Atomically thin semiconducting 2D transition metal dichalcogenides have garnered remarkable attention from the scientific community due to their prodigious contributions in the field of next-generation electronic and optoelectronic devices. In this continuation, we report a facile synthesis protocol of monolayer WSe2 films via the atmospheric-pressure chemical vapor deposition (APCVD) technique using hydrothermally synthesized hexagonal-phase tungsten oxide (h-WO3) nanorods. The as synthesized WSe2 crystal is a monolayer of ∼0.9 nm thickness as confirmed by atomic force microscopy. The confocal Raman and photoluminescence (PL) mapping suggests that the grown monolayer WSe2 triangles have lattice defects at edge sites, with a slight red-shift of ∼2 nm in PL, a blue-shift of ∼2 cm−1 in Raman peak and reduction in both the intensities. Confocal time-resolved PL mapping at edges reveals a fast-decay component of ∼582 ps and a slow-decay component of ∼2.18 ns that also signifies the presence of lattice defects, which serves as localized-states for photon-generated charge excitons. Furthermore, we have also investigated its electrical property by devising field-effect transistors (FETs). The fabricated WSe2 based FET shows intrinsic n-type behavior. WSe2 FET offers an electron mobility (μ) of ∼13.2 cm2 V−1 s−1, current ON/OFF ratio of ∼107 with a subthreshold slope (SS) of ∼397 mV/decade, which is relatable to the other reported works on WSe2 based FETs. In addition, the device exhibits very high on-current of order of ∼150 μA/μm. These results indicate that h-WO3 nanorod assisted APCVD synthesized WSe2 has prospective of being a competitor for next-generation optoelectronic, and valley-tronic devices.