High-performance Field-effect Transistors Research Articles

Band alignment and charge transfer mechanisms in the prediction of advanced gate dielectrics for carbon nanotube field-effect transistors

The search for novel gate dielectrics to mitigate interface state density is a pressing concern in the fabrication of high-performance carbon nanotube field-effect transistors (CNT-FETs). In this study, we investigated the feasibility of employing strontium titanate (STO) with an ultra-high dielectric constant as the gate dielectric in CNT-FETs. By combining X-ray photoelectron spectroscopy measurements with first-principles calculations, we determined the band offsets between CNT and STO, as well as between CNT and conventional gate dielectrics such as HfO2 and SiO2. The valence/conduction band offset (VBO/CBO) at the STO/CNT interface is found to be 1.1 eV/1.5 eV, which is the smallest among all studied interfaces, followed by those at HfO2/CNT interface (VBO = 1.3 eV/CBO = 3.4 eV) and SiO2/CNT interface (VBO = 3.6 eV/CBO = 4.5 eV). Moreover, charge transfer at the STO/CNT interface exhibits two orders of magnitude lower values compared to that at HfO2/CNT interface and is also significantly smaller than that at SiO2/CNT interface. This phenomenon can be ascribed to the combined effects of van der Waals forces at the STO/CNT interface and fewer dangling bonds on the STO surface. These findings suggest exceptional compatibility between STO and CNT, making STO highly suitable for high-performance CNT-FETs.

Performance improvement of planar silicon nanowire field effect transistors via catalyst atom doping control

Catalytic growth of silicon nanowires (SiNWs), mediated by metallic droplet, provide ideal quasi-1D channels to construct high performance field effect transistor (FET). However, the incorporation of catalytic metal atoms into SiNWs channels has significant impact on the FET characteristics, and thus needs to be better understood and controlled to fulfil its potential for high performance electronics. In this work, we focus on the effect of the incorporation of indium (In) catalytic atoms into planar SiNWs, grown via an in-plane solid-liquid-solid (IPSLS) mechanism, on the FET device performance. It is found that the initial high concentration of p-type In dopants in the as-grown SiNWs led to an equivalent boron (B) doping of 5×1018 cm−3. However, a simple step-wise annealing in oxygen at different temperatures, varied from 620 °C to 920 °C, can help to out-diffuse the dissolved In atoms into the surface SiO2 layer, and reduce the In concentrations down to <5×1017 cm−3, as verified by atom-probe tomography (APT) and four-point-probe measurements. This effective dopant control enables a remarkable device performance improvement of the Schottky barrier FETs, built upon an orderly array of parallel SiNWs of approximately 25 nm in diameter, where the current ratio (Ion/Ioff) has been substantially boosted from 105 to 108, while the subthreshold swing (SS) reduced from 400 mV/dec down to ∼100 mV/dec, with a hole carrier mobility increased from 10 to ∼75 cm2 V−1 s−1 as extracted according to a finite element analysis. These results pave the way for the employment of the catalytic IPSLS SiNWs to serve as high quality 1D channels for high-performance SiNWs-based electronics and sensors.

CVD graphene contacts for lateral heterostructure MoS2 field effect transistors

Intensive research has been carried out on two-dimensional materials, in particular molybdenum disulfide, towards high-performance field effect transistors for integrated circuits1. Fabricating transistors with ohmic contacts is a challenging task due to the formation of a high Schottky barrier that severely limits the performance of the transistors for real-world applications. Graphene-based heterostructures can be used in addition to, or as a substitute for unsuitable metals. In this paper, we present lateral heterostructure transistors made of scalable chemical vapor-deposited molybdenum disulfide and chemical vapor-deposited graphene achieving a low contact resistances of about 9 kΩ·µm and high on/off current ratios of 108. Furthermore, we also present a theoretical model calibrated on our experiments showing further potential for scaling transistors and contact areas into the few nanometers range and the possibility of a substantial performance enhancement by means of layer optimizations that would make transistors promising for use in future logic integrated circuits.

Magneto-transport in the monolayer MoS2 material system for high-performance field-effect transistor applications

Electronic transport in monolayer MoS2 is significantly constrained by several extrinsic factors despite showing good prospects as a transistor channel material. Our paper aims to unveil the underlying mechanisms of the electrical and magneto-transport in monolayer MoS2. In order to quantitatively interpret the magneto-transport behavior of monolayer MoS2 on different substrate materials, identify the underlying bottlenecks, and provide guidelines for subsequent improvements, we present a deep analysis of the magneto-transport properties in the diffusive limit. Our calculations are performed on suspended monolayer MoS2 and MoS2 on different substrate materials taking into account remote impurity and the intrinsic and extrinsic phonon scattering mechanisms. We calculate the crucial transport parameters such as the Hall mobility, the conductivity tensor elements, the Hall factor, and the magnetoresistance over a wide range of temperatures, carrier concentrations, and magnetic fields. The Hall factor being a key quantity for calculating the carrier concentration and drift mobility, we show that for suspended monolayer MoS2 at room temperature, the Hall factor value is around 1.43 for magnetic fields ranging from 0.001 to 1 Tesla, which deviates significantly from the usual value of unity. In contrast, the Hall factor for various substrates approaches the ideal value of unity and remains stable in response to the magnetic field and temperature. We also show that the MoS2 over an Al2O3 substrate is a good choice for the Hall effect detector. Moreover, the magnetoresistance increases with an increase in magnetic field strength for smaller magnetic fields before reaching saturation at higher magnetic fields. The presented theoretical model quantitatively captures the scaling of mobility and various magnetoresistance coefficients with temperature, carrier densities, and magnetic fields.

Low Resistance Contact to P-Type Monolayer WSe2.

Advanced microelectronics in the future may require semiconducting channel materials beyond silicon. Two-dimensional (2D) semiconductors, with their atomically thin thickness, hold great promise for future electronic devices. One challenge to achieving high-performance 2D semiconductor field effect transistors (FET) is the high contact resistance at the metal-semiconductor interface. In this study, we develop a charge-transfer doping strategy with WSe2/α-RuCl3 heterostructures to achieve low-resistance ohmic contact for p-type monolayer WSe2 transistors. We show that hole doping as high as 3 × 1013 cm-2 can be achieved in the WSe2/α-RuCl3 heterostructure due to its type-III band alignment, resulting in an ohmic contact with resistance of 4 kΩ μm. Based on that, we demonstrate p-type WSe2 transistors with an on-current of 35 μA·μm-1 and an ION/IOFF ratio exceeding 109 at room temperature.

High-performance Schottky-barrier field-effect transistors based on two-dimensional GaN with Ag or Au contacts

The performance of two-dimensional (2D) monolayer GaN Schottky barrier field effect transistors (SBFETs) with four different metals (Ag, Au, Al, and Pt) as electrodes were studied by using ab initio simulations. The N-type Schottky contact is formed on Ag-GaN, Au-GaN, and Pt-GaN, characterized by electron Schottky barrier heights (SBH) of 0.6, 0.5, and 0.38 eV, respectively. Whereas, Al-GaN contact formed P-type Schottky contact with hole SBH of 1.42 eV. The 5.1 nm GaN SBFETs with four metal electrodes all could overcome the short-channel effect. Additionally, GaN SBFETs with Ag and Au electrodes have excellent performance, whose ON-currents are 1151.1 μA/μm and 1258.9 μA/μm, respectively. They could satisfy the demands of International Technology Roadmap for Semiconductors for high-performance transistor. Furthermore, research indicates that the device's current increases with increasing temperature. Notably, under the constant bias and gate voltage, the current is unaffected by temperature variations between the left and right electrodes.

Solution-processable low-voltage carbon nanotube field-effect transistors with high-k relaxor ferroelectric polymer gate insulator

Achieving energy-efficient and high-performance field-effect transistors (FETs) is one of the most important goals for future electronic devices. This paper reports semiconducting single-walled carbon nanotube FETs (s-SWNT-FETs) with an optimized high-k relaxor ferroelectric insulator P(VDF-TrFE-CFE) thickness for low-voltage operation. The s-SWNT-FETs with an optimized thickness (∼800 nm) of the high-k insulator exhibited the highest average mobility of 14.4 cm2 V−1s−1 at the drain voltage (I D) of 1 V, with a high current on/off ratio (I on/off >105). The optimized device performance resulted from the suppressed gate leakage current (I G) and a sufficiently large capacitance (>50 nF cm−2) of the insulating layer. Despite the extremely high capacitance (>100 nF cm−2) of the insulating layer, an insufficient thickness (<450 nm) induces a high I G, leading to reduced I D and mobility of s-SWNT-FETs. Conversely, an overly thick insulator (>1200 nm) cannot introduce sufficient capacitance, resulting in limited device performance. The large capacitance and sufficient breakdown voltage of the insulating layer with an appropriate thickness significantly improved p-type performance. However, a reduced n-type performance was observed owing to the increased electron trap density caused by fluorine proportional to the insulator thickness. Hence, precise control of the insulator thickness is crucial for achieving low-voltage operation with enhanced s-SWNT-FET performance.

Boltzmann Switching MoS2 Metal-Semiconductor Field-Effect Transistors Enabled by Monolithic-Oxide-Gapped Metal Gates at the Schottky-Mott Limit.

A gate stack that facilitates a high-quality interface and tight electrostatic control is crucial for realizing high-performance and low-power field-effect transistors (FETs). However, when constructing conventional metal-oxide-semiconductor structures with two-dimensional (2D) transition metal dichalcogenide channels, achieving these requirements becomes challenging due to inherent difficulties in obtaining high-quality gate dielectrics through native oxidation or film deposition. Here, a gate-dielectric-less device architecture of van der Waals Schottky gated metal-semiconductor FETs (vdW-SG MESFETs) using a molybdenum disulfide (MoS2) channel and surface-oxidized metal gates such as nickel and copper is reported. Benefiting from the strong SG coupling, these MESFETs operate at remarkably low gate voltages, <0.5V. Notably, they also exhibit Boltzmann-limited switching behavior featured by a subthreshold swing of ≈60mVdec-1 and negligible hysteresis. These ideal FET characteristics are attributed to the formation of a Fermi-level (EF) pinning-free gate stack at the Schottky-Mott limit. Furthermore, authors experimentally and theoretically confirm that EF depinning can be achieved by suppressing both metal-induced and disorder-induced gap states at the interface between the monolithic-oxide-gapped metal gate and the MoS2 channel. This work paves a new route for designing high-performance and energy-efficient 2D electronics.

Lowering the Schottky Barrier Height by Quasi-van der Waals Contacts for High-Performance p-Type MoTe2 Field-Effect Transistors.

Two-dimensional (2D) transition-metal dichalcogenides (TMDs) offer advantages over traditional silicon in future electronics but are hampered by the prominent high contact resistance of metal-TMD interfaces, especially for p-type TMDs. Here, we present high-performance p-type MoTe2 field-effect transistors via a nondestructive van der Waals (vdW) transfer process, establishing low contact resistance between the 2D MoTe2 semiconductor and the PtTe2 semimetal. The integration of PtTe2 as contacts in MoTe2 field-effect transistors leads to significantly improved electrical characteristics compared to conventional metal contacts, evidenced by a mobility increase to 80 cm2 V-1 s-1, an on-state current rise to 5.0 μA/μm, and a reduction in Schottky barrier height (SBH) to 48 meV. Such a low SBH in quasi-van der Waals contacts can be assigned to the low electrical resistivity of PtTe2 and the high efficiency of carrier injection at the 2D semimetal/2D semiconductor interfaces. Imaging via transmission electron microscopy reveals that the 2D semimetal/two-dimensional semiconductor interfaces are atomically flat and exceptionally clean. This interface engineering strategy could enable low-resistance contacts based on vdW architectures in a facile manner, providing opportunities for 2D materials for next-generation optoelectronics and electronics.

High-Performance Contact-Doped WSe2 Transistors Using TaSe2 Electrodes.

Two-dimensional (2D) transitional metal dichalcogenides (TMDs) have garnered significant attention due to their potential for next-generation electronics, which require device scaling. However, the performance of TMD-based field-effect transistors (FETs) is greatly limited by the contact resistance. This study develops an effective strategy to optimize the contact resistance of WSe2 FETs by combining contact doping and 2D metallic electrode materials. The contact regions were doped using a laser, and the metallic TaSe2 flakes were stacked on doped WSe2 as electrodes. Doping the contact areas decreases the depletion width, while introducing the TaSe2 contact results in a lower Schottky barrier. This method significantly improves the electrical performance of the WSe2 FETs. The doped WSe2/TaSe2 contact exhibits an ultralow Schottky barrier height of 65 meV and a contact resistance of 11 kΩ·μm, which is a 50-fold reduction compared to the conventional Cr/Au contact. Our method offers a way on fabricating high-performance 2D FETs.

Lead ions detection using CVD-grown ReS2-FET with the facilitation of a passivation layer

Field-effect transistor (FET)-based heavy-metal detection is garnering attention due to its heightened sensitivity, affordability, convenient fabrication, and portability. Flower-like rhenium disulfide (ReS2) offers potential for high-performance FET sensors, but direct exposure of channel materials to the ionic solution without a passivation layer results in multiple signals arising from the ionic transmission, doping impact, and gating effect. Introducing a passivation layer to the channel surface enhances sensor sensitivity without compromising device performance, ensuring conductance changes are primarily due to the gating effect. Here, a large surface area of Chemical Vapor Deposition (CVD)-grown vertically aligned ReS2 is employed in the FET-based sensor, and the utilization of the HfO2 layer is to isolate analytes from the elements of the conducting channel. For real-time lead monitoring in a water environment, it exhibits strong electrical stability, an impressive LoD (≈2 nM), a rapid response time (≈1.1 sec), and notable selectivity. Additionally, sensing operations are characterized by developing a unique amplifier circuit by integrating the fabricated sensor, contributing to advancements in sensor integration to detect hazardous metals in industrial electronics. These results underscore the potential for enhancing the performance of ion-sensitive FETs through structural optimization and improvements to the fundamental sensor mechanism.

A Compact Model for Carbon Nanotube Field Effect Transistors Incorporating Temperature Effects and Application for Operational Amplifier Design

Semiconducting carbon nanotubes (CNTs), characterized by high carrier mobility and atomic thickness, are considered ideal channel materials for building high-performance and ultimate-scale field-effect transistors for future electronics. Here, we present a data-calibrated compact model of CNT field-effect transistors (CNTFETs) that incorporates temperature effects using the virtual source approach. The proposed model also includes the self-heating effect. Temperature effect was characterized by the influence of temperature on devices, achieved through establishing a temperature-dependent semi-empirical model of carrier mobility and carrier velocity. The proposed model can be easily implemented in a simulator. We designed a two-stage operational amplifier (OPAMP) using the proposed model at 32 nm technology. Compared with other studies, the designed CNTFET-based OPAMP demonstrates lower power consumption, which is beneficial for exploring the biological applications of low-power analog circuits in portable electronic devices. Furthermore, the impact of thermal variations on the design of OPAMP, as per the proposed model, was delineated. Investigations revealed that our circuit maintains a high common mode rejection ratio, which diminishes as the temperature increases and exhibits a moderate gain value that escalates with temperature.

High-Performance and novel photoactive Hetrostructured Field effect transistor for non-enzymatic glucose sensing

Field Effect Transistor (FET) is emerging as a next generation biosensor possessing the potential to adapt to diverse nanostructures while providing a stable and economically practical platform for achieving high sensitivity and selectivity for the analyte detection. Herein, the study demonstrates the application of an effective g-C3N4 and BiVO4 based photoactive hetrostructures to develop a high performance, non-enzymatic glucose sensing field effect transistor. g-C3N4 nanosheets were synthesized by thermal oxidation of thiourea which were sequentially used for carbon doping to fabricate heterostructures with BiVO4 using Carbon nanotubes (CNT) and gold (Au) nanoparticles as mediators for electrons. Four different hetrostructures BiVO4/g-C3N4, g-C3N4/CNT/BiVO4 g-C3N4/CNT/Au/BiVO4 and C-doped g-C3N4/CNT/Au/BiVO4 were fabricated for channel region to be utilized in FET. The fabricated channels were assessed for improvement g-C3N4/BiVO4 in absorbance, reduction in recombination losses by decreased energy band gap and current–voltage variation. The morphological and structural analysis was confirmed by X-ray diffraction (XRD) and Transmission electron Microscopy (TEM). Current- Voltage (IV) analysis of the fabricated channels was compared for the same amount of glucose concentration. The fabricated C-doped g-C3N4/CNT/Au/BiVO4 channel region based FET demonstrated long term stability after multiple uses, excellent sensitivity and enhanced photocatalytic performance. It also proved to be greatly beneficial in terms of ease of production, simplicity of usage and small size. It has the potential to recreate portable glucose biosensors for real time sensing while also providing additional benefit of other sensing biomolecules.

High-performance ferroelectric field-effect transistors with ultra-thin indium tin oxide channels for flexible and transparent electronics

With the development of wearable devices and hafnium-based ferroelectrics (FE), there is an increasing demand for high-performance flexible ferroelectric memories. However, developing ferroelectric memories that simultaneously exhibit good flexibility and significant performance has proven challenging. Here, we developed a high-performance flexible field-effect transistor (FeFET) device with a thermal budget of less than 400 °C by integrating Zr-doped HfO2 (HZO) and ultra-thin indium tin oxide (ITO). The proposed FeFET has a large memory window (MW) of 2.78 V, a high current on/off ratio (ION/IOFF) of over 108, and high endurance up to 2×107 cycles. In addition, the FeFETs under different bending conditions exhibit excellent neuromorphic properties. The device exhibits excellent bending reliability over 5×105 pulse cycles at a bending radius of 5 mm. The efficient integration of hafnium-based ferroelectric materials with promising ultrathin channel materials (ITO) offers unique opportunities to enable high-performance back-end-of-line (BEOL) compatible wearable FeFETs for edge intelligence applications.

High-Performance Organic Field-Effect Transistors of Liquid Crystalline Organic Semiconductor by Laser Mapping Annealing.

Organic semiconductors (OSCs), especially small molecule semiconductors, have received increasing attention due to their good designability and variability. Phase transitions and interfacial properties have a decisive influence on device performance. Here, 2-Dodecyl-7-phenyl[1]benzothieno[3,2-b][1]benzothiophene (Ph-BTBT-12) devices are treated with low-power laser annealing, which is able to avoid the influence of the dewetting effect on the hole mobility of organic semiconductor materials. Ultraviolet ozone treatment and self-assembled monolayer treatment can improve the performance and stability of the device. Moreover, after low-temperature thermal annealing, the hole mobility of the device can even reach as high as 4.80 cm2 V-1 s-1, and we tested the optical response of the device to the ultraviolet wavelength and found that its maximum optical responsivity was 8.2 AW-1.

Supramolecular Design and Assembly Engineering toward High-Performance Organic Field-Effect Transistors

Supramolecular Design and Assembly Engineering toward High-Performance Organic Field-Effect Transistors

Charge transport and ion migration in perovskite-incorporated conjugated polymer semiconductor

The migration of intrinsic ions in metal halide perovskites and their interfaces has been shown to contribute to hysteresis and performance degradation in perovskite-based electronic devices, particularly in photovoltaics and transistors. Accordingly, controlling the film morphology, microstructure, and ionic defects in perovskite semiconductors is essential for advancing and achieving high-performance perovskite field-effect transistors (FETs). In this study, we demonstrate a well-controlled method to systematically probe the structure-property relationships, origin of hysteresis, and intrinsic ion migration effects in formamidinium iodide and lead iodide (FAI + PbI2)-based perovskite by incorporating it in a semicrystalline conjugated poly(3-hexylthiophene) (P3HT) polymer. Optimized FETs exhibited over 100% hole mobility enhancement owing to unperturbed edge-on crystalline orientation of the P3HT chains caused by the incorporated perovskite, P3HT-(FAI + PbI2) interactions, and better charge injection properties. However, the optimized devices exhibited improved current modulation with dual-sweep hysteresis, which was attributed to the ion migration effect contributed by the polarization of the lead/iodine-related ions and defects. Furthermore, operational stability investigation of the P3HT-(FAI + PbI2) FETs in the air revealed gradual current decay owing to charge trapping in contrast to the control P3HT FETs. This work provides a fundamental understanding of the origin of hysteresis and instabilities in metal perovskite materials and their transistor-based devices.

Theoretical approaches toward designing sensitive materials for carbon nanotube-based field-effect transistor gas sensors

Screening sensitive materials is one of the keys to designing high-performance carbon nanotube-based field-effect transistor gas sensors. Here, we proposed a reliable way (e.g., H2S) to design sensitive materials with high efficiency based on theory and experiment. Our results demonstrated that the interaction between H2S and the sensitive materials must satisfy both energy level and parity match, and the maximum overlap of the orbital wave function. Especially, the gas ΔQ exhibits a strong linear scaling with the metal φ (ΔQ∝φ). Meanwhile, Δφ will result in changes in the threshold voltage of the sensor (ΔVth∝Δφ) in experiments, which would lead to different response intensities. Therefore, the greater the ΔQ, the more changes in the threshold voltage, and corresponding higher response intensity. Expectedly, our experimental results show that the response intensity at equivalent concentrations is in high agreement with the theory (Pt > Pd > Ag), and the limit of H2S detection is low to 20 ppb.

Graphdiyne particles as nano-floating gates for high-performance nonvolatile organic field-effect transistor memory

Graphdiyne particles (GDYP), newcomers of carbon family, were employed as nano-floating gates in organic field-effect transistor (OFET) memories. The charge-trapping layer was prepared by blending GDYP into a polystyrene (PS) matrix. The effect of GDYP doping ratio on memory performances was investigated, and the OFET memory with the optimal doping concentration of the GDYP (0.3 mg/mL) exhibits ambipolar memory behavior with a wide memory window as large as 86 V, excellent retention time over 104 s with a high ON/OFF current ratio of 7.5 × 105. This work demonstrates that graphdiyne is a promising charge-trapping material for high-performance nonvolatile OFET memory devices.

Ultrasensitive detection of miRNA based on single-walled carbon nanotube@MoS2 field-effect transistor regulated by atomic layer deposition

MicroRNAs (miRNAs) act as diagnostic markers for various diseases, and achieving ultra-sensitive detection of miRNAs has an important effect on early disease diagnosis. Field-effect transistor (FET) biosensor exhibits superior sensitivity compared to conventional clinical detection instruments in detecting biomolecules. However, developing high-sensitive FET biosensors for detecting microRNAs remains challenging. In this study, we developed a FET biosensor using MoS2 and a network film of semiconductor single-walled carbon nanotube (SWCNT) as channel materials. The MoS2 cycles were precisely controlled and optimized by atom layer deposition (ALD), and the optimized 3-cycle device exhibited the best performance. This adjustment is beneficial for enhancing the charge transfer between SWCNT and MoS2, as well as improving the on/off ratio and mobility of FET devices. Additionally, the SWCNT@MoS2 structure offers a larger specific surface area, providing more active binding sites on the sensing interface. These two favorable factors contribute to the realization of linear detection miRNA-21 from 1 × 10−17 to 1 × 10−10 mol L−1 in biosensors. The theoretical detection limit of the biosensor is 1.9 × 10−18 mol L−1. This work develops a novel approach to achieve highly sensitive detection of miRNA for high-performance FET biosensors.