High-performance Enhancement-mode Research Articles

Improved Breakdown Voltage and Low Damage E-Mode Operation of AlON/AlN/GaN HEMTs Using Plasma Oxidation Treatment

Low-damage plasma oxidation treatment for AlN/GaN high-electron-mobility transistors (HEMTs) was developed in this letter, with which high-performance enhancement-mode (E-mode) AlON/AlN/GaN HEMTs were demonstrated. After removal of in situ SiN cap layer within gate area, remote plasma oxidation (RPO) treatment of 4.9nm AlN barrier layer at 300 °C leads to formation of AlON insulator layer and effective depletion of 2-D electron gas channel, without etch-induced damage or serious interfacial issues compared with the commonly used gate- recess metal-insulator-semiconductor HEMTs. Thanks to the low-damage RPO treatment, the achieved E-mode HEMTs with threshold voltage of 0.4 V exhibit quite a small loss of output current (7.8%) compared with the depletion-mode devices. In addition, the AlON gate insulator layer results in a remarkable increase in breakdown voltage of devices from 20 V to 74 V, which benefits the high-voltage operation of AlN/GaN technology. Further investigation shows that the oxidation process of AlN barrier tends to be saturated with treatment time increasing, providing a promising solution to the high-performance E-mode operation of scaled GaN-based HEMTs in RF applications.

Enhancement-mode field-effect transistors based on Ti-doped In2O3 nanowires fabricated by electrospinning

Recently, indium oxide (In2O3) semiconducting nanowires (NWs) have been extensively explored as building blocks for numerous electronic applications. However, most of the field-effect transistors (FETs) based on In2O3 NWs were operated in depletion mode (D-mode), which exhibits negative threshold voltage (VTH) and non-zero current with zero bias. Besides, these devices based on In2O3 NWs still suffer from high leakage current and low on-off current ratios (Ion/off). In this report, high-performance enhancement-mode (E-mode) FETs based on Ti doped In2O3 NWs were successfully integrated. It was found that the device performance could be effectively modulated by adjusting the doping concentration of Ti. The FETs based on In2O3 NWs with Ti doping concentration of 3 mol% exhibited a saturation current of 4.69 × 10−4 A, a subthreshold swing (SS) of 1.54 V/decade, an on/off current ratio of ~1.5 × 108, and a field-effect mobility of 2.53 cm2 V−1 s−1. When high-κ ZrOx dielectrics were successfully integrated into the FETs, the mobility and SS of the designed device were improved to 12.67 cm2 V−1 s−1 and 150 mV/decade, respectively. The inverters based on InTiO NWs/ZrOx FETs were constructed and showed a gain of ~9.5. All of these results demonstrate that Ti-doped In2O3 NWs are promising candidates for large-scale, high-performance and low-power electronic devices.

High-Performance Nanowire-Based E-Mode Power GaN MOSHEMTs With Large Work-Function Gate Metal

In this letter, we demonstrate high-performance enhancement-mode (E-mode) GaN metal–oxide–semiconductor high-electron-mobility transistors on a Si substrate based on sidewall depletion achieved by nanostructured gate with large work-function metal. The devices presented threshold voltage ( ${V}_{\textsf {TH}}$ ) over 0.6 V at $1~\mu \text{A}$ /mm, large current density ( ${I}_{\textsf {DS}}$ ) up to 590 mA/mm, low specific ON resistance ( ${R}_{ \mathrm{\scriptscriptstyle ON},\textsf {SP}}$ ) of $1.33~\text {m}\Omega \cdot \text {cm}^{\textsf {2}}$ , high ON/OFF ratio over $10^{\textsf {10}}$ , and large breakdown voltage ( ${V}_{\textsf {BR}}$ ) of 1080 V at $1~\mu \text{A}$ /mm with a grounded substrate. The excellent high-power FOM of 877 MW/cm2 reveals the potential of our approach to obtain the E-mode operation while maintaining exceptional ON-state performance and high $V_{\textsf {BR}}$ .

High-Performance Enhancement-mode AlGaN/GaN high electron mobility transistors combined with TiN-based Source Contact Ledge and Two-Step Fluorine Treatment

High performance enhancement-mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs) were achieved by using the TiN-based source contact ledge and two-step fluorine treatment. Due to the effective reduction of the source resistance by TiN-based source contact ledge, the peak extrinsic trans-conductance improved by 21.2% from 340 to 412 mS/mm. In addition, due to the enhancement of the back barrier by the two-step fluorine treatment, the three-terminal OFF-state breakdown voltage (BV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DS</sub> ) improved by 11.5% from 162 to 183 V. The proposed E-mode AlGaN/GaN HEMTs exhibit a maximum drain current of 845 mA/mm (@ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{\text {GS}} =3$ </tex-math></inline-formula> V), a threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V} _{\text {th}}$ </tex-math></inline-formula> ) of 0.6 V, a high current-gain cutoff frequency <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\text {T}}$ </tex-math></inline-formula> of 61 GHz, and a high power-gain cutoff frequency <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f} _{\text {MAX}}$ </tex-math></inline-formula> of 130 GHz. Approximately 5% current collapse occurs at a drain quiescent bias of 30 V. The calculated Johnson’s figure of merit (J-FOM = <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{BV}_{\text {DS}}\times {f}_{T}$ </tex-math></inline-formula> ) is 11.2 THz-V, the highest so far for GaN-based HEMTs. The calculated <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text {BV}_{\text {DS}} \times {f}_{\text {MAX}}$ </tex-math></inline-formula> value is 23.8 THz-V, indicating significantly improved the speed and power performance of the E-mode GaN-based HEMT.

Device Technologies of GaN-on-Si for Power Electronics: Enhancement-Mode Hybrid MOS-HFET and Lateral Diode

In this paper, a high performance enhancement-mode (E-mode) Al2O3/GaN hybrid MOS-HFET and a novel AlGaN/GaN lateral diode are experimentally demonstrated. Based on the proposed approach to engineer the dielectric/GaN positive interface fixed charges ( Q it+) by postdielectric annealing, the E-mode metal–oxide–semiconductor heterojunction field-effect transistor (MOS-HFET) obtains a better tradeoff between the threshold voltage ( V TH) control and drain current drive capability due to the significant suppression of Q it+ and the associated remote scattering effect. Owing to the uniquely high V TH and gate swing, the E-mode MOS-HFET exhibits respectable higher faulty turn on immunity that is prone to improve the reliability of the device in power switching applications and simplify the gate driver design. On the other hand, by featuring a new turn-on mechanism of MIS-gate-controlled 2-D electron gas (2DEG) channel, the diode exhibits ultralow turn-on voltage and reverse leakage current, which are beneficial to lowering the conduction loss and off-state power consumption of GaN-on-Si power diodes. Moreover, the diode is compatible with E-mode hybrid MOS-HFET, which is promising for realizing full-GaN single-chip power ICs.

Enhancement-Mode AlGaN/GaN Fin-MOSHEMTs on Si Substrate With Atomic Layer Epitaxy MgCaO

We have demonstrated high-performance enhancement-mode or normally-off AlGaN/GaN fin-MOSHEMTs on a Si substrate with various fin width of 100–210 nm using atomic layer epitaxy (ALE) MgCaO as the gate dielectric. Through the fixed negative charges in MgCaO depleting the channel at the fin sidewalls, in contrast to the usual positive charges in atomic layer deposited amorphous Al2O3, the threshold voltage ( ${V} _{T}$ ) is positively shifted and normally-off device is realized. A high maximum drain current ( ${I} _{\text {DMAX}}$ ) of 670 mA/mm, high on/off ratio of 1010 ~ 1012, and ${V} _{T}$ of 1 V have been achieved on the device. Combining with negligible ${I} _{D}$ – ${V} _{\text {GS}}$ hysteresis of 30 mV and current collapse, the ALE MgCaO fin-MOSHEMT turns out to be a promising candidate for the future GaN power device applications.

Thin-barrier enhancement-mode AlGaN/GaN MIS-HEMT using ALD Al2O3 as gate insulator**Project supported by the National Natural Science Foundation of China (Nos. 61474101, 61106130) and the Natural Science Foundation of Jiangsu Province of China (No. BK20131072).

A high-performance enhancement-mode (E-mode) gallium nitride (GaN)-based metal–insulator–semiconductor high electron mobility transistor (MIS-HEMT) that employs a 5-nm-thick aluminum gallium nitride (Al0.3Ga0.7N) as a barrier layer and relies on silicon nitride (SiN) passivation to control the 2DEG density is presented. Unlike the SiN passivation, aluminum oxide (Al2O3) by atomic layer deposition (ALD) on AlGaN surface would not increase the 2DEG density in the heterointerface. ALD Al2O3 was used as gate insulator after the depletion by etching of the SiN in the gate region. The E-mode MIS-HEMT with gate length (LG) of 1 μm showed a maximum drain current density (IDS) of 657 mA/mm, a maximum extrinsic transconductance (gm) of 187 mS/mm and a threshold voltage (Vth) of 1 V. Comparing with the corresponding E-mode HEMT, the device performances had been greatly improved due to the insertion of Al2O3 gate insulator. This provided an excellent way to realize E-mode AlGaN/GaN MIS-HEMTs with both high Vth and IDS.

High RF Performance Enhancement-Mode Al&lt;sub&gt;2&lt;/sub&gt;O&lt;sub&gt;3&lt;/sub&gt;/AlGaN/GaN MIS-HEMTs Fabricated With High-Temperature Gate-Recess Technique

In this letter, we report high-performance enhancement-mode (E-mode) Al2O3/AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs) fabricated with high-temperature low-damage gate recess technique. The high-temperature gate recess is implemented by increasing the substrate temperature to 180 °C to enhance the desorption of chlorine-based etching residues during the dry etching of AlGaN barrier. High-crystal-quality Al2O3 gate dielectric was grown by atomic-layer deposition using O3 as the oxygen source to suppress hydrogen-induced weak bonds. The fabricated E-mode MIS-HEMTs exhibit a threshold voltage of 1.6 V, a pulsed drive current of 1.13 A/mm, and very low OFF-state standby power of $6.8 \times 10^{\mathrm {-8}}$ W/mm at $V_{\mathrm {GS}} =0$ V and $V_{\mathrm {DS}} =30$ V. At 4 GHz and in pulse-mode operation, the output power density and power-added efficiency were measured to be 5.76 W/mm and 57%, both of which are the highest for GaN-based E-mode MIS-HEMTs reported to date.

GaAs Enhancement-Mode NMOSFETs Enabled by Atomic Layer Epitaxial $\hbox{La}_{1.8}\hbox{Y}_{0.2}\hbox{O}_{3}$ as Dielectric

We demonstrate high-performance enhancement-mode (E-mode) GaAs NMOSFETs with an epitaxial gate dielectric layer of <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hbox{La}_{1.8}\hbox{Y}_{0.2}\hbox{O}_{3}$</tex></formula> grown by atomic layer epitaxy (ALE) on GaAs(111)A substrates. A 0.5- <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu\hbox{m}$</tex> </formula> -gate-length device has a record-high maximum drain current of 336 mA/mm for surface-channel E-mode GaAs NMOSFETs, a peak intrinsic transconductance of 210 mS/mm, a subthreshold swing of 97 mV/dec, and an <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$I_{\rm ON}/I_{\rm OFF}$</tex></formula> ratio larger than <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hbox{10}^{7}$</tex></formula> . The thermal stability of the single-crystalline <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hbox{La}_{1.8}\hbox{Y}_{0.2}\hbox{O}_{3}$</tex></formula> –single-crystalline GaAs interface is investigated by capacitance–voltage ( <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$C{-}V$</tex></formula> ) and conductance–voltage <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(G{-}V)$</tex> </formula> analysis. High-temperature annealing is found to be effective to reduce <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$D_{\rm it}$</tex></formula> .

Enhancement-Mode AlN/GaN MOSHFETs on Si Substrate With Regrown Source/Drain by MOCVD

High-performance enhancement-mode (E-mode) AlN/GaN metal-oxide-semiconductor heterojunction field-effect transistors (MOSHFETs) on Si substrates have been demonstrated. Record high peak transconductance G <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sub> of 509 mS/mm and maximum drain current I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">d</sub> of 860 mA/mm were achieved for E-mode MOSHFETs with a source/drain spacing value L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sd</sub> of 0.7 m. Low gate leakage current (<;10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> mA/mm) and improved ohmic contact resistance (0.153 Ω·mm) were enabled by a combination of Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> gate dielectric and regrown source/drain contacts. Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> also significantly increases the 2DEG density under the channel, which is beneficial for device performance by reducing the access resistance. The on-resistance is as low as 1.63 mm. The average regrowth interface resistance across the sample was estimated to be 0.056 Ω·mm. The E-mode MOSHFETs exhibit a high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</sub> ratio up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> .

Fabrication of Enhancement-Mode AlGaN/GaN MISHEMTs by Using Fluorinated $ \hbox{Al}_{2}\hbox{O}_{3}$ as Gate Dielectrics

High-performance enhancement-mode (E-mode) AlGaN/GaN metal-insulator-semiconductor HEMTs (MISHEMTs) were realized by using fluorinated Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> thin films as gate dielectrics. The depth profile of Fluoride atoms determined by X-ray photoelectron spectroscopy showed that the fluorine (F) ions were incorporated into the surface (approximately 2 nm) of the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> gate dielectrics. With proper amount of F-ion incorporation, the threshold voltage of MISHEMTs shifted from - 4.8 to 0.11 V, converting depletion-mode (D-mode) MISHEMTs to E-mode ones. The E-mode MISHEMTs exhibited high performances including a high transconductance value of 153 mS/mm and a large saturated drain-current value <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ds</sub> of 547 mA/mm. This paves a new way to fabricate E-mode AlGaN/GaN MISHEMTs and allows the monolithic integration of E/D-mode MISHEMTs for analog integrated circuits.

Enhancement-Mode AlN/GaN HFETs Using Cat-CVD SiN

High-performance enhancement-mode (E-mode) AIN (2.5 nm)/GaN heterostructure field-effect transistors (HFETs) were fabricated with a novel method using SiN passivation by catalytic chemical vapor deposition (Cat-CVD). We found that the formation of a 2-D electron gas (2DEG) in the AIN/GaN heterostructure can be controlled by the presence of the Cat-CVD SiN on the barrier layer. Before SiN deposition, the 2DEG at the AIN/GaN heterointerface was completely depleted because of the extremely thin barrier layer. On the other hand, after SiN deposition, the decrease in AIN surface barrier height induced a high-density 2DEG. The E-mode HFETs with gate lengths of 100-180 nm and threshold voltages from +0.14 to +0.55 V showed a maximum drain-current density of 0.70-0.92 A/mm and a maximum extrinsic transconductance of 362-400 mS/mm. A current-gain cutoff frequency of 87 GHz and maximum oscillation frequency of 149 GHz were obtained for the 100-nm-gate devices.

High performance enhancement mode high electron mobility transistors (E-HEMTs) lattice matched to InP

The fabrication of 1.0 /spl mu/m gate length enhancement mode high electron mobility transistors (E-HEMTs) in the lattice matched InAlAs/InGaAs/InP material system is reported. Typical device DC characteristics include a threshold voltage of 275 mV, transconductance of 650 mS/mm, output conductance of 7.0 mS/mm, and an off-state breakdown voltage of 16 V. The devices exhibited excellent RF performance with an f/sub t/ of 35 GHz and an f/sub max/ of 80 GHz. For the first time, a process for E-HEMTs lattice matched to InP suitable for circuit applications is presented.