High-performance Electronics Research Articles

Tailoring amorphous boron nitride for high-performance two-dimensional electronics

Two-dimensional (2D) materials have garnered significant attention in recent years due to their atomically thin structure and unique electronic and optoelectronic properties. To harness their full potential for applications in next-generation electronics and photonics, precise control over the dielectric environment surrounding the 2D material is critical. The lack of nucleation sites on 2D surfaces to form thin, uniform dielectric layers often leads to interfacial defects that degrade the device performance, posing a major roadblock in the realization of 2D-based devices. Here, we demonstrate a wafer-scale, low-temperature process (<250 °C) using atomic layer deposition (ALD) for the synthesis of uniform, conformal amorphous boron nitride (aBN) thin films. ALD deposition temperatures between 125 and 250 °C result in stoichiometric films with high oxidative stability, yielding a dielectric strength of 8.2 MV/cm. Utilizing a seed-free ALD approach, we form uniform aBN dielectric layers on 2D surfaces and fabricate multiple quantum well structures of aBN/MoS2 and aBN-encapsulated double-gated monolayer (ML) MoS2 field-effect transistors to evaluate the impact of aBN dielectric environment on MoS2 optoelectronic and electronic properties. Our work in scalable aBN dielectric integration paves a way towards realizing the theoretical performance of 2D materials for next-generation electronics.

Low-loss carrier stored trench-gate bipolar transistor with split-gate optimization

In the conventional carrier stored trench-gate bipolar transistor (CSTBT) device, a lower conduction voltage drop (Von) can be achieved with higher carrier stored (CS) layer dosage. However, the trench bottom is weakened leading to easier breakdown under high electrical field. In this work, the trench-gate structure of the conventional CSTBT is optimized and split into three components. The bottom and top left components of the split trench structure are equipotential with the emitter, which effectively eliminated the impact of collector on the trench gate with reduced gate charge (Qgc). In addition, another n-type CS layer is formed adjacent to the emitter to further enhance the hole carrier storage effect near emitter. This improves the trade-off between Von and turn-off time (Toff) without breakdown voltage (BV) degradation. The simulation results show that in comparison with the conventional CSTBT, the proposed device exhibits 64.6% reduction in Qgc under the same Von, while the turn-off time (Toff) and the saturation current are reduced by 14.9% and 43.4%, respectively. The short-circuit capability is also studied with 2.83 times improvement. Our proposed device shown here provides a feasible and attractive approach for advanced high-performance power electronics applications.

Van der Waals Epitaxially Grown Molecular Crystal Dielectric Sb2O3 for 2D Electronics.

Two-dimensional (2D) semiconducting materials have attracted significant interest as promising candidates for channel materials owing to their high mobility and gate tunability at atomic-layer thickness. However, the development of 2D electronics is impeded due to the difficulty in formation of high-quality dielectrics with a clean and nondestructive interface. Here, we report the direct van der Waals epitaxial growth of a molecular crystal dielectric, Sb2O3, on 2D materials by physical vapor deposition. The grown Sb2O3 nanosheets showed epitaxial relations of 0 and 180° with the 2D template, maintaining high crystallinity and an ultrasharp vdW interface with the 2D materials. As a result, the Sb2O3 nanosheets exhibited a high breakdown field of 18.6 MV/cm for 2L Sb2O3 with a thickness of 1.3 nm and a very low leakage current of 2.47 × 10-7 A/cm2 for 3L Sb2O3 with a thickness of 1.96 nm. We also observed two types of grain boundaries (GBs) with misorientation angles of 0 and 60°. The 0°-GB with a well-stitched boundary showed higher electrical and thermal stabilities than those of the 60°-GB with a disordered boundary. Our work demonstrates a method to epitaxially grow molecular crystal dielectrics on 2D materials without causing any damage, a requirement for high-performance 2D electronics.

GRAPHITE FOAM STRUCTURES AS AN EFFECTIVE MEANS TO COOL HIGH-PERFORMANCE ELECTRONICS

Due to their unique heat transfer features, graphite foams are used in the current analysis to form heat sinks effective enough to dissipate extreme heat generated within high-performance electronics. The heat sinks proposed are formed from foamed-baffles arranged either in parallel or perpendicular to the coolant paths through the staggered slots in between to alleviate the penalty of pressure drop while maintaining high heat dissipation capability. Two different sorts of dielectric coolants namely, air and the FC-3283 electronic liquid developed by 3MTM, have been utilized to directly dissipate the heat generated. The feasibility of the currently proposed heat sinks has been examined numerically based on the volume averaging concept of porous media employing the local thermal non-equilibrium model to account for interstitial heat exchange between the foam solid matrix and the fluid particles flowing across. A wide range of design parameters has been tested including the heat sink configuration along with structural characteristics of the graphite foam used. It has been found that foam baffles oriented perpendicular to the path of coolant flow can dissipate heat by about 50% better than those parallel to it, but with higher pressure losses. It has also been found that heat dissipation capability, for a certain orientation of baffles, can be improved by up to 100% when the foam pore size is doubled with outstanding saving in pressure losses by up to 300%. The impact of operating conditions, including the coolant flowrate and the heat flux applied, has also been inspected. The currently proposed heat sinks have been found efficient to meet the thermal demands of high-performance electronics and sweep away the extreme heat generated there with reasonable cost of pressure drop, where the proper selection of design parameters in light of the operating conditions applied can prevent the emergence of hot spots entirely. Extreme operating conditions, i.e. with heat density of up to 10W/cm2 for air-cooled heat sinks and 100W/cm2 for those cooled with FC-3283, can be well managed when a heat sink is configured from baffles that are oriented perpendicularly to the coolant flow path and formed of graphite foam having low porosity (∅=0.8) and larger pore size

Boltzmann Switching MoS2 Metal-Semiconductor Field-Effect Transistors Enabled by Monolithic-Oxide-Gapped Metal Gates at the Schottky-Mott Limit.

A gate stack that facilitates a high-quality interface and tight electrostatic control is crucial for realizing high-performance and low-power field-effect transistors (FETs). However, when constructing conventional metal-oxide-semiconductor structures with two-dimensional (2D) transition metal dichalcogenide channels, achieving these requirements becomes challenging due to inherent difficulties in obtaining high-quality gate dielectrics through native oxidation or film deposition. Here, a gate-dielectric-less device architecture of van der Waals Schottky gated metal-semiconductor FETs (vdW-SG MESFETs) using a molybdenum disulfide (MoS2) channel and surface-oxidized metal gates such as nickel and copper is reported. Benefiting from the strong SG coupling, these MESFETs operate at remarkably low gate voltages, <0.5V. Notably, they also exhibit Boltzmann-limited switching behavior featured by a subthreshold swing of ≈60mVdec-1 and negligible hysteresis. These ideal FET characteristics are attributed to the formation of a Fermi-level (EF) pinning-free gate stack at the Schottky-Mott limit. Furthermore, authors experimentally and theoretically confirm that EF depinning can be achieved by suppressing both metal-induced and disorder-induced gap states at the interface between the monolithic-oxide-gapped metal gate and the MoS2 channel. This work paves a new route for designing high-performance and energy-efficient 2D electronics.

Optical Signal Investigation of Monolayer MoS2 Grown Via Glass-Assisted CVD On Patterned Surfaces

Enhancing photoluminescence (PL) in single-layer transition metal dichalcogenides has garnered significant interest, particularly for advancing high-performance 2D electronics and optoelectronics. The combination of surface engineering and contemporary growth methods has provided a platform for investigating optical signals. In this study, we present variations in PL and Raman signals of single-layer MoS2 flakes grown conformally using the glass-assisted CVD method on square-patterned surfaces with varying well depths. PL spectroscopy revealed a systematic and pronounced enhancement in intensities as the valley thickness decreased from 285 nm to 225 nm. Conversely, for the hill regions of the samples, the PL intensity initially increased with decreasing valley thickness and then decreased, despite the hill regions having a constant thickness of 300 nm. On the other hand, PL maps did not exhibit a systematic dependence of intensities on the hill-valley thickness distinction, contrary to expected results based on literature data for similar materials on flat surfaces. The origin of the intensity oscillations was attributed to possible mechanisms, including thickness-dependent interference and strain-related exciton funneling effects. Additionally, Raman measurements revealed irregular variations in intensity in hill regions, dependent on the thicknesses of the underlying SiO2 layers. Furthermore, we observed that the sizes of the flakes increased as the well depths of the underlying patterned surface decreased. This phenomenon might be attributed to alterations in the carrier gas flow pattern and varying temperature gradients between the hills and valleys. These results hold substantial potential to open new avenues for the integration of 2D transition metal dichalcogenides into on-chip electronic and optoelectronic devices.

Stacking-Order Dependence of Strain in Bilayer Graphene: Implications for High-Performance Electronics

Stacking-Order Dependence of Strain in Bilayer Graphene: Implications for High-Performance Electronics

Self-Assembly Behavior, Aggregation Structure, and the Charge Carrier Transport Properties of S-Heterocyclic Annulated Perylene Diimide Derivatives.

The construction of high-performance n-type semiconductors is crucial for the advancement of organic electronics. As an attractive n-type semiconductor, molecular systems based on perylene diimide derivatives (PDIs) have been extensively investigated over recent years. Owing to the fascinating aggregated structure and high performance, S-heterocyclic annulated PDIs (SPDIs) are receiving increasing attention. However, the relationship between the structure and the electrical properties of SPDIs has not been deeply revealed, restricting the progress of PDI-based organic electronics. Here, we developed two novel SPDIs with linear and dendronized substituents in the imide position, named linear SPDI and dendronized SPDI, respectively. A series of structural and property characterizations indicated that linear SPDI formed a long-range-ordered crystalline structure based on helical supramolecular columns, while dendronized SPDI, with longer alkyl side chains, formed a 3D-ordered crystalline structure at a low temperature, which transformed into a hexagonal columnar liquid crystal structure at a high temperature. Moreover, no significant charge carrier transport signal was examined for linear SPDI, while dendronized SPDI had a charge carrier mobility of 3.5 × 10-3 cm2 V-1 s-1 and 2.1 × 10-3 cm2 V-1 s-1 in the crystalline and liquid crystalline state, respectively. These findings highlight the importance of the structure-function relationship in PDIs, and also offer useful roadmaps for the design of high-performance organic electronics for down-to-earth applications.

Hummers' method-assisted liquid-phase exfoliation enables the fabrication of few-layer borophene from bulk boron.

The fabrication of few-layer borophene (BP) from bulk boron (b-B) is of great importance and still a scientific challenge due to the complex structure and crystallinity of b-B. Herein, we propose a novel technique to prepare a few-layer BP on a large scale with a large lateral size in a well-controlled manner. For this, we employed the Hummers' method-assisted liquid-phase exfoliation. In the first step, the chemical exfoliation of the b-B as a precursor was performed by the modified Hummers' method. After chemical exfoliation, mechanical delamination was employed by using an immersion sonicator. Finally, BP sheets were collected with dimensions ranging from several hundred nanometers to a few micrometers and an average thickness of 4.2 nm. We envision that the proposed low-cost, flexible, and large-scale production method will provide unique advantages for the application of few-layer BP in the realization of high-performance electronics, optoelectronics, flexible devices, sensing systems, energy conversion, and storage devices.

Flexible Broadband Organic Photodetectors with Ternary Planar-Mixed Heterojunction Semiconductors and Solution-Processed Polymeric Electrode.

Flexible organic photodetectors (OPDs) hold immense promise in health monitoring sensors, flexible imaging sensors, and portable optical communication. Nevertheless, the actualization of high-performance flexible electronics has been hindered by rigid electrodes such as metals or metal oxides. In this work, we constructed a flexible broadband organic photodetector using a solution-processed polymeric electrode, which exhibits flexibility surpassing that of conventional indium tin oxide (ITO) electrodes. Additionally, we employed a planar-mixed heterojunction (PMHJ) through a sequential deposition method and introduced PC71BM as the third constituent into the PM6/Y6 binary active layer, resulting in enhanced photodetection performance and a broadend spectral range. The optimized OPDs demonstrated remarkable detectivity (D*) exceeding 1012 Jones in brodband from 300 to 900 nm, with a champion D* of 6.31 × 1012 Jones at 790 nm. Furthermore, after undergoing 500 cycles of bending, the D* retained approximately 78% of its original performance, highlighting the outstanding mechanical stability. This work presents a promising pathway toward the development of flexible broadband OPDs using a straightforward method, offering enhanced compatibility in diverse application scenarios and propelling the frontier of flexible optoelectronic research.

Effect of polymer concentration on molecular alignment behavior during scanning wave photopolymerization

Molecularly aligned liquid-crystalline (LC) polymer films hold great promise for next-generation high-performance photonics, electronics, robotics, and medical devices. Photoalignment methods capable of achieving precise molecular alignment in a noncontact manner have been actively studied. Recently, we proposed the concept of using spatiotemporal photopolymerization to induce molecular diffusion and the resulting alignment, termed scanning wave photopolymerization (SWaP). The spatial gradient of the polymer concentration is the dominant factor in inducing the molecular diffusion and alignment of LCs. However, the effect of polymer concentration on molecular alignment behavior remains unclear. In this study, we performed SWaP at different exposure energies to modulate the polymer concentration during polymerization. We found that a certain polymer concentration was required to initiate the alignment. Furthermore, the phase diagram of the polymer/monomer mixtures and real-time observations during SWaP revealed that phase emergence and unidirectional molecular alignment occurred simultaneously when the polymer concentration exceeded 50%. Since SWaP achieves molecular alignment coincident with photopolymerization, it has the potential to revolutionize material fabrication by consolidating the multiple-step processes required to create functional materials in a single step.

Breaking Fundamental Limitation of Flow-Induced Anisotropic Growth for Large-Scale and Fast Printing of Organic Single-Crystal Films.

Advanced organic electronic technologies have put forward a pressing demand for cost-effective and high-throughput fabrication of organic single-crystal films (OSCFs). However, solution-printed OSCFs are typically plagued by the existence of abundant structural defects, which pose a formidable challenge to achieving large-scale and high-performance organic electronics. Here, it is elucidated that these structural defects are mainly originated from printing flow-induced anisotropic growth, an important factor that is overlooked for too long. In light of this, a surfactant-additive printing method is proposed to effectively overcome the anisotropic growth, enabling the deposition of uniform OSCFs over the wafer scale at a high speed of 1.2 mm s-1 at room temperature. The resulting OSCF exhibits appealing performance with a high average mobility up to 10.7 cm2 V-1 s-1, which is one of the highest values for flexible organic field-effect transistor arrays. Moreover, large-scale OSCF-based flexible logic circuits, which can be bent without degradation to a radius as small as 4.0 mm and over 1000 cycles are realized. The work provides profound insights into breaking the limitation of flow-induced anisotropic growth and opens new avenues for printing large-scale organic single-crystal electronics.

Continuous production of ultratough semiconducting polymer fibers with high electronic performance.

Conjugated polymers have demonstrated promising optoelectronic properties, but their brittleness and poor mechanical characteristics have hindered their fabrication into durable fibers and textiles. Here, we report a universal approach to continuously producing highly strong, ultratough conjugated polymer fibers using a flow-enhanced crystallization (FLEX) method. These fibers exhibit one order of magnitude higher tensile strength (>200 megapascals) and toughness (>80 megajoules per cubic meter) than traditional semiconducting polymer fibers and films, outperforming many synthetic fibers, ready for scalable production. These fibers also exhibit unique strain-enhanced electronic properties and exceptional performance when used as stretchable conductors, thermoelectrics, transistors, and sensors. This work not only highlights the influence of fluid mechanical effects on the crystallization and mechanical properties of conjugated polymers but also opens up exciting possibilities for integrating these functional fibers into wearable electronics.

Flash healing of laser-induced graphene

The advancement of laser-induced graphene (LIG) technology has streamlined the fabrications of flexible graphene devices. However, the ultrafast kinetics triggered by laser irradiation generates intrinsic amorphous characteristics, leading to high resistivity and compromised performance in electronic devices. Healing graphene defects in specific patterns is technologically challenging by conventional methods. Herein, we report the rapid rectification of LIG’s topological defects by flash Joule heating in milliseconds (referred to as F-LIG), whilst preserving its overall structure and porosity. The F-LIG exhibits a decreased ID/IG ratio from 0.84 – 0.33 and increased crystalline domain from Raman analysis, coupled with a 5-fold surge in conductivity. Pair distribution function and atomic-resolution imaging delineate a broader-range order of F-LIG with a shorter C-C bond of 1.425 Å. The improved crystallinity and conductivity of F-LIG with excellent flexibility enables its utilization in high-performance soft electronics and low-voltage disinfections. Notably, our F-LIG/polydimethylsiloxane strain sensor exhibits a gauge factor of 129.3 within 10% strain, which outperforms pristine LIG by 800%, showcasing significant potential for human-machine interfaces.

Graphene nanoribbons grown in hBN stacks for high-performance electronics.

Van der Waals encapsulation of two-dimensional materials in hexagonal boron nitride (hBN) stacks is a promising way to create ultrahigh-performance electronic devices1-4. However, contemporary approaches for achieving van der Waals encapsulation, which involve artificial layer stacking using mechanical transfer techniques, are difficult to control, prone to contamination and unscalable. Here we report the transfer-free direct growth of high-quality graphene nanoribbons (GNRs) in hBN stacks. The as-grown embedded GNRs exhibit highly desirable features being ultralong (up to 0.25 mm), ultranarrow (<5 nm) and homochiral with zigzag edges. Our atomistic simulations show that the mechanism underlying the embedded growth involves ultralow GNR friction when sliding between AA'-stacked hBN layers. Using the grown structures, we demonstrate the transfer-free fabrication of embedded GNR field-effect devices that exhibit excellent performance at room temperature with mobilities of up to 4,600 cm2 V-1 s-1 and on-off ratios of up to 106. This paves the way for the bottom-up fabrication of high-performance electronic devices based on embedded layered materials.

An investigation into the short-circuit characteristics of Sic MOSFET power devices

Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) devices exhibit substantial prospects for application under extreme operational conditions, including elevated temperatures, high voltages, and high frequencies. Nevertheless, owing to their distinctive material and structural attributes, SiC MOSFET devices are not devoid of challenges, with the short-circuit phenomenon constituting a pivotal avenue of inquiry. The short-circuit effect pertains to the abrupt escalation of leakage current that these devices might undergo under elevated voltage conditions, thereby exerting a perturbing influence on their stability and reliability. Investigations into the short-circuit effect predominantly revolve around two dimensions: one involves comprehending its underlying physical mechanisms, while the other centers on identifying commensurate remedial approaches.With respect to the underlying physical mechanisms, researchers have discerned that the elevated breakdown field strength and augmented carrier mobility intrinsic to SiC materials engender an augmentation in leakage current, consequently giving rise to the short-circuit effect. Furthermore, factors such as oxide layer anomalies and surface states are also conceivable catalysts for the surge in leakage current. To rectify this predicament, scholars have proffered a panoply of stratagems, encompassing the optimization of material synthesis processes, enhancement of oxide layer quality, refinement of device structural designs, and incorporation of protective circuitry, among others. In summation, the investigation of the short-circuit effect in silicon carbide MOSFET devices is fundamentally aimed at attaining an in-depth comprehension of its causative mechanisms. Moreover, it endeavors to proffer efficacious resolutions conducive to augmenting the reliability and steadfastness of these devices within high-temperature and high-voltage environments, thereby facilitating their widespread integration within the ambit of high-performance power electronics.

Degradable silk fibroin based piezoresistive sensor for wearable biomonitoring

Degradable wearable electronics are attracting increasing attention to weaken or eliminate the negative effect of waste e-wastes and promote the development of medical implants without secondary post-treatment. Although various degradable materials have been explored for wearable electronics, the development of degradable wearable electronics with integrated characteristics of highly sensing performances and low-cost manufacture remains challenging. Herein, we developed a facile, low-cost, and environmentally friendly approach to fabricate a biocompatible and degradable silk fibroin based wearable electronics (SFWE) for on-body monitoring. A combination of rose petal templating and hollow carbon nanospheres endows as-fabricated SFWE with good sensitivity (5.63 kPa−1), a fast response time (147 ms), and stable durability (15,000 cycles). The degradable phenomenon has been observed in the solution of 1 M NaOH, confirming that silk fibroin based wearable electronics possess degradable property. Furthermore, the as-fabricated SFWE have been demonstrated that have abilities to monitor knuckle bending, muscle movement, and facial expression. This work offers an ecologically-benign and cost-effective approach to fabricate high-performance wearable electronics.

Freestanding Serpentine Silicon Strips with Ultrahigh Stretchability over 300% for Wearable Electronics.

Well-functionalized electronic materials, such as silicon, in a stretchable format are desirable for high-performance wearable electronics. However, obtaining Si materials that meet the required stretchability of over 100% for wearable applications remains a significant challenge. Herein, a rational design strategy is proposed to achieve freestanding serpentine Si strips (FS-Si strips) with ultrahigh stretchability, fulfilling wearable requirements. The self-supporting feature makes the strips get rid of excessive constraints from substrates and enables them to deform with the minimum strain energy. Micrometer-scale thicknesses enhance robustness, and large diameter-to-width ratios effectively reduce strain concentration. Consequently, the FS-Si strips with the optimum design could withstand 300% stretch, bending, and torsion without fracturing, even under rough manual operation. They also exhibit excellent stability and durability over 50,000 cycles of 100% stretching cycles. For wearable applications, the FS-Si strips can maintain conformal contact with the skin and have a maximum stretchability of 120%. Moreover, they are electrically insensitive to large deformations, which ensure signal stability during their daily use. Combined with mature processing techniques and the excellent semiconductor properties of Si, FS-Si strips are promising core stretchable electronic materials for wearable electronics.

Experimental investigation on optimization of the performance of gallium-based liquid metal with high thermal conductivity as thermal interface material for efficient electronic cooling

Effective thermal conduction between solid interfaces has emerged as a major bottleneck in heat dissipating heat from new-generation high-performance electronics. Gallium-based liquid metals (LMs), known for their high thermal conductivity, are gaining significant traction as thermal interface materials (TIMs) for enhanced thermal management. In this work, to address the key issues facing the application of gallium-based LMs as TIMs, including the lack of composition ratio data, poor coating performance and the need for improved thermal conductivity, two types of gallium-based LM-TIMs (Ga-In binary LM-TIMs and Ga-In-Sn ternary LM-TIMs) with different composition ratios were experimentally prepared, investigated and optimized. The thermal conductivities of the LM-TIMs at different temperatures (80 - 120 ℃) were tested, and the application reliability of the LM-TIMs was optimized by continuously destructing the oxide layer and filling micro copper particles. The influence of optimization parameters such as the duration of the destruction of oxide layer, the filling ratios of the particles and the particle size on the operation performance of the LM-TIMs was studied and analyzed. The results showed that the LM-TIMs exhibited excellent thermal conductivities of 29.6 - 38.5 W/(m·K), and the thermal conductivity increased with indium mass fraction and decreased with tin mass fraction. Significant improvements in coating performance were observed with the increase of the duration of destructing oxide layer, but it led to a reduction in thermal conductivity. Balancing coating performance and thermal conductivity, it was found that 30 min was the ideal duration. The filling of micro particles made up for the reduced thermal conductivity, and higher filling ratios and smaller particle sizes achieved better enhancement. In the experiment, a filling ratio of 5 % was appropriate because solidification occurred in LM-TIMs at higher filling ratios which weakened the thermal conductivity. This work provided valuable reference for the application and optimization of high thermal conductive gallium-based LM-TIMs.

High performance bilayer MoTe2 transistors with co-sputtered ternary HfAlO2 high-k dielectric

We demonstrated that ternary HfAlO2 amorphous film prepared with common co-sputtering technology can be a suitable gate dielectric for bilayer MoTe2 transistors. The film quality can be improved by optimizing the sputtering process and post-annealing treatment, which is superior to its binary Al2O3 and HfO2 components and satisfies gate dielectric criteria. The bilayer MoTe2 transistors with ∼29-nm-thick HfAlO2 gate dielectric exhibit an Ion/Ioff ratio of over 108 by a low operating voltage, together with a small subthreshold swing ≈ 71.22 mV/dec. These promising characteristics favor the development of high-performance and low-power ultrathin MoTe2-based beyond-silicon electronics.