High Performance Computing Networks Research Articles

A Platform Programming Paradigm for Heterogeneous Systems Integration

To cope with growing computing performance requirements, cyber-physical systems architectures are moving toward heterogeneous high-performance computer architectures and networks. Such architectures, however, incur intricate side effects that challenge traditional software design and integration. The programming paradigm can take a key role in mastering software design, as experience in automotive design demonstrates. To cope with the integration challenge, this industry has started introducing a programming paradigm that efficiently preserves application data flow under platform integration and changes with minimum performance loss. This article will revisit this paradigm that is currently used for lock-free multicore programming and explain its extension to the system level. It will then explore its application to two important developments in industrial design. This article will conclude with an evaluation of its properties, its overhead, and its application toward a robust design process.

Toward lower-diameter large-scale HPC and data center networks with co-packaged optics

We investigate the advantages of using co-packaged optics for building low-diameter, large-scale high-performance computing (HPC) and data center networks. The increased escape bandwidth offered by co-packaged optics can enable high-radix switch implementations of more than 150 switch ports, which can be combined with data rates of up to 400 Gb/s per port. From the network architecture perspective, the key benefits of using co-packaged optics in future fat-tree networks include (a) the ability to implement large-scale topologies of > --> 11 , 000 end points by eliminating the need for a third switching layer and (b) the ability to provide up to 4 × higher bisection bandwidth compared to existing solutions, reducing at the same time the number of required switch application-specific integrated circuits by > --> 80 % . From the network operation perspective, both reduced energy consumption and lower packet delays can be achieved since fewer hops are required; i.e., packets need to traverse fewer serializer/deserializer lanes and fewer switch buffers, which reduces the probability of contending with other packets and improves the tolerance of network congestion. The performance of the proposed architecture is evaluated via discrete-event simulations for a wide range of representative HPC synthetic-traffic cases that include both hotspot and non-hotspot scenarios. The simulation results suggest that co-packaged optics form a promising solution to keep up with bandwidth scaling in future networks, while the reduced number of switching layers can lead to significant mean packet delay improvements that start from 30% and reach up to 74% for high-load conditions.

An efficient scheduling algorithm for dataflow architecture using loop-pipelining

Dataflow architecture has native advantages in achieving high instruction parallelism and power efficiency for today’s emerging applications such as high performance computing and deep neural network. In dataflow computing, the execution of instructions is driven by data, so the data transfer efficiency of the network on chip (NoC) is a key factor affecting performance. However, the NoC performance degrades due to the increasing use of multicast communications in many applications. The existing dataflow architecture instruction scheduling algorithms do not optimize multicast communication between the instruction and its successor instructions, so the routing paths of many multicast packets have forks which cause bandwidth waste and potential network congestion. We propose a sharing path awareness (SPA) algorithm to optimize multicast communication in the dataflow architecture. The algorithm shares the routing paths from the instruction to its child node to reduce the NoC bandwidth waste through the instruction scheduler. For applications using software iteration, we further extend the loop optimization to the SPA algorithm to sufficiently exploit instruction-level parallelism. Compared with the state-of-the-art algorithm, we show that the SPA algorithm achieves 20.21% average performance improvement and 15.11% energy consumption reduction for our experimental workloads.

Construction and Management of Astronomical Big Data Analysis and Multi-dimensional Information Visualization Platform

The development of modern astronomy is rapidly and astronomical data increases exponentially. The HPC architecture based on GPU provides an efficient way of astronomic big data computing. Based on secure Ipv6 network environment, PMO has constructed the Big Data Analysis and Multi-dimensional Information Visualization Platform, which can reach the peak computing speed of 352Tflops and the totally storage capacity of 288TB. The platform is composed of 25 computing nodes, one management node and 5 storage nodes. The use of user-friendly, centralized cluster management software, the deployment of proprietary environmental control settings and multi-dimensional visualization of safety management systems form a multi-level, tridimensional and efficient management structure. A high-speed, high-capacity, highly reliable, secure and efficient high-performance computing cluster is finally constructed. The platform has a fully redundant, self-healing, highly scalable distributed storage system, a high-performance InfiniBand parallel computing and storage network, a complete job scheduling system, a cuda parallel computing architecture, and a variety of physical software tools for astronomical applications. It offers a great help to astronomical research topics such as astronomical image processing, moving target extraction, space target orbit calculation, numerical cosmology, cosmology simulation, galaxy fluid simulation. Thus it provides an important information support for the research work of 3 major breakthroughs and 5 key cultivation directions in the "One Three Five" plan of Purple Mountain Observatory.

Characteristics of Organic-Based Thermal Interface Materials Suitable for High Temperature Operation

Abstract Historically, for semiconductors subject to standard operating temperatures--which tend not to exceed 125°C--the Tg (glass transition temperatures) of the organic packaging materials protecting the chips is usually around 175°C. Given that, when it comes to electronics operating at high temperatures—typically an environment where the ambient temperature exceeds 200°C—the use of organic materials is generally prohibited due to rapid degradation. At those elevated temperatures, the packaging materials selected are generally composed of metals and ceramics but these materials come with their own shortfalls as well as higher material and manufacturing costs. Therefore, it would be desirable if there were ‘ruggedized’ versions of the organic compounds so commonly used in semiconductor packaging but available for more extreme temperatures, both to reduce cost and package footprint. Meanwhile, the demands from recent developments in high performance computing (HPC) and high-speed data networks means a greater need for increased power and thermal dissipation coupled with very large package body sizes to accommodate the high I/O count. The latest in server microprocessor (MPU) products can easily generate up to 300W during operation, and the heat generated must be quickly transported away from chip to prevent the threat of thermal shutdown. The thermal dissipation issue is controlled by the use of heat spreaders and heat sinks, both of which are intended to make contact with the back-side of a flipped MPU via a thermal interface material (TIM), as part of a large die, large body-size flip-chip ball grid array (FCBGA) package. The thermal interface materials discussed here are examples of organic engineered materials that are capable of withstanding higher operating temperatures than typically seen by semiconductors encased in organic-based packaging. This paper will look at the key material and mechanical attributes for a good thermal interface material, examines the pros-and-cons of various thermal interface material formulations, and discusses the factors for reliable thermal dissipation performance.

A Self-Adaptive Network for HPC Clouds: Architecture, Framework, and Implementation

Clouds offer flexible and economically attractive compute and storage solutions for enterprises. However, the effectiveness of cloud computing for high-performance computing (HPC) systems still remains questionable. When clouds are deployed on lossless interconnection networks, like InfiniBand (IB), challenges related to load-balancing, low-overhead virtualization, and performance isolation hinder full potential utilization of the underlying interconnect. Moreover, cloud data centers incorporate a highly dynamic environment rendering static network reconfigurations, typically used in IB systems, infeasible. In this paper, we present a framework for a self-adaptive network architecture for HPC clouds based on lossless interconnection networks, demonstrated by means of our implemented IB prototype. Our solution, based on a feedback control and optimization loop, enables the lossless HPC network to dynamically adapt to the varying traffic patterns, current resource availability, workload distributions, and also in accordance with the service provider-defined policies. Furthermore, we present IBAdapt, a simplified ruled-based language for the service providers to specify adaptation strategies used by the framework. Our developed self-adaptive IB network prototype is demonstrated using state-of-the-art industry software. The results obtained on a test cluster demonstrate the feasibility and effectiveness of the framework when it comes to improving Quality-of-Service compliance in HPC clouds.

Wavelength allocation for all-to-all broadcast in bidirectional optical WDM modified ring

All-to-all broadcast is to distribute an exclusive message from each node to all the other nodes in the network. This is a vital requirement in high performance computing and communication networks including datacenter operations. Such networks may spread across thousands of nodes by means of WDM optical networks. A ring topology is an important form of network topology as it is simple, easy to deploy and fault tolerant. Few previous works suggested connecting the alternate nodes of a backbone naive ring network, and called as modified ring to support huge traffic density with decreased delay, reduced call blocking probability and increased survivability. One of the major design issues in wavelength-division multiplexed networks is to aim for reduction in the number of wavelengths usage so as to reduce network cost and complexity. In this paper, for the modified ring network, all-to-all broadcast communication is studied under single hop routing model by means of a heuristic technique, which supports to identify and group non overlapping connections. Explicit wavelength allocation techniques are given to allot unique wavelengths for various groups of non overlapping connections. The results obtained shows that wavelength requirements for a modified ring is considerably reduced than that required for a naive ring network and hence makes it attractive for optical control plane.

A study on smart factory-based ambient intelligence context-aware intrusion detection system using machine learning

Digital transformation increasingly gains broad attentions from all the world and particularly studies on artificial intelligence, big data, cloud, and mobile are currently conducted. In addition, research based on ambient intelligence are also performed. Everything including condition information of all objects are shared on real time in AMI environment and all locations and objects are equipped with sensors. It acts intelligently such as decision-making. As sensors are equipped in locations and objects and connected with high-performance computer networks, users can receive information at any time and anywhere. In particular, the adoption of smart factory that turns all phases into automation and intellectualization based on cyber-physical system technology is proliferating. However, unexpected problems are likely to take place due to high complexity and uncertainty of smart factory. Thus, it is very likely to end manufacturing process, trigger malfunction, and leak important information. Although the necessity of analyzing threats to smart factory and systematic management is emphasized, there is insufficient research. In this paper, machine learning and context-aware intrusion detection system was built. The established system was effective to detection rate of anomaly signs and possibility of process achievement compared to the previous system.

Wide-sense nonblocking multicast in optical WDM networks

Multicast communication is the concurrent transmission of data from one source node to many destination nodes. It is widely deployed in high performance computing and communication networks. In this article, wide-sense nonblocking multicast communication is studied in wavelength division multiplexing networks namely modified linear array, unidirectional and bidirectional modified ring networks. The sufficient and necessary condition on the minimum wavelength number required for the network to be wide-sense nonblocking is derived for each of the above network topologies under longest link first routing technique which employs approximately half the number of hops when compared with networks without modification. An explicit wavelength allotment technique for multicast assignment is also given for each of the above network topologies.

Routing and Fault Tolerance in Z-Fat Tree

Fat tree topologies have been extensively used as interconnection networks for high performance computing, cluster and data center systems, with their most recent variants able to fairly extend and scale to accommodate higher processing power. While each progressive and evolved fat-tree topology includes some extra advancements, these networks do not fully address all the issues of large scale HPC. We propose a topology called Zoned-Fat tree ( Z -Fat tree,) which is a further extension to the fat trees. The extension relates to the provision of extra degree of connectivity to utilize the extra ports per switches (routing nodes), that are, in some cases, not utilized by the architectural constraints of other variants of fat trees, and hence increases the bisection bandwidth, reduces the latency and supplies additional paths for fault tolerance. To support and profit from the extra links, we propose an adaptive low latency routing for up traffic which is based on a series of leading direction bits predefined at the source; furthermore we suggest a deterministic routing by implementing a dynamic round robin algorithm that overtakes D-mod-K in same cases and guarantees the utilization of all the extra links. We also propose a fault tolerance algorithm, named recoil-and-reroute which makes use of the extra links to ensure higher message delivery even in the presence of faulty links and switches.

Application-Oriented On-Board Optical Technologies for HPCs

The increased communication bandwidth demands of high performance computing (HPC) systems calling at the same time for reduced latency and increased power efficiency have designated optical interconnects as the key technology in order to achieve the target of exascale performance. In this realm, technology advances have to be accompanied by the development of corresponding design and simulation tools that support end-to-end system modeling in order to evaluate the performance benefits offered by optical components at system scale. In this paper, we present recent advances on electro-optical printed circuit boards (EOPCB) technology development pursued within the European FP7 PhoxTroT research program and directed toward system-scale performance benefits in real HPC workload applications. We report on high-density and multilayered EOPCBs together with all necessary building blocks for enabling true optical blade technology, including multimode polymer-based single- and dual-layer EOPCBs, a board-compatible optically interfaced router chip, and passive board-level connectors. We also demonstrate a complete optical blade design and evaluation software simulation framework called OptoHPC that tailors optical blade technology development toward optimized performance at HPC system scale, allowing for its validation with synthetic workload benchmark traffic profiles and for reliable comparison with existing HPC platforms. The OptoHPC simulator is finally utilized for evaluating and comparing a 384-node HPC system relying on optically enabled blades with the state-of-the-art Cray XK7 HPC network when performing with a range of synthetic workload traffic profiles, revealing the significant throughput and delay improvements that can be released through application-oriented optical blade technology.

Enabling Parallel Simulation of Large-Scale HPC Network Systems

With the increasing complexity of today's high-performance computing (HPC) architectures, simulation has become an indispensable tool for exploring the design space of HPC systems-in particular, networks. In order to make effective design decisions, simulations of these systems must possess the following properties: (1) have high accuracy and fidelity, (2) produce results in a timely manner, and (3) be able to analyze a broad range of network workloads. Most state-of-the-art HPC network simulation frameworks, however, are constrained in one or more of these areas. In this work, we present a simulation framework for modeling two important classes of networks used in today's IBM and Cray supercomputers: torus and dragonfly networks. We use the Co-Design of Multi-layer Exascale Storage Architecture (CODES) simulation framework to simulate these network topologies at a flit-level detail using the Rensselaer Optimistic Simulation System (ROSS) for parallel discrete-event simulation. Our simulation framework meets all the requirements of a practical network simulation and can assist network designers in design space exploration. First, it uses validated and detailed flit-level network models to provide an accurate and high-fidelity network simulation. Second, instead of relying on serial time-stepped or traditional conservative discrete-event simulations that limit simulation scalability and efficiency, we use the optimistic event-scheduling capability of ROSS to achieve efficient and scalable HPC network simulations on today's high-performance cluster systems. Third, our models give network designers a choice in simulating a broad range of network workloads, including HPC application workloads using detailed network traces, an ability that is rarely offered in parallel with high-fidelity network simulations.

A performance model for the communication in fast multipole methods on high-performance computing platforms

Exascale systems are predicted to have approximately 1 billion cores, assuming gigahertz cores. Limitations on affordable network topologies for distributed memory systems of such massive scale bring new challenges to the currently dominant parallel programing model. Currently, there are many efforts to evaluate the hardware and software bottlenecks of exascale designs. It is therefore of interest to model application performance and to understand what changes need to be made to ensure extrapolated scalability. The fast multipole method (FMM) was originally developed for accelerating N-body problems in astrophysics and molecular dynamics but has recently been extended to a wider range of problems. Its high arithmetic intensity combined with its linear complexity and asynchronous communication patterns make it a promising algorithm for exascale systems. In this paper, we discuss the challenges for FMM on current parallel computers and future exascale architectures, with a focus on internode communication. We focus on the communication part only; the efficiency of the computational kernels are beyond the scope of the present study. We develop a performance model that considers the communication patterns of the FMM and observe a good match between our model and the actual communication time on four high-performance computing (HPC) systems, when latency, bandwidth, network topology, and multicore penalties are all taken into account. To our knowledge, this is the first formal characterization of internode communication in FMM that validates the model against actual measurements of communication time. The ultimate communication model is predictive in an absolute sense; however, on complex systems, this objective is often out of reach or of a difficulty out of proportion to its benefit when there exists a simpler model that is inexpensive and sufficient to guide coding decisions leading to improved scaling. The current model provides such guidance.

Implementation of transition and coexistence mechanisms for IPV4-IPV6 protocols in computer centers on supported high performance academic networks

This document aims to contextualize the reader about some of the mechanisms that currently exist for IPv4-IPv6 transition and evidence some aspects that must be taken into account when evaluating and implementing some of them, specifically in centers of high performance computing and academic networks to support research projects. It also aims to show the implementation and support of IPv6 in e-learning technology platforms.

Topological Characterization of Hamming and Dragonfly Networks and Its Implications on Routing

Current High-Performance Computing (HPC) and data center networks rely on large-radix routers. Hamming graphs (Cartesian products of complete graphs) and dragonflies (two-level direct networks with nodes organized in groups) are some direct topologies proposed for such networks. The original definition of the dragonfly topology is very loose, with several degrees of freedom, such as the inter- and intragroup topology, the specific global connectivity, and the number of parallel links between groups (or trunking level). This work provides a comprehensive analysis of the topological properties of the dragonfly network, providing balancing conditions for network dimensioning, as well as introducing and classifying several alternatives for the global connectivity and trunking level. From a topological study of the network, it is noted that a Hamming graph can be seen as a canonical dragonfly topology with a high level of trunking. Based on this observation and by carefully selecting the global connectivity, the Dimension Order Routing (DOR) mechanism safely used in Hamming graphs is adapted to dragonfly networks with trunking. The resulting routing algorithms approximate the performance of minimal, nonminimal, and adaptive routings typically used in dragonflies but without requiring virtual channels to avoid packet deadlock, thus allowing for lower cost router implementations. This is obtained by properly selecting the link to route between groups based on a graph coloring of network routers. Evaluations show that the proposed mechanisms are competitive with traditional solutions when using the same number of virtual channels and enable for simpler implementations with lower cost. Finally, multilevel dragonflies are discussed, considering how the proposed mechanisms could be adapted to them.

Research on Job Scheduling Technology for High Performance Computer Network

This paper analyzes the advantages and disadvantages of cluster management system of B/S mode, combined with the need of practical application, puts forward the cluster management system structure of Browser/Server/Severs structure with a novel B/S model. This structure can achieve most of the functions of cluster management, and the advanced architecture, solves the problems of cluster management system for two or three layers of C/S structure. From the implementation point of view, this structure can greatly improve development efficiency, reduce development complexity.

Using HPC for teaching and learning bioinformatics software: Benefits and challenges

Background We present our work on using the XSEDE high-performance computing (HPC) network to support and facilitate hands-on bioinformatics tasks for participants of our Essentials of Next Generation Sequencing (NGS) workshop, as well as for students and other learners. In the summer of 2012, the University of Kentucky hosted the NGS workshop, attended by faculty and students from across the Commonwealth who were introduced to the laboratory and bioinformatic components of next-generation sequencing and sequence analysis. Participants used next-generation technology to sequence real genetic material, then used a variety of bioinformatics software tools to assemble those sequences, compare and align them to other sequences, predict genes, and visualize the genome. Due to the success of the 2012 workshop, the second workshop, planned for this summer, is expected to be larger in scale and to include even more participants. It will furthermore include several additional bioinformatics tools and tasks. Since participants will be simultaneously running intensive bioinformatics computing tasks, the resources required will exceed the capacity of the single twelve-core server used to support the workshop last year. One particular resource that appears promising to meet our intensive computational needs is the XSEDE grid computing network, a follow-on to the TeraGrid project designed specifically for “e-Science” and scientific computing. Many of the systems in the XSEDE network already support some of the software used within our workshop; however, many of the programs we will demonstrate have not previously been installed on tested on the XSEDE network. We will describe our experiences porting these applications to, and deploying them on, XSEDE. We will also discuss the challenges that the HPC approach presents for teaching and learning, particularly the complexities of navigating between time-sharing systems and remote job scheduling.

Consolidation and virtualization are in the modern networks of DPCS

The considered methods of consolidation and virtualization are in architecture of construction of high-performance computer networks of DPCS. During an analysis perspective directions are educed on the increase of their productivity

Fabrication and characterization of hollow metal waveguides for optical interconnect applications

As data rates continue to increase in high-performance computer systems and networks, it is becoming more difficult for copper-based interconnects to keep pace. An alternative approach to meet these requirements is to move to optical-based interconnect technologies which offer a number of advantages over the legacy copper-based solutions. In order to meet the stringent requirements of high performance and low cost, manufacturable waveguide technologies must be developed. Past solutions have often employed polymer waveguide technologies, which can be expensive and limited by modal dispersion. In the present work, hollow metal waveguides (HMWGs) are investigated as a potential alternative. These waveguides demonstrate very low optical losses of <0.05 dB/cm and the capability to transmit at extremely high data rates. The fabrication, modeling, characterization of the HMWGs are discussed to enable photonic interconnect solutions for future generations of computer and server products.

Sci-Sat AM(1): Imaging-05: Analytical scatter estimation for cone-beam computed tomography.

A significant challenge to the implementation of cone-beam computed tomography (CBCT) for high-resolution imaging is the high scatter to primary ratio. Scatter causes cupping and shading artifacts, increased noise and decreased contrast in reconstructed images. Methods to reduce the impact of scatter in CBCT are thus very desirable. We are investigating methods for computational scatter estimation and compensation for CBCT, with the goal of incorporating a scatter estimator within a statistical reconstruction algorithm. We have developed an analytical method for estimating single scatter, based on Klein-Nishina cross-sections. We have compared scatter estimates generated with this method with the results of high-count EGSnrc Monte Carlo simulations. The analytical estimates compare favorably with the Monte Carlo estimates. The paper will discuss our method for analytical estimation of single scatter, including the assumptions and simplifications required to render it computationally tractable, along with the results of the comparison between the analytical method and Monte Carlo simulations. The paper will extend previous results obtained with small (40 × 40 × 40 voxel) homogeneous computational phantoms to include results for larger, more clinically relevant phantoms (128 × 128 × 128 voxels, simulated 50/50 breast tissue with inserts of varying contrast). The paper will also discuss computational acceleration obtained through the use of parallel processing via the WestGrid High-Performance Computing network.