High-performance Bipolar Devices Research Articles

High-Speed Growth of Epitaxial Rutile GeO2 Thin Film on (001) TiO2 Under Highly Oxygen-Rich Condition and Its Structural Analysis

Recently, rutile germanium dioxide (r-GeO2) has been proposed as a novel ultra-wide bandgap (UWBG) semiconductor with ambipolar dopability, high carrier mobilities, and a higher thermal conductivity than Ga2O3, in addition to its wide bandgap (4.68 eV). These excellent properties indicate that r-GeO2 can be utilized as high-performance bipolar devices with high breakdown voltage. On the other hand, although r-GeO2 is most stable phase at the ambient condition, fabrication of its thin film is reported to be quite difficult, owing to the existence of energetically deep meta-stable phases, namely, amorphous and quartz phase, and high vapor pressure of r-GeO2. In this study, we accomplished fabrication of (001)-oriented r-GeO2 thin films on (001) rutile titanium dioxide (r-TiO2) substrate with high growth rate (≧1 mm/h) by mist chemical vapor deposition (mist CVD). Moreover, we investigated the structural properties of r-GeO2 film by X-ray diffraction (XRD) and transmission electron microscopy (TEM) techniques.First of all, bis [2-carboxyethylgermanium (IV)] sesquioxide (C6H10Ge2O7) as a precursor. To analyze the decomposition process of C6H10Ge2O7 and optimize the growth conditions, Thermogravimetry-Differential Thermal Analysis (TG-DTA) was conducted in aqueous vapor. By the TG-DTA, GeO2 was found to be synthesized from C6H10Ge2O7 at 553-783 ℃ in aqueous vapor. Therefore, we determined the growth temperature of r-GeO2 thin film to be 550-850 ℃. As shown in XRD 2q/w scan profile (Fig. 1), (001)-oriented r-GeO2 thin film was grown on (001) r-TiO2 substrate at growth temperature (T g) of 700-775 ℃. The growth rates of all the r-GeO2 films were found to be 1.2-1.7 mm/h, which were much higher than those grown by molecular beam epitaxy (MBE) (10 nm/h). Moreover, XRD F scan revealed that r-GeO2 thin film was epitaxially grown without rotational domains.It is considered that the higher growth rate by mist CVD compared to that by MBE is attributed to the lower desorption rate of GeO in mist CVD due to its highly oxygen-rich condition. In Fig. 2, we show the schematics of GeO desorption from the surface in (a) MBE and (b) mist CVD, inspired by Wang et al. In mist CVD, oxygen partial pressure is much higher (~760 Torr) than that in MBE (1×10- 6 Torr), resulting lower vapor pressure of GeO and lower desorption rate in mist CVD system. Higher oxygen partial pressure also suppresses oxygen vacancies in the film. Moreover, in mist CVD, oxygen was continuously supplied by water in the reaction area. Therefore, such highly oxygen-rich condition as seen in mist CVD is considered to contribute to high temperature growth and high growth rate.Cross-sectional TEM image and Selected Area Electron Diffraction (SAED) patterns at r-TiO2 substrate and the r-GeO2/r-TiO2 interface viewed along the <110> zone axis are shown in Fig. 3 (a), (b), and (c), respectively. The r-GeO2 thin film for the TEM observation was grown at lower growth rate (50 nm/h) for higher crystallinity. In Fig. 3 (b), clear diffraction spots of r-TiO2 substrate were visible. On the other hand, in Fig. 3 (c), clear diffraction spots of r-GeO2 thin film were observed as well as those of r-TiO2 substrate at the interface. From the diffraction spots, we calculated lattice parameters of the r-GeO2 thin film to be a=4.5 Å and c=2.7 Å. This indicates that the film suffers from significant tensile stress along the in-plane direction, and in-plane strain value was ~2.3%. Thus, in order to release the strain and achieve higher crystalline quality, using a buffer layer or other substrates with less lattice mismatches to r-GeO2 may be needed.We believe that these results greatly contribute to the future development of r-GeO2 applied for power-electronics devices and exploration of novel materials that are difficult to synthesize under normal growth conditions.This work was supported, in part, by JSPS KAKENHI under Grant No. 21H01811. Figure 1

Profile study of a graded epitaxial stack and its impact on high performance bipolar devices

Advanced MOSAIC V technology uses a graded epitaxial stack of 0-9μm n epitaxial layer grown on an n + buried layer which has been implanted into an inirinsic epitaxial layer. A study of the intrinsic epitaxial layer profile is critical for reducing the collector substrate (Ccs) capacitance which adversely affects the ECL gate delay. The importance of the intrinsic epitaxial layer profile for the performance of trench isolated high performance ASIC bipolar transistors is considered.

Suppression of lateral autodoping from arsenic buried layer by selective epitaxy capping

An effective way to suppress lateral autodoping from the heavily arsenic-doped buried layer during silicon epitaxy is described. By using this simple technique, collector-substrate capacitance (C/sub cs/) is minimized. This process is ideal for high-speed BiCMOS and bipolar technology. A thin epilayer is first grown selectively on the buried layer. This selectively grown film suppresses the release of arsenic during the subsequent epi growth. High-performance bipolar devices have been fabricated in this epi material. Electrical measurements indicate that the crystalline quality is excellent.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

On the low-temperature static and dynamic properties of high-performance silicon bipolar transistors

In a study performed over the temperature range of 400 to 77 K, Si bipolar transistors were found to have near-ideal characteristics at low temperatures with beta as high as 80 at 77 K. Detailed calculations indicate that the conventional theory of the temperature dependence of beta does not match the data. The discrepancy can be removed if it is assumed that a phenomenological thermal barrier to hole injection is present. Emitter-coupled logic (ECL) ring oscillators are functional at 85 K with no degradation in speed until about 165 K when compared to 358 K (85 degrees C). Calculations using a delay figure of merit indicate that f/sub T/, R/sub b/, and C/sub c/ are the delay components most affected by low-temperature operation. The feasibility of reduced logic swing operation of bipolar circuits at low temperatures is examined. It is found that successful ECL circuit operation at reduced logic swings is possible provided emitter resistance is kept small and can be used to enhance low-temperature power-delay performance. These data suggest that conventionally designed high-performance bipolar devices are suitable for the low-temperature environment.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Trends in high performance silicon technology

The swift and far reaching technological advances over the last 30 years, which are frequently described by terms such as computer age or space age, are inseparably connected with the evolution of the silicon semiconductor technology. In this paper, we will give an overview of the most recent developments in the silicon semiconductor field as they relate to high performance bipolar devices. Trends in process technology as well as performance limits will be described.