High On-off Ratio Research Articles

High on-off ratio and responsivity in integrated optically controlled HEMT

High on-off ratio and high responsivity was obtained in a novel integrated optically controlled HEMT. The integrated structure of the device was composed of a p-i-n photodiode region and a HEMT region. These two regions were bonded using direct wafer bonding technique. When a laser light with a wavelength of 1.55 /spl mu/m was irradiated on the absorption region, on-off ratio of 12 dB and a responsivity of more than 300 A/W was obtained. This device is very attractive as the high efficiency optoelectronic (OE) transformer directly integrated on the LSI circuits.

Design and simulation of a broadband, high speed quasioptical beam switch array for moderate pulse reflectometry

High speed, high on-off contrast ratio switches utilizing beam control grid array technology are under development for use in moderate pulse reflectometry. This approach, which utilizes arrays consisting of hundreds of Shottky varactor diodes embedded within an overmoded wave guide, is expected to generate switching times in the 100–500 ps range with high power handling capabilities. The switches are designed for initial wideband operation in V band (50–75 GHz) operation although they can be operated both at lower and higher frequencies, and are intended for use in a moderate pulse reflectometry system such as used on the RTP tokamak.

High-efficiency electro-optic grating switch with improved performance

We present a high-diffraction-efficiency electro-optic grating switch based on a lanthanum-modified lead zirconate titanate ceramic wafer. By the employment of narrow contour-shaped metal electrodes instead of the commonly used indium tin oxide interdigital electrodes, this grating has the advantages of a low intrinsic-diffraction loss, high zero-order light on-off ratio, and fast time response. The zero-order light can be turned off with a voltage of 160 V.

Improved performances of a S-SEED using extremely shallow quantum-wells and asymmetric Fabry-Perot cavity structure

The authors report significantly improved performances of a symmetric self-electrooptic-effect device (S-SEED), with high on-off contrast ratio (>30:l) and large optical bistability loop widths ( Delta P=44%) at an applied bias of V/sub a/=0 V, i.e., with no power supply. The S-SEED is made of extremely shallow quantum wells (ESQWs) in an asymmetric Fabry-Perot (AFP) cavity structure. At V/sub a/=5 V Delta P increased by up to 95%, preserving the high contrast ratio. The reflectivity changes at V/sub a/=0 and 5 V were about 15% and 30%, respectively. These are believed to be the largest values ever reported for such structures. >

A novel depletion-gate amorphous silicon thin-film transistor

A novel type of amorphous silicon (a-Si) thin-film transistor (TFT) in which a depletion gate is added to the top of the second nitride layer of a conventional a-Si TFT has been fabricated. In this transistor, switching is done by the depletion gate instead of the accumulation gate as in conventional a-Si TFTs. The pinch-off voltage and ON-OFF current ratio of the transistor can be changed by the accumulation gate bias. The transistor exhibits high ON-OFF current ratio, low contact resistance, and low gate-source capacitance. >

Optical triode switch module with a nonlinear etalon

An all-optical device in which a nonlinear etalon is operated stably as a triode switch at a high on-off ratio is discussed. A nonlinear etalon is sandwiched between two quarter-pitch GRIN (graded index) lenses. Detuning is adjusted by using the position-to-angle conversion feature of the lens. Two orthogonally polarized beams are used to obtain a high on-off ratio ( approximately 10:1) even for a weak signal beam by completely separating a control beam from an output beam.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Novel two-step SDB technology for high-performance thin-film SOI/MOSFET applications

A novel two-step oxided silicon wafer direct bonding process (TSDB) for fabricating high-quality SOI substrates is presented, which has no contamination, no complex thinning process and no subsurface damage. The fracture strength of the SOI/TSDB material is 180 kg/cm2. SOI/TSDB NMOS and PMOS devices (0.8–3μm) have shown that the typical values of electron and hole surface channel mobility are 680 and 320cm2/Vs, respectively. A high device transconductance end high on-off current ratio have also been obtained.