High-level Language Constructs Research Articles

Revisiting Graph Types in HyperLMNtal: A Modeling Language for Hypergraph Rewriting

Hypergraphs are a highly expressive data structure for modeling and programming, for which high-level language constructs are yet to be established. HyperLMNtal is a modeling language based on hypergraph rewriting. Rewrite rules can copy and remove subgraphs identified by graph types which serve as a wildcard construct that enables powerful handling of subgraphs. HyperLMNtal has featured several graph types over the years, enabling it to encode various computational models. Important applications of graph types include the modeling of formal systems involving name binding including the $\lambda $ -calculus. However, the concept of graph types for hypergraphs has not been studied in sufficient detail, and our recent work revealed that the encoding of a unification algorithm modulo $\alpha $ -equivalence requires further evolution of graph types. This paper describes the motivation and redesign of a graph type for handling subgraphs appearing in the above applications and conduct experiments to show performance improvements. We believe that the idea of graph types could be useful in programming and modeling languages in general and is worth further investigation and deployment.

Control Structure Analysis and Recovery of Embedded Binaries

Existing decompilers use rule-based algorithms to transform unstructured Control flow graph (CFG) into equivalent high-level programming language constructs with goto statements. One problem of such approaches is that they generate a large number of gotos in the output code, which reduce the readability and hinder the understanding of input binaries. A global search algorithm is proposed based on structural analysis. This algorithm restructures a CFG and generates fewer number of goto statements than the rule-based algorithm does. We also present a Genetic algorithm (GA) for the global search approach to locate near optimal solutions for large CFGs. Evaluation results on a set of real CFGs show that the genetic algorithm-based heuristic for global search is capable of finding high-quality solutions.

A temporal programming model with atomic blocks based on projection temporal logic

Atomic blocks, a high-level language construct that allows programmers to explicitly specify the atomicity of operations without worrying about the implementations, are a promising approach that simplifies concurrent programming. On the other hand, temporal logic is a successful model in logic programming and concurrency verification, but none of existing temporal programming models supports concurrent programming with atomic blocks yet. In this paper, we propose a temporal programming model (?PTL) which extends the projection temporal logic (PTL) to support concurrent programming with atomic blocks. The novel construct that formulates atomic execution of code blocks, which we call atomic interval formulas, is always interpreted over two consecutive states, with the internal states of the block being abstracted away. We show that the framing mechanism in projection temporal logic also works in the new model, which consequently supports our development of an executive language. The language supports concurrency by introducing a loose interleaving semantics which tracks only the mutual exclusion between atomic blocks. We demonstrate the usage of ?PTL by modeling and verifying both the fine-grained and coarse-grained concurrency.

Combining simulator independent network descriptions with run-time interoperability based on PyNN and MUSIC

Event Abstract Back to Event Combining simulator independent network descriptions with run-time interoperability based on PyNN and MUSIC Jochen Martin Eppler1*, Mikael Djurfeldt2, Eilif Muller3, Markus Diesmann1 and Andrew Davison4 1 Institute of Neuroscience and Medicine (INM-6), Computational and Systems Neuroscience, Research Center Jülich, Germany 2 PDC Center for High Performance Computing, School of Computer Science and Communication, KTH, Sweden 3 Blue Brain Project, Ecole Polytechnique Fédérale de Lausanne (EPFL, Switzerland 4 Unité de Neurosciences Intégratives et Computationnelles (UNIC), Centre National de la Recherche Scientifique, France The Multi-Simulation Coordinator (MUSIC) is an INCF funded standard and library implementation that allows neuronal simulators or programs for stimulus generation, data analysis, or visualization to exchange data at run-time. To set up such a multi-simulation consisting of several simulators, the user has to specify the different parts of the network model in the native description or scripting languages of the respective simulators, and provide a configuration file that tells MUSIC what data has to be transported between which applications. This approach works well for connecting multiple already existing models written for different simulators. An example for using this is given in [1]. However, this approach requires the user to be familiar with the configuration languages of all simulators involved in the simulation. To alleviate this problem, we extended the application programming interface (API) of PyNN [2], to enable the simulator-independent specification of multi-simulator neuronal network models. In this contribution, we provide a detailed description of necessary changes to the existing software packages (i.e. NEST [3], NEURON [4] and PyNN) and the user experience for our prototype implementation of this API. The API allows the user to set up the network model using all of PyNN's high-level language constructs and abstracts away from the technical aspects of using the simulator's native MUSIC interfaces and setting up the multi-simulation. Acknowledgments: Partially supported by the Helmholtz Alliance on Systems Biology, the Next-Generation Supercomputer Project of MEXT, and EU Grant 269921 (BrainScaleS).

Idris, a general-purpose dependently typed programming language: Design and implementation

AbstractMany components of a dependently typed programming language are by now well understood, for example, the underlying type theory, type checking, unification and evaluation. How to combine these components into a realistic and usable high-level language is, however, folklore, discovered anew by successive language implementors. In this paper, I describe the implementation ofIdris, a new dependently typed functional programming language.Idrisis intended to be ageneral-purposeprogramming language and as such provides high-level concepts such as implicit syntax, type classes anddonotation. I describe the high-level language and the underlying type theory, and present a tactic-based method forelaboratingconcrete high-level syntax with implicit arguments and type classes into a fully explicit type theory. Furthermore, I show how this method facilitates the implementation of new high-level language constructs.

Design and Implementation of an Extended Collectives Library for Unified Parallel C

Unified Parallel C (UPC) is a parallel extension of ANSI C based on the Partitioned Global Address Space (PGAS) programming model, which provides a shared memory view that simplifies code development while it can take advantage of the scalability of distributed memory architectures. Therefore, UPC allows programmers to write parallel applications on hybrid shared/distributed memory architectures, such as multi-core clusters, in a more productive way, accessing remote memory by means of different high-level language constructs, such as assignments to shared variables or collective primitives. However, the standard UPC collectives library includes a reduced set of eight basic primitives with quite limited functionality. This work presents the design and implementation of extended UPC collective functions that overcome the limitations of the standard collectives library, allowing, for example, the use of a specific source and destination thread or defining the amount of data transferred by each particular thread. This library fulfills the demands made by the UPC developers community and implements portable algorithms, independent of the specific UPC compiler/runtime being used. The use of a representative set of these extended collectives has been evaluated using two applications and four kernels as case studies. The results obtained confirm the suitability of the new library to provide easier programming without trading off performance, thus achieving high productivity in parallel programming to harness the performance of hybrid shared/distributed memory architectures in high performance computing.

Green-Marl

The increasing importance of graph-data based applications is fueling the need for highly efficient and parallel implementations of graph analysis software. In this paper we describe Green-Marl, a domain-specific language (DSL) whose high level language constructs allow developers to describe their graph analysis algorithms intuitively, but expose the data-level parallelism inherent in the algorithms. We also present our Green-Marl compiler which translates high-level algorithmic description written in Green-Marl into an efficient C++ implementation by exploiting this exposed data-level parallelism. Furthermore, our Green-Marl compiler applies a set of optimizations that take advantage of the high-level semantic knowledge encoded in the Green-Marl DSL. We demonstrate that graph analysis algorithms can be written very intuitively with Green-Marl through some examples, and our experimental results show that the compiler-generated implementation out of such descriptions performs as well as or better than highly-tuned hand-coded implementations.

Green-Marl

The increasing importance of graph-data based applications is fueling the need for highly efficient and parallel implementations of graph analysis software. In this paper we describe Green-Marl, a domain-specific language (DSL) whose high level language constructs allow developers to describe their graph analysis algorithms intuitively, but expose the data-level parallelism inherent in the algorithms. We also present our Green-Marl compiler which translates high-level algorithmic description written in Green-Marl into an efficient C++ implementation by exploiting this exposed data-level parallelism. Furthermore, our Green-Marl compiler applies a set of optimizations that take advantage of the high-level semantic knowledge encoded in the Green-Marl DSL. We demonstrate that graph analysis algorithms can be written very intuitively with Green-Marl through some examples, and our experimental results show that the compiler-generated implementation out of such descriptions performs as well as or better than highly-tuned hand-coded implementations.

Area Optimisation for Field-Programmable Gate Arrays in SystemC Hardware Compilation

This paper discusses a pair of synthesis algorithms that optimise a SystemC design to minimise area when targeting FPGAs. Each can significantly improve the synthesis of a high-level language construct, thus allowing a designer to concentrate more on an algorithm description and less on hardware-specific implementation details. The first algorithm is a source-level transformation implementing function exlining—where a separate block of hardware implements a function and is shared between multiple calls to the function. The second is a novel algorithm for mapping arrays to memories which involves assigning array accesses to memory ports such that no port is ever accessed more than once in a clock cycle. This algorithm assigns accesses to read/write only ports and read-write ports concurrently, solving the assignment problem more efficiently for a wider range of memories compared to existing methods. Both optimisations operate on a high-level program representation and have been implemented in a commercial SystemC compiler. Experiments show that in suitable circumstances these techniques result in significant reductions in logic utilisation for FPGAs.

Typing a multi-language intermediate code

The Microsoft .NET Framework is a new computing architecture designed to support a variety of distributed applications and web-based services. .NET software components are typically distributed in an object-oriented intermediate language, Microsoft IL, executed by the Microsoft Common Language Runtime. To allow convenient multi-language working, IL supports a wide variety of high-level language constructs, including class-based objects, inheritance, garbage collection, and a security mechanism based on type safe execution.This paper precisely describes the type system for a substantial fragment of IL that includes several novel features: certain objects may be allocated either on the heap or on the stack; those on the stack may be boxed onto the heap, and those on the heap may be unboxed onto the stack; methods may receive arguments and return results via typed pointers, which can reference both the stack and the heap, including the interiors of objects on the heap. We present a formal semantics for the fragment. Our typing rules determine well-typed IL instruction sequences that can be assembled and executed. Of particular interest are rules to ensure no pointer into the stack outlives its target. Our main theorem asserts type safety, that well-typed programs in our IL fragment do not lead to untrapped execution errors.Our main theorem does not directly apply to the product. Still, the formal system of this paper is an abstraction of informal and executable specifications we wrote for the full product during its development. Our informal specification became the basis of the product team's working specification of type-checking. The process of writing this specification, deploying the executable specification as a test oracle, and applying theorem proving techniques, helped us identify several security critical bugs during development.

High-level design and architecture of an HTTP-based infrastructure for web applications

xoComm is a communication infrastructure for web applications based on the HTTP protocol. It provides an HTTP server and client access. Furthermore it is the basic communication service for the ActiWeb web object and mobile code system. The HTTP server component of xoComm is used to implement ActiWeb places. The places use the HTTP client access to provide the communication means for their agents. We present the design and architecture of xoComm on several crucial excerpts of the design. These are closely related to their implementation in the object-oriented scripting language XOTcl. We discuss how a dynamic and reflective environment, high-level language constructs, and concepts like design patterns influence the design and architecture.

Anonymous remote computing: a paradigm for parallel programming on interconnected workstations

Parallel computing on interconnected workstations is becoming a viable and attractive proposition due to the rapid growth in speeds of interconnection networks and processors. In the case of workstation clusters, there is always a considerable amount of unused computing capacity available in the network. However, heterogeneity in architectures and operating systems, load variations on machines, variations in machine availability, and failure susceptibility of networks and workstations complicate the situation for the programmer. In this context, new programming paradigms that reduce the burden involved in programming for distribution, load adaptability, heterogeneity and fault tolerance gain importance. This paper identifies the issues involved in parallel computing on a network of workstations. The anonymous remote computing (ARC) paradigm is proposed to address the issues specific to parallel programming on workstation systems. ARC differs from the conventional communicating process model by treating a program as one single entity consisting of several loosely coupled remote instruction blocks instead of treating it as a collection of processes. The ARC approach results in distribution transparency and heterogeneity transparency. At the same time, it provides fault tolerance and load adaptability to parallel programs on workstations. ARC is developed in a two-tiered architecture consisting of high level language constructs and low level ARC primitives. The paper describes an implementation of the ARC kernel supporting ARC primitives.

Compilation Methods for the Address Calculation Units of Embedded Processor Systems

An essential component of today's embedded system is an instruction-set processor running real-time software. All variations of these core components contain at least the minimum data-flow processing capabilities, while a certain class contain specialized units for highly data-intensive operations for Digital Signal Processing (DSP). For the required level of memory interaction, the parallel executing Address Calculation Unit (ACU) is often used to tune the architecture to the memory access characteristics of the application. The design of the ACU is performance critical. In today's typical design flow, this design task is somewhat driven by intuition as the transformation from application algorithm to architecture is complex and the exploration space is immense. Automatic utilities to aid the designer are essential; however, the key compilation techniques which map high-level language constructs onto addressing units have lagged far behind the emergence of these units. This paper presents a new retargetable approach and prototype tool for the analysis of array references and traversals for efficient use of ACUs. In addition to being an enhancement to existing compiler systems, the ArrSyn utility may be used as an aid to architecture exploration. A simple specification of the addressing resources and basic operations drives the available transformations and allows the designer to quickly evaluate the effects on speed and code size of his/her algorithm. Thus, the designer can tune the design of the ACU toward the application constraints. ArrSyn has been successfully used together with a C compiler developed for a VLIW architecture for an MPEG audio decoding application. The combination of these methods with the C compiler showed on average a 39% speedup and 29% code size reduction for a representative set of DSP benchmarks.

PC note

In this sixth installment in the series it is time to look at the addressing modes and how some common high-level language constructs would be translated into assembly language.

A Modular Approach to Programming Distributed Real-Time Systems

Conventional real-time programs associate real-time requirements with individual commands in a program. This approach has three weaknesses. First, it intermixes two different design concerns: functional correctness and temporal correctness. Second, by mixing real-time requirements with program statements it makes it harder, and in some cases infeasible, to specify constraints between objects. Third, it limits the ability to independently modify either the timing constraints or the representations of objects. We describe a new approach that separates real-time constraints from functional aspects of an application; real-time constraints are described by synchronization code between the interfaces of objects. Objects in our system are defined using a real-time variant of the Actor model. We define a high-level programming language construct calledRTsynchronizer, which specifies a collection of temporal constraints between actors. Thus, our approach separates what an object does from when it does it. Such separation also facilitates the ability to dynamically modify real-time constraints. We illustrate the use of RTsynchronizers by a number of examples and then describe a meta-architecture that can be used to implement RTsynchronizers.

Teapot

Recent shared-memory parallel computer systems offer the exciting possibility of customizing memory coherence protocols to fit an application's semantics and sharing patterns. Custom protocols have been used to achieve message-passing performance---while retaining the convenient programming model of a global address space---and to implement high-level language constructs. Unfortunately, coherence protocols written in a conventional language such as C are difficult to write, debug, understand, or modify. This paper describes Teapot, a small, domain-specific language for writing coherence protocols. Teapot uses continuations to help reduce the complexity of writing protocols. Simple static analysis in the Teapot compiler eliminates much of the overhead of continuations and results in protocols that run nearly as fast as hand-written C code. A Teapot specification can be compiled both to an executable coherence protocol and to input for a model checking system, which permits the specification to be verified. We report our experiences coding and verifying several protocols written in Teapot, along with measurements of the overhead incurred by writing a protocol in a higher-level language.

ON SYNCHRONIZATION LANGUAGES

New constructs for synchronization termed synchronization expressions (SEs) have been developed as high-level language constructs for parallel programming languages [8, 9]. Statements that are constrained by certain synchronization requirements are tagged, and synchronization requests are specified as expressions of statement tags. In this paper, we introduce a new family of languages named synchronization languages which we use to give a precise semantic description for SEs. Under this description, relations such as equivalence and inclusion between SEs can be easily understood and tested. In practice, it also provides us with a systematic way for the implementation as well as the simplification of SEs in parallel programming languages. We show that each synchronization language is closed under the following rewriting rules: (1) asbs → bsas, (2) atbt → btat, (3) asbt → btas, (4) atasbtbs → btbsatas and also h(atasbtbs) → h(btbsatas) for any morphism h that satisfies certain conditions which will be specified in the paper. We conjecture that closure under the above rewriting rules is a sufficient condition for a regular st-language to be a synchronization language. Several other properties of synchronization languages are also studied.

RTsynchronizer

We argue that the specification of an object's functional behavior and the timing constraints imposed on it may be separated. Specifically, we describe RTsynchronizer, a high-level programming language construct for specifying real-time constraints between objects in a distributed concurrent system. During program execution, RTsynchronizers affect the scheduling of distributed objects to enforce real-time relations between events. Objects in our system are defined in terms of the actor model extended with timing assumptions. Separation of the functional behaviors of actors and the timing constraints on patterns of actor invocation provides at least three important advantages. First, it simplifies code development by separating design concerns. Second, multiple timing constraints can be independently specified and composed. And finally, a specification of timing constraints can be reused even if the representation of the functional behavior of actors has changed, and conversely.A number of examples are given to illustrate the use of RTsynchronizers. These examples illustrate how real-time constraints for periodic events, simultaneous events, exception handling, and producer-consumer may be specified.

Implementation of implicit finite element methods for incompressible flows on the CM-5

A parallel implementation of an implicit finite element formulation for incompressible fluids on a distributed-memory massively parallel computer is presented. The dominant issue that distinguishes the implementation of finite element problems on distributed-memory computers from that on traditional shared-memory scalar or vector computers is the distribution of data (and hence workload) to the processors and the non-uniform memory hierarchy associated with the processors, particularly the non-uniform costs associated with on-processor and off-processor memory references. Accessing data stored in a remote processor requires computing resources an order of magnitude greater than accessing data locally in a processor. This distribution of data motivates the development of alternatives to traditional algorithms and data structures designed for shared-memory computers, which must now account for distributed-memory architectures. Data structures as well as data decomposition and data communication algorithms designed for distributed-memory computers are presented in the context of high level language constructs from High Performance Fortran. The discussion relies primarily on abstract features of the hardware and software environment and should be applicable, in principle, to a variety of distributed-memory system. The actual implementation is carried out on a Connection Machine CM-5 system with high performance communication functions.

Design issues in parallel simulation languages

The authors address several key issues in designing languages for parallel discrete-event simulation and survey the state-of-the-art techniques aimed at solving these problems. Attention is given to issues that are specific to parallel simulation, e.g., the parallel synchronization schemes, or issues that have not previously been a problem for sequential simulation, e.g., termination. Various specialized PSLs (parallel simulation languages) may also have quite different design issues. The problem of achieving transparency is addressed. In particular it is observed that a major difficulty in achieving the design criteria is the overhead introduced by the methods for solving the problems considered. In some cases making the design criteria less constrained appears to be unavoidable. The authors also propose several useful high-level language constructs to facilitate modeling in order to have the simulation system deal with the low-level details transparently. They show that extending the capability of an existing programming language is the simplest available technique for designing a PSL.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>