High Density Of Defect States Research Articles

Enhanced nonlinear absorption and photoluminescence properties of Zn, Fe, Cu, V and Ni doped MoO3 transition metal oxide thin films

Abstract In this study, the effect of the dopant element on the linear, nonlinear absorption and optical limiting properties of ultrasonically sprayed MoO3 thin films is presented. The linear optical results showed an increase with the density of the defect states in the bandgap with doping, in conjunction with a decrease in bandgap energy and an increase in Urbach energy. Broad photoluminescence emissions are detected in the range of 350 and 600 nm, decreasing in intensity by doping. To reveal the defect states effects’ on the nonlinear absorption (NA) behavior, OA Z-scan data were analyzed with two theoretical models considering only two photon absorption (2PA) (model 1), and one photon absorption (OPA), 2PA and free carrier absorption (model 2). The NA behavior is observed and found to get enhanced by increasing input intensity and doping atoms due to generation of new oxygen vacancies and formation of further defect states. The NA coefficient values of the thin films in model 2 are 100 times higher than that of 2PA coefficient values in model 1. This result revealed the strong effect of defect states on the NA behavior. Among the investigated dopant atoms, Cu resulted in enhanced NA due to the higher density of defect states. While the genuine 2PA is the dominant NA mechanism for V and Fe doped MoO3 thin films, OPA and 2PA are the dominant NA mechanisms for the Ni, Zn and Cu doped MoO3 thin films due to their higher concentration of defect states. Cu-doped MoO3 thin film has a lower optical limiting threshold of 0.026 mJ/cm2 due to its enhanced NA behavior. Considering the results obtained, this study opens the door to the potential of doped MoO3 thin films to be used as optical limiters in the visible wavelength region.

On the grain boundary charge transport in p-type polycrystalline nanoribbon transistors.

Grain boundaries (GB) profoundly influence charge transport, and their localized potential barrier with a high density of defect states plays a crucial role in polycrystalline materials. There are a couple of models to estimate the density of states (DoS) of nanostructured materials in field-effect transistors (FETs) that probe interface traps between the semiconductor and dielectric but not at the grain boundaries. Here, we report on utilizing Levinson's and Seto's models of grain boundary transport and correlate them with the temperature-dependent hopping transport in copper iodide (CuI) polycrystalline nanoribbon (PNR) FETs. Experimentally, PNRs are obtained by e-beam lithography and thermal evaporation of CuI. To investigate the impact of GB, the devices are fabricated with different channel aspect ratios by varying widths (80, 260, and 570 nm) and lengths (20 to 90 μm). Owing to the high hole concentration, PNR FETs operate in depletion mode at 300 K. At various low temperatures (80-300 K), the figures-of-merits of FETs are estimated to understand device performance. We determine GB barrier heights, activation energy, and density of GB trap states and find equivalence between the two models. Furthermore, we calculate temperature-dependent hopping and trap-limited transport parameters to obtain DoS at the Fermi energy, trapped and free charge carrier density, localization length, hopping distance, hopping energy, etc. at various channel lengths. Based on this quantitative analysis, we propose a channel length-dependent GB barrier height variation due to the in-plane electric field and elucidate CuI energy band levels.

(Invited) Design of Surface Oxidation and Nitridation Reactions on 4H-SiC for the Advanced SiC Gate Stack Formation Processes

Silicon carbide (SiC) MOSFETs are expected to replace Si bipolar transistors partially in applications such as automotive, railroad, and other high-voltage applications. But the resistance of the MOS inversion layer channel limits the performance of MOSFETs. It has been clarified that the effective carrier density in the inversion channel is significantly reduced by the carrier trapping by the high density of defect states distributed nearby SiO2/SiC interface. In this study, our understanding of oxidation and nitridation reactions of SiC for designing the gate stack formation processes to improve the MOS interface characteristics is presented.Choosing SiO2 as a gate dielectric for SiC is favorable from various aspects including its ability to form a thermodynamically stable interface with SiC, which is free of reactions at the process temperature. However, from a microscopic point of view, Si-O bond alone cannot cover the whole surface of SiC and the excess C atoms on the surface causes the formation of defect states. One of the possible approaches has been employing an appropriate thermal oxidation condition to enhance the excess carbon elimination by forming CO. For example, we have experimentally demonstrated a significant reduction of Dit by employing high-temperature thermal oxidation with a rapid heating furnace [1]. However, such approach seems to bring a serious drawback such as defect formation in the surface region of SiC, experimentally detected by a lattice distortion in the beneath of SiO2 after high-temperature oxidation [2]. One of the possible reasons for such deterioration would be an invasion of activated oxygen atoms into the surface region of SiC [3]. A possible approach to avoid such drawback of high-temperature oxidation process would be utilizing H2O vapor for the formation of SiO2/SiC interface at relatively lower temperature while avoiding the damages on SiC surface [4], since H2O oxidation was found to be advantageous to remove CO more efficiently than O2 oxidation even at low temperature.On the other hand, another approach to passivate SiC surface is the surface nitridation technique, which is the most common way in industry to fabricate SiC MOS interface typically achieved by high-temperature annealing in NO gas [5]. Nitridation can replace the topmost C sites with N without inducing significant distortion in the SiC surface structure, to suppress the C-related defect formation at the interface. The advantage of this reaction is that it proceeds self-limited manner and N atoms are introduced only on the topmost surface of SiC. Note that NO gas triggers the surface nitridation by removing the surface C atoms in the form of CO by oxidation. Actually, a very similar reaction occurs even when SiC is annealed in N2 [6] ambient with a slight addition of O2. We experimentally found that the surface N density saturated with different values when we employed various N2+O2 atmosphere with different O2 concentration. Therefore we setup a simple model to describe the saturation behavior, which is determined by the balance between the rate of N uptake (N+) and the rate of N desorption (N‒) mainly due to the oxidation reaction [7]. This model was found to represent the time-dependent change of surface N density well, by assuming that N+ remained constant during the reaction and N‒ was proportional to both the reaction rate of interface oxidation and the surface N density [8]. Based on this simplified model, it is possible to design a process to tune the N density. By choosing appropriate temperature and oxygen partial pressure we can increase N density at the surface to minimize the interface trap density. Further improvement of surface N density would be achieved by further controlling of the blance between N uptake and N desorption reactions.As we have discussed so far, the role of materials science to clarify the interface phenomena is significantly important to achieve a further improved SiC MOS interface characteristics for the next generation SiC power MOSFET process technology. [1] R. Kikuchi and K. Kita, Appl. Phys. Lett. 105, 032106 (2014).[2] A. D. Hatmanto and K. Kita, Appl. Phys. Express 11, 011201 (2018).[3] A. D. Hatmanto and K. Kita, Jpn. J. Appl. Phys. 59, SMMA02 (2020).[4] H. Hirai and K. Kita, Appl. Phys. Lett. Appl. Phys. Lett. 113, 172103 (2018).[5] J. Rozen et al., J. Appl. Phys. 105, 124506 (2009).[6] A.Chanthaphan et al., AIP Adv. 5, 097134 (2015).[7] T. Yang and K. Kita, Jpn. J. Appl. Phys. 61, SC1077 (2022).[8] T. Yang and K. Kita, SSDM 2023, Chiba.

A synergistic effect of the ion beam sputtered NiO x hole transport layer and MXene doping on inverted perovskite solar cells

The synergistic effect of high-quality NiO x hole transport layers (HTLs) deposited by ion beam sputtering on ITO substrates and the Ti3C2T x MXene doping of CH3NH3PbI3 (MAPI) perovskite layers is investigated in order to improve the power conversion efficiency (PCE) of p-i-n perovskite solar cells (PSCs). The 18 nm thick NiO x layers are pinhole-free and exhibit large-scale homogeneous surface morphology as revealed by the atomic force microscopy (AFM). The grazing-incidence x-ray diffraction showed a 0.75% expansion of the face-centered cubic lattice, suggesting an excess of oxygen as is typical for non-stoichiometric NiO x . The HTLs were used to fabricate the PSCs with MXene-doped MAPI layers. A PSC with undoped MAPI layer served as a control. The size of MAPI polycrystalline grains increased from 430 ± 80 nm to 620 ± 190 nm on the doping, as revealed by AFM. The 0.15 wt% MXene doping showed a 14.3% enhancement in PCE as compared to the PSC with undoped MAPI. The energy-resolved electrochemical impedance spectroscopy revealed one order of magnitude higher density of defect states in the band gap of MXene-doped MAPI layer, which eliminated beneficial effect of reduced total area of larger MAPI grain boundaries, decreasing short-circuit current. The PCE improvement is attributed to a decrease of the work function from −5.26 eV to −5.32 eV on the MXene doping, which increased open-circuit voltage and fill factor.

Phosphine Oxide Additives for High‐Brightness Inorganic Perovskite Light‐Emitting Diodes

AbstractIn the search for cost‐efficient, simple, and solution processable light‐emitting diodes, metal halide perovskites show encouraging developments. In particular, the purely inorganic CsPbBr3 is a promising material with outstanding optoelectronic properties. However, the poor solubility of Cs‐salts leads to discontinuous film formation and a high density of defect states at the crystal surface. These problems are known to be reduced by Lewis base additives. In this work, a facile fabrication method using phosphine oxide ligands such as the trioctyl and triphenyl derivatives (TOPO and TPPO, respectively) is introduced. These additives reduce surface defect states, lead to an energetic confinement of charge carriers, and improve radiative recombination in the perovskite crystals. Using X‐ray diffraction, changes in crystallinity are observed, in particular the crystallinity of the 3D phase CsPbBr3 is reduced by addition of TOPO, while changes to the 0D phase (Cs4PbBr6) are much smaller. Overall, TOPO and TPPO containing films result in current efficiencies as high as 14 and 10 cd A−1 and an outstanding brightness of more than 57 800 and 18 300 cd m−2 in a relatively simple device stack.

Interface Engineering of Lead-Free Perovskite Quantum Dots for High-Performance Data Encryption and Ultralow UV-Light Detection

Recently discovered lead-free perovskite quantum dots (QDs) have been touted as a new non-toxic star material that will replace lead-containing perovskite materials. However, its potential applications have not been advanced due to their high density of defect states. On the other hand, it is almost impossible to precisely control the luminescence of organic chromophores from different excited states with different emission colors. Here, we addressed these two great challenges in a single experiment by expanding the utility of lead-free perovskite materials capped with luminescence chromophores into brand new research directions and light-harvesting application. More specifically, we have successfully promoted the use of lead-free perovskite QDs as an efficient and reversible switch for chromophore luminescence for sensitive UV-light detection, with an extremely low detection limit of 74 picoW/cm2 and high-performance data encryption. Our time-resolved absorption and luminescence experiments, and density functional theory calculations have clearly demonstrated that ultrafast electron transfer from the optical excited Cs3MBi2Cl9 perovskite QDs tune and control the nature of neighboring organic chromophore luminescence, leading to different emission colors from different electronic excited states. This variation in interface color in response to different excitation energies provides a feasible strategy for high-performance information anti-counterfeiting and the ultralow detection limit of ultraviolet light.

Improved photovoltage of printable perovskite solar cells via Nb5+ doped SnO2 compact layer

The state-of-the-art perovskite solar cells (PSCs) with SnO2 electron transporting material (ETL) layer displays the probability of conquering the low electron mobility and serious leakage current loss of the TiO2 ETL layer in photoelectronic devices. The rapid development of SnO2 ETL layer has brought perovskite efficiencies >20%. However, high density of defect states and voltage loss of high temperature SnO2 are still latent impediment for the long-term stability and hysteresis effect of photovoltaics. Herein, Nb5+ doped SnO2 with deeper energy level is utilized as a compact ETL for printable mesoscopic PSCs. It promotes carrier concentration increase caused by n-type doping, assists Fermi energy level and conduction band minimum to move the deeper energy level, and significantly reduces interface carrier recombination, thus increasing the photovoltage of the device. As a result, the use of Nb5+ doped SnO2 brings high photovoltage of 0.92 V, which is 40 mV higher than that of 0.88 V for device based on SnO2 compact layer. The resulting PSCs displays outstanding efficiency of 13.53%, which contains an ∼10% improvements compared to those without Nb5+ doping. Our study emphasizes the significance of element doping for compact layer and lays the groundwork for high efficiency PSCs.

(Invited) P-Type Thin Film Oxide Semiconductors for Thin Film Transistor-Based CMOS Logic

The development of products, and perhaps most notably displays, which rely on thin film transistors (TFTs) has been enabled by the availability of high quality, thin film semiconducting materials. Hydrogenated amorphous silicon (a-Si:H) was the first such material to meet the demands of the display industry. Other materials have since also gained importance including polycrystalline silicon, organic semiconductors and, most recently, oxide semiconductors. In this latter case, indium gallium zinc oxide (IGZO) has been successfully commercialised at scale. However, TFT circuits using any of these materials are based on NMOS or PMOS logic rather than CMOS preventing their use where low power consumption is essential such as display driving circuits, memories or logic as it has not proved to be possible to produce n-channel and p-channel TFTs with sufficiently similar performance characteristics in one material system. In the case of the thin film silicon-based materials, this is because the hole mobility is much lower than the electron mobility, whilst in organic semiconductors it is the p-type materials that are superior to the n-type. In this paper, the situation in oxide semiconductors is considered in detail.There are several oxide semiconductors which have been used to make excellent TFTs, perhaps most notably amorphous (a-)IGZO and amorphous zinc tin oxide (a-ZTO). Both of these materials are naturally n-type as their charge neutrality level is close to the conduction band edge. As a result, it has not proved to be possible to successfully introduce sufficient acceptor-type impurities in order to stably produce a p-type behaviour in these materials; completely different p-type thin film oxide semiconductors are therefore required. Cuprous oxide (Cu2O) is one such material, and this will be used as an exemplar in this work, although alternatives such as tin oxide (SnO) and nickel oxide (NiO) have also been reported.This move to alternative material systems presents other challenges. The conduction band minimum in n-type oxides is dominated by spatially extensive and spherically symmetric metal s-shell electron orbitals, and this allows an amorphous phase to be induced by stoichiometry control of oxide semiconductor which has no grain boundaries and is highly uniform but which retains a high electron mobility. However, the valence band maximum in the p-type materials is dominated by oxygen 2p-orbitals (sometimes with metal d-orbital hybridisation is found in Cu2O) which are highly directional. This means that any attempt to introduce an amorphous microstructure would result in a significant reduction in hole mobility compared with the crystalline state (it is this effect that is responsible for a-Si:H having an electron mobility that is 1,000 times lower than its crystalline counterpart).The types of deposition techniques (most commonly sputtering) that are used to produce thin film oxide semiconductors do not permit the production of single-crystalline thin film materials; nanocrystalline microstructures are created instead. This leads to the presence of grain boundaries, which are highly problematic as they contain a high density of defect states. As a result, they act as trap sites for holes and significantly reduce carrier mobility compared with the single crystal state. Some degree of mitigation is possible by controlling grain orientation during growth, and for Cu2O it is possible to select either the (100) or (111) orientation [1]. Grain size may also be increased and boundary defects decreased after growth by annealing [2]. The result is TFTs with a significantly lower field effect mobility (typically less than 1 cm2 V–1 s–1) than is found in the n-type oxide TFTs (typically over 10 cm2 V–1 s–1). Furthermore, these defective grain boundaries can allow the accumulation of electrons in the off-state leading to much higher off-state currents than would be expected [3]. As a result the switching ratio of p-type oxide TFTs is much lower (typically less than 103) than in equivalent n-type devices (>107).Despite these limitations, it is still possible to combine p-type and n-type oxide TFTs to make CMOS logic gates, but it is important to consider carefully the application requirements and the associated compromises that must be made in circuit design.The funding for this work by the Engineering and Physical Sciences Research Council through grant numbers EP/M013650/1, EP/P027032/1 and EP/L015455/1 is gratefully acknowledged.[1] Han, S. and Flewitt, A.J., Thin Solid Films, 704, 138000 (2020)[2] Han, S., et al., Appl. Phys. Lett., 109, 173502 (2016)[3] Han, S. and Flewitt, A.J., IEEE Electron Dev. Lett., 28, 1394 (2017)

Fast Organic Vapor Phase Deposition of Thin Films in Light-Emitting Diodes.

Fast deposition of thin films is essential for achieving low-cost, high-throughput phosphorescent organic light-emitting diode (PHOLED) production. In this work, we demonstrate rapid and uniform growth of semiconductor thin films by organic vapor phase deposition (OVPD). A green PHOLED comprising an emission layer (EML) grown at 50 Å/s with bis[2-(2-pyridinyl-N)phenyl-C](acetylacetonato)iridium(III) (Ir(ppy)2(acac)) doped into 4,4'-bis(N-carbazolyl)-1,1'-biphenyl (CBP) exhibits a maximum external quantum efficiency of 20 ± 1%. The morphology, charge transport properties, and radiative efficiency under optical and electrical excitation of the PHOLED EML are investigated as functions of the deposition rate via both experimental and theoretical approaches. The EML shows no evidence for gas phase nucleation of the organic molecules at deposition rates as high as 50 Å/s. However, the roll-off in quantum efficiency at high current progressively increases with deposition rate due to enhanced triplet-polaron annihilation. The roll-off results from accumulation of stress within the PHOLED EML that generates a high density of defect states. The defects, in turn, act as recombination sites for triplets and hole polarons, leading to enhanced triplet-polaron annihilation at high current. We introduce a void nucleation model to describe the film morphology evolution that is observed using electron microscopy.

A comparative study on generation and recombination process of kesterite CZTS based thin film solar cells for different designs

In this paper, a comparative study on generation and recombination process in different CZTS designs has been carried out in which their performances and band alignment are invistigated. Firstly, CdS/CZTS design has been modeled using the SCAPS-1D. Secondely, new designs have been proposed in which a back surface field (BSF) layer is inserted and CdS layer is replaced by ZnS. The obtained results exhibit a boosted efficiency from 12.03 % to 14.14 % by inserting a BSF layer with a ZnS buffer layer. The analysis of generation and recombination reveals a high recombination in CdS/CZTS interface in comparaison with ZnS/CZTS due to the high density of defect states at the CdS/CZTS interface. BSF increases recombination in P-region. Whereas, it fairly impacts generation process. ZnS/CZTS/BSF design enhances the collection efficiency in short and long wave length regions resulting in higher solar cell performances (VOC =0.89 V, JSC =25.38mA/cm2, FF=62.44 %, η=14.14 %).

MoS2-based Charge-trapping synaptic device with electrical and optical modulated conductance

Abstract The synapse is one of the fundamental elements in human brain performing functions such as learning, memorizing, and visual processing. The implementation of synaptic devices to realize neuromorphic computing and sensing tasks is a key step to artificial intelligence, which, however, has been bottlenecked by the complex circuitry and device integration. We report a high-performance charge-trapping memory synaptic device based on two-dimensional (2D) MoS2 and high-k Ta2O5–TiO2 (TTO) composite to build efficient and reliable neuromorphic system, which can be modulated by both electrical and optical stimuli. Significant and essential synaptic behaviors including short-term plasticity, long-term potentiation, and long-term depression have been emulated. Such excellent synaptic behaviors originated from the good nonvolatile memory performance due to the high density of defect states in the engineered TTO composite. The 2D synaptic device also exhibits effective switching by incident light tuning, which further enables pattern recognition with accuracy rate reaching 100%. Such experimental demonstration paves a robust way toward a multitask neuromorphic system and opens up potential applications in future artificial intelligence and sensing technology.

Investigation of Electrical Characteristics Dependency of Roll-to-Roll Printed Solar Cells With Silver Electrodes on Mechanical Tensile Strain

In this work we have studied the effects of the tensile mechanical strain on the electrical behavior of a roll-to-roll printed solar cell module with silver electrodes. After applying the strain along the length of the solar module, its current-voltage curves were measured in dark and under light illumination conditions. By electrical parameters extraction of the curves in both conditions, valuable information was achieved which proved that the dark and light parameters are in good agreement with each other and can each be used as a means to evaluate the solar cells. Electrical parameters like series resistance and power conversion efficiency, all show improvements for moderate tensile strain levels. The power conversion efficiency had about 3.8% improvement after applying 2400 με tensile strain. This is due to the polymer chains alignment in the direction of the applied tensile strain. However, higher strain levels damaged the interfaces among the solar cells' layers. These broken bonds created a high density of defect states and thus reduced the electrical performance of the solar cell. This research showed that the solar cell under the test can be mechanically deformed under moderate strains while showing a better electrical performance. So these cells are a suitable choice for applications in which the cells are used under a mechanical tensile strain.

The Impact of Different Si Surface Terminations in the (001) n-Si/NiOx Heterojunction on the Oxygen Evolution Reaction (OER) by XPS and Electrochemical Methods

The interaction between (001) n-Si and NiOx was investigated with regard to the oxygen evolution reaction (OER), applicable either for water splitting or CO2 reduction. Thin layers of nickel oxide were deposited step by step by reactive sputter deposition and analyzed in-situ after each step using X-ray photoelectron spectroscopy (XPS). This was performed for silicon with different surface preparations: H-termination, thermally grown oxide (2 Å) and a monolayer of native oxide (4 Å). Upon contact formation the initial flatband like situation in the Si substrates changed to a 0.35 to 0.4 eV upward band bending for all three heterojunctions, with an alignment of the valence bands favorable to hole extraction. With near identical heterojunction performance and identical NiOx catalyst layers (η(10 mA/cm2) = 0.44 ± 0.01 V vs. RHE on Ni) an equally identical performance for the OER would be expected. While the native oxide covered sample shows the expected performance in cyclic voltammetry measurements the others fall short of expectations. Using chopped light measurements, this under-performance could be attributed to a higher density of defect states at the silicon surface. Apparently a 4Å SiO2 layer is sufficient protection to prevent the formation of defect states during NiOx deposition, thinner protective layers or none at all result in increased defect states, while thicker layers perform poorly due to their high resistance.

A metal/Ba0.6Sr0.4TiO3/SiO2/Si single film device for charge trapping memory towards a large memory window

In this study, we present a metal/Ba0.6Sr0.4TiO3/SiO2/Si (MBOS) structure for charge trapping memory, where the single Ba0.6Sr0.4TiO3 film acts as the blocking layer and charge trapping layer. This MBOS device structure demonstrates excellent charge trapping characteristics, a large memory window up to 8.4 V under an applied voltage of ±12 V, robust charge retention of only 4% charge loss after 1.08 × 104 s, fast switching rate, and great program/erase endurance. These attractive features are attributed to the high density of defect states in the Ba0.6Sr0.4TiO3 film and its inter-diffusion interface with SiO2. The properties of defect states in the Ba0.6Sr0.4TiO3 film are investigated through measurements of photoluminescence and photoluminescence excitation spectroscopy. The energy levels of these defect states are found to be distributed between 2.66 eV and 4.05 eV above the valence band. The inter-diffusion at the Ba0.6Sr0.4TiO3/SiO2 interface is observed by high-resolution transmission electron microscopy. More defect sites were created to obtain a better charge trapping capability and retention characteristics.

Interface Energy Alignment of Atomic-Layer-Deposited VOx on Pentacene: an in Situ Photoelectron Spectroscopy Investigation.

Ultrathin atomic-layer-deposited (ALD) vanadium oxide (VOx) interlayer has recently been demonstrated for remarkably reducing the contact resistance in organic electronic devices (Adv. Funct. Mater. 2016, 26, 4456). Herein, we present an in situ photoelectron spectroscopy investigation (including X-ray and ultraviolet photoelectron spectroscopies) of ALD VOx grown on pentacene to understand the role of the ALD VOx interlayer for the improved contact resistance. The in situ photoelectron spectroscopy characterizations allow us to monitor the ALD growth process of VOx and trace the evolutions of the work function, pentacene HOMO level, and VOx defect states during the growth. The initial VOx growth is found to be partially delayed on pentacene in the first ∼20 ALD cycles. The underneath pentacene layer is largely intact after ALD. The ALD VOx is found to contain a high density of defect states starting from 0.67 eV below the Fermi level, and the energy level of these defect states is in excellent alignment with the HOMO level of pentacene, which therefore allows these VOx defect states to provide an efficient hole-injection pathway at the contact interface.

Formation, Structure and Optical Properties of Nanocrystalline BaSi<sub>2</sub> Films on Si(111) Substrate

BaSi2 thin films were formed on Si (111) substrate by solid-phase epitaxy (SPE) (UHV deposition) using the template technology followed by vacuum annealing at temperatures of 600 °C and 750 °C. After the deposition and annealing barium silicide films were characterized by Auger electron spectroscopy, grazing incidence x-ray diffraction (GIXRD) and atomic-force microscopy (AFM). It was established that the films annealed at T = 600 °C are polycrystalline with the structure of the orthorhombic BaSi2, with grain sizes of 100-200 nm. Higher anneal temperature (T=750 °C) leads to increase of diffraction peak intensity of BaSi2 phase with grain coagulation into 300-400 nm islands. It was confirmed that nanocrystalline BaSi2 films are characterized by a direct fundamental interband transition at 1.3 eV, the second interband transition with an energy of 2.0 eV, own phonon structure with wave number peaks at 112, 119, 146 and 208 cm-1 and a high density of defect states within the band gap, which provide a noticeable subband absorption at energies of 0.8 – 1.1 eV.

Enhanced photoluminescence and solar cell performance via Lewis base passivation of organic-inorganic lead halide perovskites.

Organic-inorganic metal halide perovskites have recently emerged as a top contender to be used as an absorber material in highly efficient, low-cost photovoltaic devices. Solution-processed semiconductors tend to have a high density of defect states and exhibit a large degree of electronic disorder. Perovskites appear to go against this trend, and despite relatively little knowledge of the impact of electronic defects, certified solar-to-electrical power conversion efficiencies of up to 17.9% have been achieved. Here, through treatment of the crystal surfaces with the Lewis bases thiophene and pyridine, we demonstrate significantly reduced nonradiative electron-hole recombination within the CH(3)NH(3)PbI(3-x)Cl(x) perovskite, achieving photoluminescence lifetimes which are enhanced by nearly an order of magnitude, up to 2 μs. We propose that this is due to the electronic passivation of under-coordinated Pb atoms within the crystal. Through this method of Lewis base passivation, we achieve power conversion efficiencies for solution-processed planar heterojunction solar cells enhanced from 13% for the untreated solar cells to 15.3% and 16.5% for the thiophene and pyridine-treated solar cells, respectively.

Capacitance Analysis of the Structures with the a-Si:H(i)/c-Si(p) Heterojunction for Solar-Cell Applications

Abstract In this paper we present the capacitance study of the intrinsic amorphous silicon/crystalline silicon heterostructure with the aim to gain insight on the heterointerface properties of a passivated silicon heterojunction solar cell. It is shown that due to the high density of defect states in the amorphous layer the structure has to be analyzed as a heterojunction. Using the analysis, the following values have been determined: conduction-band offset of 0.13 eV, electron affinity of 3.92 eV, and density of defect states in the intrinsic amorphous silicon being that of 4.14 X 1021m—3.

Role of the dielectric for the charging dynamics of the dielectric/barrier interface in AlGaN/GaN based metal-insulator-semiconductor structures under forward gate bias stress

The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔVth, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness tD and barrier thickness tB, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔNit, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔNit is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.

Selectively grown vertical silicon nanowire p–n+ photodiodes via aqueous electroless etching

A facile method to selectively grow vertically-aligned silicon nanowires (SiNWs) which can inherit the doping concentration from its mother wafer, with controllable length, is demonstrated using the combination of photolithography and aqueous electroless etching. The use of SU-8-2002, a chemically and mechanically robust photoresist (PR) material, provided a high selectivity for the etching reaction on the exposed surface of 1-μm-thick n+ doped p-type (100) Si substrate, resulting in the fabrication of ∼30-μm-long vertically-aligned SiNW photodiode arrays on the desired locations, while the areas covered with SU-8-2002 remained unreacted. Optical and field emission scanning electron microscope analyses confirmed that SiNWs were selectively grown while retaining the shape of the PR patterns. The electrical and optical measurements of the fabricated p–n+ junction SiNW photodiodes were compared to those of reference planar p–n+ junction Si photodiodes: the current density of the p–n+ junction SiNW photodiodes was approximately 3 times greater than that of the planar counterpart at the forward bias of 5V, which can be attributed to the high density of defect states on the rough surfaces of the synthesized SiNWs, leading to the increased recombination efficiencies for the injected carriers. In addition, the photoresponse of the p–n+ SiNW photodiode arrays was 3.4 times higher than that of the planar device at −3.5V due to the increase in the light scattering.