High-density Nonvolatile Memory Applications Research Articles

Sol-Gel Derived ZnO Thin Films with Nonvolatile Resistive Switching Behavior for Future Memory Applications

Herein we report on a facile sol-gel spin-coating technique to fabricate ZnO thin films that grow preferentially along the (002) plane on FTO substrates. By employing the magnetron sputtering technique to deposit a tungsten (W) top metal electrode onto these ZnO thin films, we successfully realize a W/ZnO/FTO memory device that exhibits self-rectifying and forming-free resistive switching characteristics. Notably, the as-prepared device demonstrates impressive nonvolatile and bipolar resistive switching behavior, with a high resistance ratio (RHRS/RLRS) exceeding two orders of magnitude at a reading voltage of 0.1 V. Moreover, it exhibits ultralow set and reset voltages of approximately +0.5 V and −1 V, respectively, along with exceptional durability. In terms of carrier transport properties, the low resistance state of the device is dominated by ohmic conduction, whereas the high resistance state is characterized by trap-controlled space-charge-limited current conduction. This work highlights the potential of the ZnO-based W/ZnO/FTO memory device as a promising candidate for future high-density nonvolatile memory applications.

Multilevel resistive switching in hydrothermally synthesized FeWO4 thin film-based memristive device for non-volatile memory application

The memristors offer significant advantages as a key element in non-volatile and brain-inspired neuromorphic systems because of their salient features such as remarkable endurance, ability to store multiple bits, fast operation speed, and extremely low energy usage. This work reports the resistive switching (RS) characteristics of the hydrothermally synthesized iron tungstate (FeWO4) based thin film memristive device. The detailed physicochemical analysis was investigated using Rietveld’s refinement, X-ray photoelectron spectroscopy (XPS), field emission scanning electron microscopy (FE-SEM), and transmission electron microscopy (TEM) techniques. The fabricated Ag/FWO/FTO memristive device exhibits bipolar resistive switching (BRS) behavior. In addition, the devices exhibit negative differential resistance (NDR) at both positive and negative bias. The charge-flux relation portrayed the non-ideal or memristive nature of the devices. The reliability in the RS process was analyzed in detail using Weibull distribution and time series analysis techniques. The device exhibits stable and multilevel endurance and retention characteristics which demonstrates the suitability of the device for the high-density non-volatile memory application. The current conduction of the device was dominated by Ohmic and trap controlled-space charge limited current (TC-SCLC) mechanisms and filamentary RS process responsible for the BRS in the device. In a nutshell, the present investigations reveal the potential use of the iron tungstate for the fabrication of memristive devices for the non-volatile memory application.

Multilevel Cell Ferroelectric HfZrO FinFET With High Speed and Large Memory Window Using AlON Interfacial Layer

In this study, scaled ferroelectric fin field-effect transistors (Fe-FinFETs) based on HfZrO2 were fabricated and characterized for multi-level cell (MLC) operations. With the scaled dimensions of 40 nm for the fin width and gate length of 200–320 nm, the fabricated Fe-FinFET exhibited a large memory window measuring 2.8 V, which is more fault-tolerant for MLC operations. Further, the Fe-FinFET depicted a high switching speed of 100 ns and clearly separated intermediate states, which are suitable for MLC operations. Robust endurance of up to 105 fatigue cycles for each state and a data retention time of up to 104 s without degradation were recorded. The Fe-FinFET demonstrates a high potential for high-density nonvolatile memory applications.

Memristive Cluster Based Compact High-Density Nonvolatile Memory Design and Application for Image Storage

As a new type of nonvolatile device, the memristor has become one of the most promising technologies for designing a new generation of high-density memory. In this paper, a 4-bit high-density nonvolatile memory based on a memristor is designed and applied to image storage. Firstly, a memristor cluster structure consisting of a transistor and four memristors is designed. Furthermore, the memristor cluster is used as a memory cell in the crossbar array structure to realize the memory design. In addition, when the designed non-volatile memory is applied to gray scale image storage, only two memory cells are needed for the storage of one pixel. Through the Pspice circuit simulation, the results show that compared with the state-of-the-art technology, the memory designed in this paper has better storage density and read–write speed. When it is applied to image storage, it achieves the effect of no distortion and fast storage.

Conductance quantization control and neuromorphic properties in Pt-nanoparticle incorporated HfAlOx alloy memristor

In this work, platinum nanoparticles have been utilized to achieve better control of conductance quantization for high-density memory storage nonvolatile memory applications. Here, atomic layer deposited Pt-nanoparticles are sandwiched between HfAlOx switching layers. An Au/Ti/HfAlOx/Pt-NP/HfAlOx/ITO resistive random-access memory (RRAM) device exhibits bipolar resistive switching SET/RESET properties at a very low external electric field with memory window >10 and an endurance of >103 cycles. With a very slow voltage sweep rate (0.002 V/step) during current–voltage characteristics under both SET and RESET conditions, a controlled stepwise increase/decrease in distinct conductance quantization behavior with integer and half-integer multiples was observed. This phenomenon predicts atomic contact formation and rupture of oxygen vacancies between conductive filaments and Pt-NPs. Control of post-synaptic conductance properties with modulation of pre-spike width, number, and frequency showed the robustness of the RRAM device studied here. Gradual, controlled change in conductance obtained under dc and pulse conditions in the experiments is very promising for next-generation multi-level high-density storage RRAM devices to develop artificial electric synapses for neuromorphic applications.

Low power Ti-doped NbO2-based selector device with high selectivity and low OFF current

The crossbar array-based resistive memory is considered a potential architecture for high-density nonvolatile memory applications. However, the sneak current path problem associated with the crossbar array structure limits its use in practical applications. This limitation can be removed by employing a selector device in the crossbar array structure. Therefore, we propose NbO2 as a selector device as it operates at a rapid speed during the insulator-metal transition (IMT). Herein, we fabricated a Ti-doped NbO2 selector device and demonstrated a very low OFF current (5 × 10-11 A). The effect of Ti doping in the NbO2 device was studied by varying the Ti concentration during a radio frequency co-sputtering process. We intentionally prevented the formation of Nb2O5, and a high-quality NbO2 layer was deposited with an appropriate Ti concentration. Furthermore, we modulated the IMT characteristics of the NbO2 device by varying the Ti concentration. The fabricated Ti-doped NbO2 selector device showed an ION/IOFF ratio greater than 5 × 104. Additionally, a drift-free fast switching operation (<20 ns) was achieved for the optimized selector device. These results suggest the high suitability of IMT-based NbO2 devices in selector applications.

Forming-free and multilevel resistive switching properties of hydrothermally synthesized hexagonal molybdenum oxide microrods

In recent years, resistive switching memory devices are attracted much attention for high-density non-volatile memory applications owing to their cell scalability, multilevel operations, and 3D capability in crossbar memory arrays. In this work, we report the forming-free and multilevel resistive switching properties of hydrothermally synthesized hexagonal molybdenum oxide (h-MoO3) microrods. The formation of h-MoO3 microrods was confirmed by using the X-ray diffraction technique and scanning electron microscopy. Different chemical properties of h-MoO3 microrods were determined by energy-dispersive X-ray, photoluminescence, Raman, and X-ray photoelectron spectroscopic techniques. The memory device was fabricated in a Ti/MoO3/FTO structure and its bipolar resistive switching properties were investigated. The memory device shows voltage-dependent tunable I-V properties and shows electroforming-free operation. Moreover, we have calculated the different memristive properties and showed that the device possesses double-valued charge-magnetic flux characteristics, suggesting the dominance of memristive properties in the Ti/MoO3/FTO device. We further explored the multilevel resistive switching property of the device by varying the RESET voltage. The Ti/MoO3/FTO memristive device can able to show four distinct resistive states during endurance and retention tests. The statistical analysis suggested that the device has less variation during the cycle-to-cycle operation. The device conduction mechanism was obtained by fitting different charge transport models, and a possible resistive switching mechanism is presented based on the observed multilevel resistive switching effect of the Ti/MoO3/FTO memristive device.

Effect of Annealing Treatment on Performance of Ga2O3 Conductive-Bridging Random-Access Memory

The effect of annealing on the performance of conductive-bridging random-access memory (CBRAM) with an amorphous gallium oxide (a-Ga2O3) switching layer has been studied. After annealing at 200°C in N2, a significant improvement of the bipolar resistive switching characteristics was observed. The a-Ga2O3 CBRAM showed good memory performance, with high switching endurance (up to 7.5 × 102 cycles) and high thermal stability. The resistive switching stability and electrical uniformity were also obviously improved. The memory window remained above 105 over 7.5 × 102 endurance cycles at 85°C. Material characterization by x-ray photoelectron spectroscopy suggested that the improved uniformity of the resistive switching in the N2-annealed Ga2O3 films may result from a higher density of oxygen vacancies. These results indicate great potential for such devices in future high-density nonvolatile memory applications.

Impact of Thermal Boundary Resistance on the Performance and Scaling of Phase-Change Memory Device

The scaling of RESET current ( $I_{\mathrm{ RESET}}$ ) used for reamorphization in phase-change memory (PCM) devices has been a challenging task to meet the energy-efficient programming. The faithful prediction of $I_{\mathrm{ RESET}}$ of scaled-down devices demands realistic physical models in order to examine low-power, miniaturized device characteristics, and the potential of a highly scalable PCM technology. Therefore, modeling the intrinsic interface effects, thermal boundary resistance (TBR) at the GeSbTe (GST)–metal and GST–oxide interfaces, and electrical interface resistance (EIR) at the GST–metal interface of the nanoscale PCM device is necessary. In this paper, the impact of presence and absence of TBR and EIR on $I_{\mathrm{ RESET}}$ in a mushroom-type PCM device is investigated, and their usefulness on scaling is predicted for diminished devices. Reductions in $I_{\mathrm{ RESET}}$ , 32% in the case of 100 nm contact diameter (CD), 45% for the 40-nm CD and 73% for the 10-nm CD are achieved by taking into account of interface effects, and these results are validated with experimental results published elsewhere. The fitted model suggests $I_{\mathrm{ RESET}}$ scales down linearly with CD and necessitates for the combined effects of TBR and EIR to successfully follow the isotropic scaling in mushroom-type devices. Hence, our simulation results demonstrate the significance of TBR and EIR for a better optimization and a reliable prediction of $I_{\mathrm{ RESET}}$ for low-power programming of PCM devices toward enabling next generation high-speed, high-density nonvolatile memory applications.

Edge-soliton-meditated fast vortex core dynamic switching in a notched magnetic disk

Magnetic vortices are characterized by the sense of in-plane magnetization chirality and by the polarity of the vortex core. Searching for efficient ways to control the vortex polarity and chirality is of highly fundamental and practical significance towards high speed and high density non-volatile memory applications. Here we report a novel vortex core (VC) switching process in a notched disk, driven by a pulse field. Micromagnetic simulations demonstrate that the dynamics of edge solitons around the notch play a critical role in the switching process, that leads to a sub-nanosecond VC fast switching. The switching diagram as a function of the field strength and duration was presented to indicate the operational range. Further studies on the VC switching under an out-of-plane bias field demonstrate that such switching is deterministic and robust against magnetic environment. Finally, by applying a resonant alternative field, a periodic VC switching is observed with much reduced switching field. The presented results indicate the potential of notched disks for VC based memory applications.

Resistive Switching Characteristics and Reliability of SiN&lt;italic&gt;x&lt;/italic&gt;-Based Conductive Bridge Random Access Memory

The switching properties of Te and TeTiW top electrodes (TEs) on TiW/SiN/TiN resistive switching memory devices are explored in this paper. The TeTiW TE device exhibits more favorable bipolar resistive switching behavior because of the decrease in binding energy after its use. This finding is confirmed through X-ray photoelectron spectroscopy analyses. The filament of the TeTiW TE device is metal like after forming, and the reset process corresponds with the thermal-dissolution mechanism. A physical model based on a Te filament is constructed to explain such phenomena. The TeTiW TE device provides the excellent endurance of more than 104 cycles, with an ON/OFF ratio of 500. The improvement can be attributed to the filament’s robustness during the forming and set processes, which prevent its diffusion even at high temperature. The device also features long retention for up to 104 s at 225 °C without stress, and 104 s at 85 °C with stress of −0.3 V. Therefore, it has high potential for high-density nonvolatile memory applications.

Investigation on Amorphous Ga2O3 Based Conductive-Bridge Resistive Switching Memory with Low-Power, High-Speed, High Reliability

In this work, Ga2O3 single layer serving as the resistive switching layer of a conductive bridge RAM device using a Cu-based supply layer was reported. Gallium oxide is a wide bandgap semiconductor with high dielectric constant and high breakdown voltages. By applying a Ga2O3 layer as the resistive switching layer, the excellent memory performances, such as low operation current (down to 100μA), notably high on/off resistance ratio (more than 105), and high switching endurance (>103 cycles) have been demonstrated in this study. Meanwhile, good stable retention property is also achieved (five decades of window margin are constantly maintained beyond 104 s at 85 ◦C). The novel Ga2O3-based CBRAM is a promising technology for potential future high density nonvolatile memory applications.

High-Density NAND-Like Spin Transfer Torque Memory With Spin Orbit Torque Erase Operation

We present a NAND-like spintronics memory (NAND-SPIN) device for high-density non-volatile memory applications. Fast erasing and programming of magnetic tunnel junction (MTJ) are implemented with two unidirectional currents generating spin orbit torque (SOT) and spin transfer torque (STT), respectively. The asymmetric switching drawback of STT mechanism can be definitively overcome as only anti-parallel to parallel operation happens for NAND-SPIN programming, which allows lower switching current, smaller access transistor, and reduced maximum write voltage across the MTJ. By sharing the SOT-induced erase operation in a nanowire, the area overhead due to the three-terminal structure can be also eliminated. Simulation results show that NAND-SPIN can achieve 3 ~ 5× reduction in write energy compared to STT-MRAM, and 2 ~ 4× less bit-cell area than SOT-MRAM at 28 nm node.

Characteristics of multilevel storage and switching dynamics in resistive switching cell of Al2O3/HfO2/Al2O3 sandwich structure

We reported an Al2O3/HfO2/Al2O3 sandwich structure resistive switching device with significant improvement of multilevel cell (MLC) operation capability, which exhibited that four stable and distinct resistance states (one low resistance state and three high resistance states) can be achieved by controlling the Reset stop voltages (VReset-stop) during the Reset operation. The improved MLC operation capability can be attributed to the RHRS/RLRS ratio enhancement resulting from increasing of the series resistance and decreasing of leakage current by inserting two Al2O3 layers. For the high-speed switching applications, we studied the initial switching dynamics by using the measurements of the pulse width and amplitude dependence of Set and Reset switching characteristics. The results showed that under the same pulse amplitude conditions, the initial Set progress is faster than the initial Reset progress, which can be explained by thermal-assisted electric field induced rupture model in the oxygen vacancies conductive filament. Thus, proper combination of varying pulse amplitude and width can help us to optimize the device operation parameters. Moreover, the device demonstrated ultrafast program/erase speed (10 ns) and good pulse switching endurance (105 cycles) characteristics, which are suitable for high-density and fast-speed nonvolatile memory applications.

Gate contact resistive random access memory in nano scaled FinFET logic technologies

A full logic-compatible embedded gate contact resistive random access memory (GC-RRAM) cell in the CMOS FinFET logic process without extra mask or processing steps has been successfully demonstrated for high-density and low-cost logic nonvolatile memory (NVM) applications. This novel GC-RRAM cell is composed of a transition metal oxide from the gate contact plug and interlayer dielectric (ILD) in the middle, and a gate contact and an n-type epitaxial drain terminal as the top and bottom electrodes, respectively. It features low-voltage operation and reset current, compact cell size, and a stable read window. As a promising embedded NVM solution, the compact one transistor and one resistor (1T1R) cell is highly scalable as the technology node progresses. Excellent data retention and cycling capability have also been demonstrated by the reliability testing results. These superior characteristics make GC-RRAM one of a few viable candidates for logic NVM for future FinFET circuits.

Effects of bottom electrode on resistive switching of silver programmable metallization cells with GdxOy/AlxOy solid electrolytes

This study investigated the effects of the bottom electrode (BE) on the resistive switching (RS) of silver programmable metallization cells (Ag-PMCs) with gadolinium oxide and aluminum oxide (GdxOy/AlxOy) solid electrolytes (SEs). The RS mechanisms of memories with different bottom electrodes were proposed based on the temperature dependence of the resistance at low resistance state (LRS) and current–voltage (I–V) fitting at high resistance state (HRS). The Schottky emission was dominant in the resistive switching of the memory with an iridium bottom electrode (Ir-BE), whereas in the memories with n+-Si and nickel (Ni) bottom electrodes, silver and both silver and nickel ions dominated the resistive switching, respectively. Additionally, the Ag-PMC with Ni-BE had a high resistance ratio of more than 107 as a result of the extremely low resistance of roughly 50 Ω at LRS. The Ag-PMCs with GdxOy/AlxOy SEs and Ni-BE exhibited a retention behavior of more than 104 s and an endurance of more than 500 cycles with a resistance ratio of at least four orders of magnitude, which is promising for future high-density nonvolatile memory applications.

Design Tradeoffs of Vertical RRAM-Based 3-D Cross-Point Array

The 3-D integration of resistive switching random access memory (RRAM) array is attractive for low-cost and high-density nonvolatile memory application. In this paper, the design tradeoffs of select transistor drivability, RRAM device characteristics, such as switching current ( $I_{W}$ ), on / off -state resistance ( $R_{{\mathrm{\scriptscriptstyle ON}}}$ / $R_{{\mathrm{\scriptscriptstyle OFF}}}$ ), and $I$ – $V$ nonlinearity ratio, interconnect material, and write/read scheme are systematically analyzed using a 3-D circuit simulation. The simulation results show that insufficient current drivability of the vertical transistor severely limits the number of 3-D layers. A low switching current (high $R_{{\mathrm{\scriptscriptstyle ON}}}$ ) or a high nonlinearity is beneficial for improving the write margin, while it degrades the read current sense margin. To alleviate this conflict, the read voltage needs to be boosted to the half write voltage. The common RRAM electrode material TiN is not suitable for the interconnect material due to a high resistivity. To improve write energy efficiency, a multiple-bit write scheme is proposed to reduce the write energy consumption per bit and enable a high bandwidth. With $R_{{\mathrm{\scriptscriptstyle ON}}}=500~\text{k}\Omega $ ( $I_{W}=6~\mu \text{A}$ ) and nonlinearity ratio $=10$ , 1-Mb 3-D vertical RRAM subarray is feasible to meet the specified write/read margin with $\sim 2$ -pJ/bit energy consumption.

Correction to Redox-Active Molecular Nanowire Flash Memory for High-Endurance and High-Density Nonvolatile Memory Applications.

Correction to Redox-Active Molecular Nanowire Flash Memory for High-Endurance and High-Density Nonvolatile Memory Applications.

Novel Molecular Non-Volatile Memory: Application of Redox-Active Molecules

This review briefly describes the development of molecular electronics in the application of non-volatile memory. Molecules, especially redox-active molecules, have become interesting due to their intrinsic redox behavior, which provides an excellent basis for low-power, high-density and high-reliability non-volatile memory applications. Recently, solid-state non-volatile memory devices based on redox-active molecules have been reported, exhibiting fast speed, low operation voltage, excellent endurance and multi-bit storage, outperforming the conventional floating-gate flash memory. Such high performance molecular memory will lead to promising on-chip memory and future portable/wearable electronics applications.

3-D Resistive Memory Arrays: From Intrinsic Switching Behaviors to Optimization Guidelines

3-D resistive switching random access memory (RRAM) is a promising candidate for high-density nonvolatile memory applications, as well as for monolithic 3-D integration interleaved with logic layers. In this paper, we develop a methodology for assessing and optimizing large-scale 3-D RRAM arrays. A systematic study on the intrinsic switching behaviors and optimization of 3-D RRAM arrays is performed, combining device measurements and 3-D array simulations. The dependence of programming voltage on array size, cell location and pulse parameters, statistical properties of operating 3-D RRAM arrays, and subthreshold disturbance on RRAM cells is experimentally investigated. Optimization guidelines for the performance and reliability of 3-D RRAM arrays from device level to architecture level are presented: 1) an optimized 1/ $n$ architecture for 100-kb 3-D RRAM arrays can improve write margin by 69.6% and reduce energy consumption by 75.6% compared with a conventional full-size array design; 2) a strategy of prioritizing storage location for reliable operation is presented; and 3) an optimal hopping barrier of oxygen ions is found to improve array immunity to disturbance.