High Coding Research Articles

Generation of phase-coded microwave signals using a polarization-modulator-based photonic microwave phase shifter

A scheme for the generation of phase-coded microwave signals using an electrically tunable photonic microwave phase shifter is proposed and demonstrated. The photonic phase shifter is based on a single-sideband polarization modulator (PolM), and the tuning of the phase shifter is implemented by a second PolM. By introducing an RF signal to the first PolM and an electrical coding signal to the second PolM, a phase-coded microwave signal with binary phase codes or polyphase codes is achieved. An experiment is performed. The simple and flexible operation, high coding rate, large frequency range, excellent transmission performance, and high stability of the system is confirmed.

Polar Codes for Gaussian Degraded Relay Channels

In this paper we apply polar codes for the Gaussian degraded relay channel. We study the conditions to be satisfied by the codes and provide an efficient method for constructing them. The relay-destination link is special because the noise is the sum of two components: the Gaussian noise and the signals from the source. We study this link and provide the log-likelihood expression to be used by the polar code detector. We perform simulations of the channel and the results show that polar codes of high rate and large codeword length are closer to the theoretical limit than other good codes.

Design and Implementation of Long High-Rate QC-LDPC Codes and Its Applications to Optical Transmission Systems

Design and Implementation of Long High-Rate QC-LDPC Codes and Its Applications to Optical Transmission Systems

A New Family of Optical Codes Based on Complementary Theory for OCDMA System

A new family of optical codes for Optical Code-division Multiple Access (OCDMA) systems, named as Optical Complementary Codes (OCCs), is proposed in this paper. The constructions of these codes consist of multiple sub-codes, and the codes have an auto-correlation interference constraint as 0 and a cross-correlation interference constraint as 1. Compared with conventional optical codes such as OPCs, OOCs and 2-D OOCs, the OCC has a shorter code length and higher code efficiency with better correlation property.

High-rate systematic recursive convolutional encoders: minimal trellis and code search

Abstract We consider high-rate systematic recursive convolutional encoders to be adopted as constituent encoders in turbo schemes. Douillard and Berrou showed that, despite its complexity, the construction of high-rate turbo codes by means of high-rate constituent encoders is advantageous over the construction based on puncturing rate-1/2 constituent encoders. To reduce the decoding complexity of high-rate codes, we introduce the construction of the minimal trellis for a systematic recursive convolutional encoding matrix. A code search is conducted and examples are provided which indicate that a more finely grained decoding complexity-error performance trade-off is obtained.

Performance of Low-Density Parity Check Codes With Parity Encoded by (1, 7) Run-Length Limited Code for Perpendicular Magnetic Recording

Maximum transition run (MTR) codes have recently been applied for perpendicular magnetic recording because of their high code rate. At the same time, the (1, 7) run-length limited (RLL) code, which increases the minimum distance of data transition, has not been applied due to a code rate that is lower than MTR codes. Therefore, in order to receive the advantages of both codes when low-density parity check (LDPC) codes are applied, this paper proposes an LDPC coding scheme with parity encoded by (1, 7) RLL code. This will increase the performance of LDPC codes and minimize the loss of code rate with MTR-coded user data in the perpendicular magnetic recording channel. The Viterbi trellis is easily modified by different constraints of MTR and (1, 7) RLL codes. Simulation results show that MTR-coded user data with (1, 7) RLL-coded LDPC parity performs approximately 0.3 dB better than MTR-coded user data with parity. It also performs better regardless of various user bit densities.

Non-Pauli observables for CWS codes

It is known that nonadditive quantum codes can have higher code dimensions than stabilizer codes for the same length and minimum distance. The class of codeword stabilized codes (CWS) provides tools to obtain new nonadditive quantum codes by reducing the problem to finding nonlinear classical codes. In this work, we establish some results on the kind of non-Pauli operators that can be used as observables in the decoding scheme of CWS codes and propose a procedure to obtain those observables.

Progressive Differences Convolutional Low-Density Parity-Check Codes

We present a new family of low-density parity-check (LDPC) convolutional codes that can be designed using ordered sets of progressive differences. We study their properties and define a subset of codes in this class that have some desirable features, such as fixed minimum distance and Tanner graphs without short cycles. The design approach we propose ensures that these properties are guaranteed independently of the code rate. This makes these codes of interest in many practical applications, particularly when high rate codes are needed for saving bandwidth. We provide some examples of coded transmission schemes exploiting this new class of codes.

Architecture of Generalized Bit-Flipping Decoding for High-Rate Non-binary LDPC Codes

A VLSI architecture for the generalized bit-flipping decoding algorithm for non-binary low-density parity-check codes is proposed in this paper. The tentative decoding steps of the algorithm have been modified to avoid computing and storing a matrix of dimension N×2 q , for a code (N,K) over GF(2 q ), reducing its complexity with a minimal penalization of its performance, less than 0.05 dB compared with the original algorithm. The architecture was synthesized using a 90 nm standard cell library, for the (837,723) non-binary code over GF(25), requiring 590220 xor gates and achieving a throughput of 89 Mbps. Additionally, it was implemented in a Virtex-VI FPGA device with a cost of 4070 slices and a throughput of 44.6 Mbps.

Enhancing the Performance of the SIC-MMSE Iterative Receiver for Coded MIMO Systems via Companding

Iterative detection and decoding (IDD) method based on soft interference cancellation and minimum-mean squared-error filtering (SIC-MMSE) has received considerable attention in recent years due to its good performance-complexity tradeoff for coded multiple-input multiple-output (MIMO) systems. The Gaussianity of the a priori and a posteriori log-likelihood ratios (LLRs) computed at the constitute stages of the SIC-MMSE iterative receiver is a presumption for IDD to work. In this letter, the Gaussianity assumption is first shown to be not tight for high rate coded MIMO systems and thus leads to poor performance (for high rate coded MIMO systems). Then a non-linear companding based transformation method is incorporated into the SIC-MMSE iterative receiver to alleviate the non-Gaussianity of the a priori and a posteriori LLRs due to the imperfection of the (high-rate) code and per-stream approximation. Analytical and numerical results show that the proposed transformed SIC-MMSE iterative receiver achieves significant performances gains over the conventional one for coded MIMO systems, in particular, high rate coded ones with even lower computational complexity.

High-speed and parallel approach for decoding of binary BCH codes with application to Flash memory devices

In this article, we propose a high-speed decoding algorithm for binary BCH codes that can correct up to 7 bits in error. Evaluation of the error-locator polynomial is the most complicated and time-consuming step in the decoding of a BCH code. We have derived equations for specifying the coefficients of the error-locator polynomial, which can form the basis for the development of a parallel architecture for the decoder. This approach has the advantage that all the coefficients of the error locator polynomial are computed in parallel (in one step). The roots of error-locator polynomial can be obtained by Chien's search and inverting these roots gives the error locations. This algorithm can be employed in any application where high-speed decoding of data encoded by a binary BCH code is required. One important application is in Flash memories where data integrity is preserved using a long, high-rate binary BCH code. We have synthesized generator polynomials for binary BCH codes (error-correcting capability, s) that can be employed in Flash memory devices to improve the integrity of information storage. The proposed decoding algorithm can be used as an efficient, high-speed decoder in this important application.

Multi-amplitude Differential Space-time Block Coding Scheme for Square/Non-Square Code Matrix in MIMO Systems

Differential space-time coding (DSTC) technique has become a good choice when channel estimations are difficult to obtain in multiple antennas system. On the basis of analyzing the existing DSTC schemes, by introducing multi - level quadrature amplitude modulation (MQAM) and matrix transform method, we develop a multi - amplitude differential space-time block coding (STBC) scheme for square or non-square code matrix in MIMO systems , and give the derivation of calculation formula e of the coding advantage in detail. The developed scheme can effectively avoid the performance loss of conventional DSTC schemes based on PSK modulation (i.e. single amplitude DSTC) in high spectrum efficiency . It can be applied to non-square code matrix case , and thus overcomes the shortcoming that existing DSTC schemes are only suit able for square code matrix. Compared with single amplitude DSTC schemes, our scheme has higher spectrum efficiency by carrying information not only on phases but also on amplitudes. Moreover, our scheme has linear decoding complexity, higher coding advantage, and higher code rate for more than two antennas. The simulations results show that the proposed scheme can provide lower BER than the existing single amplitude differential STBC schemes for both square and non-square code matri ces .

A novel construction of quantum ldpc codes based on cyclic classes of lines in euclidean geometries

The dual-containing (or self-orthogonal) formalism of Calderbank-Shor-Steane (CSS) codes provides a universal connection between a classical linear code and a Quantum Error-Correcting Code (QECC). We propose a novel class of quantum Low Density Parity Check (LDPC) codes constructed from cyclic classes of lines in Euclidean Geometry (EG). The corresponding constructed parity check matrix has quasi-cyclic structure that can be encoded flexibility, and satisfies the requirement of dual-containing quantum code. Taking the advantage of quasi-cyclic structure, we use a structured approach to construct Generalized Parity Check Matrix (GPCM). This new class of quantum codes has higher code rate, more sparse check matrix, and exactly one four-cycle in each pair of two rows. Experimental results show that the proposed quantum codes, such as EG(2,q)II-QECC, EG(3,q)II-QECC, have better performance than that of other methods based on EG, over the depolarizing channel and decoded with iterative decoding based on the sum-product decoding algorithm.

Study on the Simulation of the APT Rough Tracing System Based on the Predictive Control Technology

Laser space offers an attractive alternative in the military fields for its many advantages of wide bandwidth, high code rate, low power consumption and large capacity. Because the narrow laser beam will lead to many challenges in laser beam pointing, therefore, APT (acquisition, pointing and tracking) technology is one of key technology for the laser space communication. The ATP rough tracing servo turntable studied in this paper adopts two-axes-four-frame structure. In order to increase the tracking precision, the predictive control algorithm is adopted in the rough tracking position loop. The simulation result shows that, comparing with common PI controller, the predictive control algorithm could improve the dynamic response characteristics of the system and increase the tracking precision.

3-Time-Slot Group-Decodable STBC with Full Rate and Full Diversity

In this paper, we propose a generic method to construct group-decodable space-time block codes (STBC) with arbitrary code dimensions, including odd time slot. Based on the proposed code construction method, 3-time-slot STBC for two transmit antennas with full or even higher code rate can be obtained. The full-rate 3-time-slot STBC obtained can achieve full diversity and symbol-wise decoding complexity. It serves as a solution to the orphan-symbol (3-time-slot) transmit diversity issue raised in 3rd Generation Partnership Project (3GPP) standards.

Codes on planar Tanner graphs

Codes defined on graphs and their properties have been subjects of intense recent research. In this work, we are concerned with codes that have planar Tanner graphs. When the Tanner graph is planar, message-passing decoders can be efficiently implemented on chips without any issues of wiring. Also, recent work has shown the existence of optimal decoders for certain planar graphical models. The main contribution of this paper is an explicit upper bound on minimum distance $d$ of codes that have planar Tanner graphs as a function of the code rate $R$ for $R \geq 5/8$. The bound is given by \begin{equation*} d\le \left\lceil \frac{7-8R}{2(2R-1)} \right\rceil + 3\le 7. \end{equation*} As a result, high-rate codes with planar Tanner graphs will result in poor block-error rate performance, because of the constant upper bound on minimum distance.

LDPC coding proposal for pulsed-OFDM modulation for WPAN systems using UWB communication in indoor propagation channels

In this paper, we describe a combined approach where low density parity check (LDPC) codes are used to reduce the complexity and power consumption of pulsed orthogonal frequency-division multiplexing (pulsed-OFDM) ultra-wideband (UWB) systems. The proposed system will use LDPC codes to achieve higher code rates without using convolution encoding and puncturing thereby reducing the complexity and power consumption of pulsed-OFDM system. The LDPC-pulsed-OFDM system will achieve channel capacity with different code rates and will have good performance in different channel fading scenarios. The proposals from pulsed OFDM system is used where pulsed signals could spread the frequency spectrum of the OFDM signal. The performance of LDPC-pulsed-OFDM system for wireless personal area networks (WPAN) is analysed for different UWB indoor propagation channels (CM3 and CM4) provided by the IEEE 802.15.3a Standard activity committee. To establish this, we present a design of LDPC-pulsed-OFDM system using the digital video broadcasting-satellite-second generation (DVB-S2) standard and provide the simulation results for the different code rates supported by LDPC codes.

A fast rate-distortion optimization algorithm for H.264/AVC codec

Rate-distortion optimization (RDO) selects the mode that achieves the highest coding performance at the minimum cost after all coding modes have been computed. Unfortunately, the extreme complexity of RDO operations can severely impact real-time applications. To save coding time, we propose intra-mode-ignored decision and early skip mode prediction procedures. The former is based on the inter-coding results, such that the intra-mode may be disregarded for predictive frame coding. In the latter, a simple criterion can determine whether skip mode should be employed before performing the intra- and inter-mode procedures. Experimental results show that these two methods can significantly reduce the encoding time, by an average approximately 24 and 15%, respectively. A hybrid of the two methods could save an additional 36%, while maintaining an optimum RD.

LLR 기반 블록 터보 부호의 연판정 복호 알고리즘 일반화

This paper presents generalization and application for the conventional SISO decoding algorithm of Block Turbo Codes. R. M. Pyndiah suggested an iterative SISO decoding algorithm for Product Codes, two-dimensionally combined linear block codes, on AWGN channel. It wascalled Block Turbo Codes. Based on decision of Chase algorithm which is SIHO decoding method, SISO decoder for BTC computes soft decision information and transfers the information to next decoder for iterative decoding. Block Turbo Codes show Shannon limit approaching performance with a little iteration at high code rate on AWGN channel. In this paper we generalize the conventional decoding algorithm of Block Turbo Codes, under BPSK modulation and AWGN channel transmission assumption, to the LLR value based algorithm and suggest an application example such as concatenated structure of LDPC codes and Block Turbo Codes.

Performance Improvement in OVSF Based CDMA Networks Using Flexible Assignment of Data Calls

Orthogonal variable spreading factor (OVSF) codes are used to support multimedia calls in CDMA wireless networks. The inefficient use of OVSF code tree reduces the system throughput. The paper discusses a novel code assignment design to provide flexibility of rate variation in data calls maximizing channel utilization. The ongoing call uses different codes at different times depending on the code tree status and instantaneous traffic load. For low traffic loads, the high rate codes can be utilized. For medium to high instantaneous load conditions, the vacant codes with capacity less than the call rate can be utilized. For same call reassignments are done to assign different codes at different times. The utilization of the code tree can reach close to 100%. Simulation results are given to verify the superiority of the proposed design.