Stress simulations are presented for fins, nanowires and nanosheets with 5nm-technology dimensions. About 50-70% higher channel stress is reported in nanowires than in fins. The stress is found to depend strongly on the original fin/wire length, the position of the device along the structure, and the position of the wire (top, middle or bottom in the case of three wires). Scaling of gate length enhances channel stress, while decreasing poly and fin/wire pitch reduces it. Scaling from the 8nm- to the 3nm-node decreases nanowire stress by about 35%. Stress in nanosheets is lower than in wires, partially owing to their smaller source/drain epi-to-channel volume ratio. In case of imperfect source/drain epi stressors, the channel stress can completely vanish or reverse, in particular for the case the epi growth fronts coming from neighboring gates do not join perfectly.