High-barrier Gate Research Articles

On the high-performance n +-GaAs/p +-InGaP/n-GaAs high-barrier gate camel-like HFETs

The high-performance n +-GaAs/p +-InGaP/n-GaAs high-barrier gate camel-like HFETs are successfully fabricated and demonstrated. The p +-InGaP layer is introduced to increase the barrier height and carrier confinement. Experimentally, good DC and AC device performances are obtained. For the studied 1×100 μm 2 device A (B), a gate–drain turn-on voltage of 1.6 (1.2) V, gate–drain breakdown voltage over 40 V with low leakage current of 400 (37) μA/mm, drain–source off-state breakdown voltage of 38 (39.7) V, maximum transconductance g m,max of 145 (147) mS/mm, unity current gain cut-off frequency f T of 17 (15) GHz, and maximum oscillation frequency f max of 33 (28) GHz are obtained, respectively, at room temperature. Moreover, the studied devices also show significantly wide and flat I DS operation regimes of g m, f T and f max.

Study of InGaP/GaAs/InGaAs high-barrier gate and heterostructure-channel field-effect transistors

A heterostructure field-effect transistor with an n+-GaAs/p+-InGaP/n-GaAs high-barrier gate and n-GaAs/i-InGaAs/i-GaAs/delta-doped sheet heterostructure channel (device A) has been successfully fabricated and studied. The heavily doped p+-InGaP layer and heterostructure channel are introduced to increase the barrier height and carrier confinement, respectively. Experimentally, the device without the high-barrier gate structure (device B) is also fabricated for comparison to investigate the influence of high-barrier gate structure on device characteristics. Due to the high-barrier gate added to suppress the tunneling current in device A, the gate leakage current is also substantially reduced. Therefore, the turn-on voltage, breakdown voltage, current drivability, and transconductance linearity are all significantly improved for device A relative to device B. Furthermore, the temperature-dependent characteristics of device A are also improved.

Off-state breakdown characteristics of InGaP-based high-barrier gate heterostructure field-effect transistors

In this work, the off-state breakdown characteristics of two different types InGaP-based high-barrier gate heterostructure field-effect transistors are studied and demonstrated. These devices have different high-barrier gate structures, e.g. the i-InGaP layer for device A and n +- GaAs/p+ -InGaP/n-GaAs camel-like structure for device B. The wide-gap InGaP layer is used to improve the breakdown characteristics. Experimentally, the studied devices show high off-state breakdown characteristics even at high temperature operation regime. This indicates that the studied devices are suitable for high-power and high-temperature applications. In addition, the off-state breakdown mechanisms are different for device A and B. For device A, off-state breakdown characteristics is only gate dominated at the temperature regime from 30 to 180 ∘C. For device B, off-state breakdown characteristics are gate and channel dominated at 30 ∘C and only gate dominated within 150 to 210 ∘C.

Temperature Dependence of Gate Current and Breakdown Behaviors in an n+-GaAs/p+-InGaP/n--GaAs High-Barrier Gate Field-Effect Transistor

The temperature dependence of gate current and breakdown behavior in an n+-GaAs/p+-InGaP/n--GaAs high-barrier gate field-effect transistor has been studied and demonstrated. Due to the presence of an n+-GaAs/p+-InGaP/n--GaAs high-barrier gate structure, the device shows high-breakdown characteristics. In addition, we found that the off-state breakdown voltage BVDS is dominated by channel and gate breakdowns at T=300 to 420 K, and gate current IG comes mainly from the tunneling mechanism within this temperature range. However, as the temperature is increased above 420 K, the IG is seriously affected by the substrate leakage current and BVDS is only dominated by gate breakdown.