Approximate computing is a new trend applied in many applications such as multimedia processing and pattern recognition, which can tolerate a certain amount of error since they are inherently error-tolerant. In this paper, we use two different methods to modify and improve the accuracy of the previous approximate multipliers. In the first method, we use an error recovery module in the structure of the existing approximate multipliers based on the characteristics of their approximate compressors. In the second method, by considering the accuracy parameters of the previous designs, we combine the previous compressors to improve the efficiency of the existing approximate multipliers. The proposed circuits are simulated using HSPICE with the 7 nm FinFET model. The efficacy of the multipliers in real-life applications such as image processing and neural networks are evaluated using MATLAB. The results show that using the first method increases the accuracy parameters of the previous designs, while it does not lead to considerable power and delay overheads. However, utilizing the second method can improve both the accuracy and hardware characteristics of the previous designs. For example, the PM2 multiplier, using the first proposed method, improves the MED and MRED, as two widely used accuracy metrics, by 36.7% and 21.6%, whereas using this method slightly increases the power-delay product (PDP) by 2.7%. In addition, the PM6 multiplier equipped with the second proposed method improves the MED and MRED values by 26% and 17% and has a 5.2% lower PDP.
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