Hard Time Constraints Research Articles

Learning and backtracking in non-preemptive scheduling of tasks under timing constraints

We propose two novel heuristic search techniques to address the problem of scheduling tasks under hard timing constraints on a single processor architecture. The underlying problem is NP-hard in the strong sense and it is a fundamental challenge in feedback-control theory and automated cybernetics. The proposed techniques are a learning-based approaches and they take much less memory space. A partial feasible schedule is maintained and extended over a repeated problem solving trials, previously assigned priorities are refined according to the gained information about the problem to lead the convergence to a complete feasible schedule if one exists. First, we present the learning in hard-real-time with single learning (LHRTS-SL) algorithm where a single learning function is utilized, then we discuss its drawback and we propose the LHRTS with double learning algorithm in which a second learning function is integrated to cope up with LHRTS-SL drawback. Experimental results show the efficiency of the proposed techniques in terms of success ratio when used to schedule randomly generated problem instances.

Solution of the vehicle routing problem for a cooperative logistics network by using multistage GA

AbstractA GA applied VRP (Vehicle Routing Problem) solving‐method which realizes optimization of a cooperative logistics network is proposed. For this optimization a VRP solving‐method that can obtain a human expert‐level solution, which realizes steady logistics operation, in interactive response time is required. The multistage GA enables one to obtain the accurate solution under both hard and weak time constraints in interactive response time. Moreover, to realize the stable logistics operations, the daily fluctuation of shipping volume is taken into the fitness value of each individual in GA. The experimental result reveals that the proposed method obtains the accurate solution that realizes the stable operation in interactive response time. © 2009 Wiley Periodicals, Inc. Electr Eng Jpn, 168(2): 28–37, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/eej.20855

Fine-grained efficient resource allocation using approximated combinatorial auctions

Combinatorial auctions, one of the most popular market mechanisms, have a huge effect on electronic markets and political strategies. Combinatorial auctions provide suitable mechanisms for efficient allocation of resources to self-interested attendees. On the other hand, efficient resource allocation is also becoming crucial in many computer systems that should manage resources efficiently. Considering ubiquitous computing scenarios, the ability to complete an auction within a fine-grained time period without loss of allocation efficiency is in strong demand. Furthermore, to achieve such scenarios, it is very important to handle a large number of bids in an auction. In general, the optimal winner determination problem of a combinatorial auction is NP-hard. Thus, much work focuses on tackling the computational costs for winner determination. In this paper, we show that our approximation algorithms provide sufficient quality of winners for auctions that have a large number of bids on hard time constraints. Furthermore, we compare and discuss desirable properties of such approximation algorithms to be embedded in application systems.

Modélisation et évaluation des liens ACL Bluetooth en environnement temps-réel communicant

This work includes modelling and performance evaluation of Bluetooth ACL transmission for remote process control with hard time constraints. We present the basic elements of real-time systems in particular RTAI and the Bluetooth wireless personal network. Then, we present the model of Bluetooth Baseband layer with stochastic temporal Petri networks (STPN) especially for error controls. We present the platform implementation of real-time communicating systems based on Bluetooth ACL links to identify the temporal constraints associated with the servo-control loop for the remote mobile robot control. Finally, we synthesize the results from the models and measurements.

Technology Mapping and Cell Merger for Asynchronous Threshold Networks

A key challenge in using timing-robust asynchronous circuit styles is the lack of automated optimization techniques. In this paper, technology mapping and cell merger algorithms for asynchronous threshold networks are introduced. The cell merger problem is a restricted form of technology mapping where only adjacent cells are merged. The two algorithms can each target either delay or area, or a combined delay-area cost function. Experiments were performed on substantial industrial design examples (DES and GCD circuits) that had already been optimized by an existing commercial asynchronous synthesis tool flow. Average delay improvements of 31.6% for basic technology mapping and 29.6% for basic cell merger were obtained. Average area improvements of 9.5% for basic technology mapping and 8.5% for basic cell merger were also obtained. Additional experiments were performed on the largest MCNC combinational benchmarks with similar results. Finally, targeting a hybrid cost function, area minimization under specified hard timing constraints, a further area reduction of up to 10.7% on average in technology mapping was recovered without compromising the overall system performance. The new algorithms are the first systematic and general mapping approach for asynchronous threshold networks, targeting delay or area, which preserve the timing-robustness properties of the initial unoptimized circuits.

Time dependent vehicle routing problem with a multi ant colony system

The Time Dependent Vehicle Routing Problem (TDVRP) consists in optimally routing a fleet of vehicles of fixed capacity when travel times are time dependent, in the sense that the time employed to traverse each given arc, depends on the time of the day the travel starts from its originating node. The optimization method consists in finding solutions that minimize two hierarchical objectives: the number of tours and the total travel time. Optimization of total travel time is a continuous optimization problem that in our approach is solved by discretizing the time space in a suitable number of subspaces. New time dependent local search procedures are also introduced, as well as conditions that guarantee that feasible moves are sought for in constant time. This variant of the classic Vehicle Routing Problem is motivated by the fact that in urban contexts variable traffic conditions play an essential role and can not be ignored in order to perform a realistic optimization. In this paper it is shown that when dealing with time constraints, like hard delivery time windows for customers, the known solutions for the classic case become unfeasible and the degree of unfeasibility increases with the variability of traffic conditions, while if no hard time constraints are present, the classic solutions become suboptimal. Finally an application of the model to a real case is presented. The model is integrated with a robust shortest path algorithm to compute time dependent paths between each customer pairs of the time dependent model.

Schedulability Criteria and Analysis for Dynamic and Flexible Resource Management

The Flexible Resource Manager (FRM) is a dynamic resource management approach that allows a better utilization of the available resources. However, it necessitates an atomic reconfiguration process that must not violate hard timing constraints. This paper exploits the deadline assignment rule of the Total Bandwidth Server (TBS) to schedule reconfiguration, and it formally shows that there exists a minimum task period for which atomicity and schedulability can be guaranteed. With this solution, real-time system engineers have the tools at hand to design their tasks to exploit the benefits of the FRM with hard real-time constraints.11This work was developed in the course of the Collaborative Research Center 614 - Self-Optimizing Concepts and Structures in Mechanical Engineering - Paderborn University, and was published on its behalf and funded by the Deutsche Forschungsgemeinschaft.

Vehicle Routing Problem Solving Method for a Cooperative Logistics Network by Using Multi-Stage GA

A GA applied VRP (Vehicle Routing Problem) solving-method which realizes optimization of a cooperative logistics network is proposed. For this optimization a VRP solving-method that can obtain human expert-level solution, which realizes steady logistics operation, in interactive response time is required. The multi-stage GA enables to obtain the accurate solution under both hard and weak time constraints in interactive response time. Moreover, to realize the stable logistics operation, the daily fluctuation of shipping volume is taken into the fitness value of each individual in GA. The experimental result reveals the proposed method obtains the accurate solution that realizes the stable operation in interactive response time.

Minimizing memory requirement of real-time systems with concurrent garbage collector

Garbage collection is a key feature in modern programming languages like Java™. But it also brings some obstacles to real-time issues. Previous work had been put on solving the real-time problems of the garbage collector. Among it there are concurrent collectors that can provide truly real-time guarantees but they rely on a relatively large amount of redundant system memory. This paper concentrates on minimizing the system memory requirement with a new concurrent garbage collector which is based on a deferrable server together with a particular parameter configuration scheme proposed by this paper. The parameter configuration scheme is addressed using two different approaches, that is, the utilization based analysis and exact analysis of the selection of parameters. In this way, the worst-case response time of a garbage collector is minimized, and so is the worst-case system memory requirement, with the schedulability of tasks with hard time constraint not jeopardized. Furthermore, the simulation results demonstrate that, based on the new algorithm, the actual maximum system memory requirement for a given task set also becomes less than that of any previous concurrent collector.

A least upper bound on the fault tolerance of real-time systems

This paper presents a method to deal with the reexecution of tasks in a hard real-time system subject to temporary faults. The set of tasks follows the Liu and Layland model: they are periodic, independent and preemptible. Time is considered to be slotted. The system is said to be k-schedulable if it is schedulable in spite of the fact that in the interval between its release and its deadline, every task admits that k slots are devoted to uses other than its first execution. In this case, the k slots are used to reexecute tasks subject to temporary faults. Since the value of k can be easily determined, a least upper bound on all the possible combinations of faults that the system can tolerate while meeting the hard time-constraints, follows immediately. The method is bandwidth preserving and the expression of the bound is a diophantic inequality relating k, the execution time and the period of each task. The method is compared to methods proposed by other authors to solve the same problem and it is evaluated through extensive simulations performed on random generated sets of tasks.

Multiple voltage and frequency scheduling for power minimization

The design description for an integrated circuit may be described in terms of three domains, namely: (1) behavioral domain, (2) structural domain and (3) physical domain. These domains may be hierarchically divided into several levels of abstraction. Classically, these level of abstraction are (1) Architectural or Functional level, (2) Register-transfer level, (3) Logic level and (4) Circuit level. Some of the design problems associated with VLSI circuit design are area, speed, reliability and power consumption. With the development of portable devices, power consumption has become a dominant design consideration in the modern VLSI design area. In each of these domains there are a number of design challenges to reduce power. For instance, at the behavioral level, the freedom to choose multiple voltages and frequencies to minimize power to meet the given hard time constraints is considered as an active field of research to minimize power. Various past researches have showed that higher the level of abstraction, better the ability to address the problems associated with the design. Therefore this work proposes an algorithm that allocates both voltage and frequency simultaneously to the operations of the directed flow graph to optimize power given the time constraints. The resources required for multiple voltage-frequency scheduling is derived using the classical force directed scheduling algorithm. This algorithm has been implemented and tested on High-Level synthesis benchmarks for both non-pipelined and pipeline instances.

Embedded software engineering: The state of the practice

Technologies for the development of embedded systems should address specific constraints such as hard timing constraints, limited memory and power use, predefined hardware platform technology, and hardware costs. Existing development technologies don't address their specific impact on, or necessary customization for, the embedded domain. Nor do these technologies give developers any indication of how to apply them to specific areas in this domain, for example, automotive systems, telecommunications, or consumer electronics. Consequently, tailoring a technology for a specific use is difficult. Furthermore, the embedded domain is driven by reliability factors, cost factors, and time to market. So, this embedded domain needs specifically targeted development technologies. An inventory of eight European companies reveals what tools developers of embedded-systems software are and aren't using, and why. The need exists for more specific, yet flexible, tools.

General approach and tool for the scheduling of complex production systems

The aim of this paper is to present a flexible modelling framework implemented into a basic general scheduling tool for both, the study of scheduling problems (for application developers and analysts) and as an efficient way to find practical solutions in complex industrial applications (for users). Thus, the basis to assist process modelling (simulation and simple optimisation procedures) is provided as well as an open framework capable to be easily customised (implementation of particular constraints, rules, exceptions, etc.). This approach and tool have been especially addressed to complex manufacturing systems (batch chemical processes, pharmaceutical, fine chemicals, etc.). Thus, the kind of recipes considered require a detailed description of tasks and subtasks and of the hard time and storage constraints implicated (simultaneous activities, unstable intermediates, product synthesis and other concurrent processes…). Towards this end, this work presents a general and practical description of production processes and recipes, as well as the mathematical model for the timing of the activities involved. Yet, the compact description attained does not introduce extra complexity to simpler cases. The approach introduced is based in a hierarchical description of the production processes and activities in which schedules are described by means of sequences of production runs associated to structured sets of assigned activities. This work shows how this sequences may be rearranged using general techniques as simulated annealing (SA), proving that this can be successful when specific rules are not available. Finally, different case studies are analysed to show the potential and flexibility of the approach presented.

An embedded CDMA-receiver A design example

This paper describes the design of the receiver part of a communication system providing ad-hoc, random-access data-communication links. To enable such links we choose to apply an innovative CDMA-communication technique based on two different spread spectrum schemes: direct-sequence and frequency-hopping. In this way we evade the interference problems usually existing in non-cellular systems. The main receiver tasks are removing the “spreading” from the incoming signal, acquiring synchronization of the receiver to the incoming signal and recovering the data message. The operation of such a receiver can easily be caught in an algorithmic description, a software implementation would therefore be advantageous for cost and flexibility reasons. However, it is not yet possible to meet the hard timing constraints existing in the system with a software-only realization. Some time critical parts of the receiver will have to be implemented in hardware evolving to a so-called embedded system. The key advantage of embedded system design is that the hardware and software parts are designed concurrently enabling an almost seamless cooperation between the parts. To efficiently explore the large design space of possible hardware/software partitionings an automatic HW/SW partitioner is required. Such a partitioner should handle imprecise cost data available at that stage to reduce the risk of getting outside the specification. Yet by manipulation of the input data and by locking certain intermediate results the designer can control the partitioning process.

An optimal algorithm for scheduling soft aperiodic tasks in dynamic-priority preemptive systems

The paper addresses the problem of jointly scheduling tasks with both hard and soft real time constraints. We present a new analysis applicable to systems scheduled using a priority preemptive dispatcher, with priorities assigned dynamically according to the EDF policy. Further, we present a new efficient online algorithm (the acceptor algorithm) for servicing aperiodic work load. The acceptor transforms a soft aperiodic task into a hard one by assigning a deadline. Once transformed, aperiodic tasks are handled in exactly the same way as periodic tasks with hard deadlines. The proposed algorithm is shown to be optimal in terms of providing the shortest aperiodic response time among fixed and dynamic priority schedulers. It always guarantees the proper execution of periodic hard tasks. The approach is composed of two parts: an offline analysis and a run time scheduler. The offline algorithm runs in pseudopolynomial time O(mn), where n is the number of hard periodic tasks and m is the hyperperiod/min deadline.

Application of MIDAS Approach to the Design of Real-Time Systems

This paper presents an integrated approach called MIDAS that allows timing characteristics of a real-time system to be determined through all stages of its development, from initial design to system deployment. The paper suggests the use of Partially Implemented Performance Specifications (PIPS) as the design paradigm for real-time systems. A PIPS model is a partially implemented system where some system components exist as simulation models and others as operational subsystems. Given its functional and timing specifications, a proposed real-time system is represented as a PIPS model which is iteratively refined into an operational system. During each stage of model refinement, the PIPS model may be executed in an appropriate operating environment to evaluate soft timing constraints and/or be verified for the satisfaction of hard timing constraints. The paper describes the language and proof theory that support the use of PIPS to design real-time systems. It also illustrates the use of MIDAS approach in designing various real-time systems.

Processing aggregate relational queries with hard time constraints

We consider those database environments in which queries have strict timing constraints, and develop a time-constrained query evaluation methodology. For aggregate relational algebra queries, we describe a time constrained query evaluation algorithm. The algorithm, which is implemented in our prototype DBMS, iteratively samples from input relations, and evaluates the associated estimators developed in our previous work, until a stopping criterion (e.g., a time quota or a desired error range) is satisfied. To determine sample sizes at each stage of the iteration (so that the time quota will not be overspent) we need to have (a) accurate sample selectivity estimations of the RA operators in the query, (b) precise time cost formulas, and (c) good time-control strategies. To estimate the sample selectivities of RA operators, we use a runtime sample selectivity estimation and improvement approach which is flexible. For query time estimations, we use time-cost formulas which are adaptive and precise. To use the time quota efficiently, we propose statistical and heuristic time-control strategies to control the risk of overspending the time quota. Preliminary evaluation of the implemented prototype is also presented.