Hard-switching Inverter Research Articles

An Efficient Three-Phase Zero-Voltage Switching Passive Resonant Pole Inverter

The brief puts forward a three-phase passive resonant pole inverter with the aim of improving the efficiency by the lower switching loss. The concrete implementation method is that three sets of identical auxiliary circuits, composed of passive devices, are connected respectively in parallel with each bridge arm in order that main switches can implement the function of zero-voltage switching to diminish switching loss by the resonance among passive devices. The higher efficiency can be achieved on condition that the added loss of auxiliary circuits is lower than the diminished switching loss compared with the hard-switching inverter. The brief represents various working state within a switching cycle. The main experimental results are as follows: main switches implement the function of zero-voltage switching in a wide load range and the efficiency value of the presented inverter is equal to 98.5% under the rated condition which is at least 0.5% more than that in other three comparison objects. Thus, the presented inverter has superiority in efficiency over other similar soft-switching inverters.

An Efficient Auxiliary Resonant Commutated Pole Inverter With Components Withstanding Low Voltage and Current

An efficient auxiliary resonant commutated pole inverter (ARCPI) is presented with the aim of enhancing the efficiency by the decrease of switching loss. The brief design method is that three sets of identical auxiliary circuits are arranged respectively on each bridge arm in order that switches can achieve soft-switching to reduce switching loss by the resonance among auxiliary devices. When the auxiliary circuit of each phase is involved in commutation process, the higher efficiency will be achieved on condition that the added loss of auxiliary circuits is lower than the reduced switching loss compared with the hard-switching inverter. The brief discusses every working state during a switching cycle. The main experimental results are as follows: Switches achieve soft-switching in a wide load range and the efficiency value of the novel ARCPI reaches 98.1% under the rated condition which is at least 0.3% more than that in other four comparison objects. Consequently, the presented inverter takes an advantage in efficiency over other similar soft-switching inverters.

Topology and control strategy optimization of an auxiliary resonant commutated pole-based, soft-switching grid-connected inverter

With the development of new energy industries such as photovoltaics, microgrids, or distributed energy sources require many DC-AC grid-connected interfaces. Reducing the switching loss of the inverter is important to improve the transmission efficiency of the inverter, reduce the heat generation of the inverter, promote the high frequency and miniaturization of the inverter, and efficiently use the distributed energy. Therefore, considering the wide application of DC-AC power electronic interfaces in microgrid and distributed energy, and to make up for existing deficiencies in traditional hard-switching inverters, an optimal control strategy and topology for an optimal-auxiliary resonant commutated pole (O-ARCP) inverter is proposed in this article. Firstly, this paper introduces the proposed inverter topology and analyzes the operation mode of the circuit with the control strategy. Then simulation experiments in islanding mode are carried out to verify the rationality of the content, and finally simplified experimental verification is carried out based on the simulation results. Simulation and experimental testing reveal that all switches of the proposed topology are in soft-switching mode, which proves the effectiveness of the proposed control strategy and analysis. The analysis and validation of this paper provide assistance in the development of control strategies and structures for soft-switching inverters.

An Efficient Resonant Pole Inverter With Reliable Elimination of Switching Loss of Main Switches

The brief presents a novel resonant pole inverter for the efficient operation of the inverter. Its design process can be summarized briefly as follows: three sets of identical auxiliary circuits are respectively connected in parallel with each bridge arm of the three-phase hard-switching inverter and each set of auxiliary circuits only contains two auxiliary switches, two resonant capacitors and one resonant inductor; when the auxiliary circuits work, the current will flow through the antiparallel freewheeling diode of main switches periodically before main switches are switched on or off. Thus, the outstanding advantage of the novel inverter is that main switches can acquire zero-voltage switching-on and zero-current switching-off, making for more reliable elimination of switching loss. The brief elaborates each working state in a switching cycle. Experimental waveforms imply that switches can attain soft-switching. Moreover, the efficiency of the novel inverter achieves 99.1% at rated output power and the value marks an increase of 0.5 percentage points at the same rated output power, compared with the most recent topology in another literature. Thus, the novel inverter can have efficiency superiority over other soft-switching inverters when it is applied as the variable frequency power supply in the electric drive system.

An Efficient Resonant Pole Inverter With the Synchronous Switch Mode Control

A novel resonant pole inverter is proposed for the sake of the efficient operation of the three-phase inverter. When the auxiliary unit works, the main switches can accomplish zero-current turn-on and zero-voltage turn-off. Meanwhile, the auxiliary switches can accomplish zero-current turn-on and zero-current turn-off. In particular, the main switches and the auxiliary switches can accomplish the synchronous switching in each switching cycle, which can simplify the control method of the inverter. This brief discusses the operating stages of the inverter in one switching cycle and selection rules of parameters. The experiment confirms that the switching devices accomplish soft-switching. The efficiency at rated output power 3kW reaches 98.3%, which implies the efficiency advantage over the hard-switching inverter. It can be concluded that the presented inverter in this brief has important reference to the research of the high-performance inverter.

Factors and Considerations for Modeling Loss of a GaN-based Inverter

The article investigates the impacts of four often-neglected factors on the loss model of a GaN-based full-bridge inverter: parasitic capacitance of the devices, dynamics of junction temperature ( Tj ) under time-varying power dissipation ( P loss), case temperature estimation, and detailed considerations of the passive components. Procedures to calculate the converter loss considering the above factors are proposed and implemented. A 4.5-kW hard-switching inverter prototype using gallium nitrite (GaN) high-electron-mobility transistors is used to experimentally demonstrate the impact of each factor on the converter loss model. It is found that the accuracy of a converter loss model is mainly affected by the passive components at the light load condition, whereas the thermal and loss models of the active components become the major factors as the output power increases. The results show that after considering the above factors, the converter loss discrepancy between calculation and measurement can be reduced from 30.6 W (28%) to 2.5 W (less than 3%) at heavy load ( Po = 4.5 kW), while at the light load condition ( Po = 500 W), it is reduced from 3.9 W (28%) to 2.6 W (16%). Furthermore, the difference between simulated and measured case temperature of the GaN devices is within 6 °C.

The novel resonant DC link three-level soft-switching inverter

ABSTRACTIn the paper, the novel topology of the resonant DC link three-level soft-switching inverter is proposed to reduce switching losses and improve the efficiency of three-level inverter at high switching frequency. Symmetrical auxiliary resonant circuits are set in the DC link of three-level hard-switching inverter. Moreover, the terminal voltage of the resonant capacitors between the DC buses periodically drops to zero via the resonance of auxiliary circuits. Furthermore, under such condition, the main switches of the three-level inverter would be operated, in order to achieve zero-voltage switching. Based on the equivalent circuits in different operating modes, the paper analyses the working process of the soft-switching inverter in detail. In addition, a 3 kW laboratory prototype of resonant DC link three-phase three-level soft-switching inverter is built. The experimental results show that the main switches and auxiliary switches of the inverter are operated under soft-switching conditions, and the efficiency is significantly improved compared with the three-level hard-switching inverter. Therefore, the proposed topology can effectively reduce switching losses and prove to be more practical in engineering.

A Voltage-Edge-Rate-Limiting Soft-Switching Inverter Based on Auxiliary Resonant Pole

To increase switching frequencies while limiting switching losses in voltage-source inverters, power switches have been made significantly faster with achievable switching times now less than 100 ns. However, faster switches generate larger inverter output voltage edge rates ( ${dv/dt} $ ) and result in deleterious effects in variable-speed drive systems including transient overvoltages at motor terminals, electromagnetic interference, and bearing failures due to microarcs. A common approach for limiting peak ${dv/dt} $ involves using a ${dv/dt} $ filter. However, the ${dv/dt} $ filter introduces extra power losses and increases the overall size and weight of the system. Soft-switching circuits, which were originally developed to reduce switching losses, can help reduce ${dv/dt} $ , but using soft-switching to accurately control ${dv/dt} $ has not been fully explored. In this paper, a new soft-switching circuit, entitled the auxiliary resonant soft-edge pole (ARSEP), is set forth. ARSEP improves the available soft-switching circuits so that ${dv/dt} $ can be accurately controlled through the circuit parameter design. An ARSEP inverter prototype was designed, simulated, and constructed to verify its performance and benefits. Compared to a conventional hard-switched inverter with a ${dv/dt} $ filter, the ARSEP inverter prototype results in a significant reduction in overall power loss, inductor volume, and weight.

20-kW Zero-Voltage-Switching SiC-mosfet Grid Inverter With 300 kHz Switching Frequency

Although SiC- mosfet has significant advantages on switching performance over traditional Si-IGBT, the switching loss of SiC- mosfet devices at hard switching rises quickly with the increment in the switching frequency. This has narrowed down further possibilities of improving efficiency and power density of the grid inverter. Zero-voltage-switching (ZVS) space-vector-modulation (SVM) technique is introduced to further push the power density of SiC- mosfet inverter. This paper focuses on the impact of applying the ZVS-SVM to three-phase two-level SiC- mosfet inverter. With the same efficiency requirement the ZVS-SVM SiC inverter can operate at a much higher switching frequency, which gives the opportunity to further reduce the size of passive components. The loss distributions, conversion efficiencies, and volumes of passive components of both a 20-kW SiC- mosfet hard-switching inverter and a 20-kW SiC- mosfet ZVS-SVM inverter have been compared under switching-frequency range from 50 to 300 kHz. Meanwhile, a new metric called “efficiency stiffness” is proposed to compare different inverters with respect to the efficiency performance against switching-frequency characteristics. In addition, high voltage overshoot of SiC- mosfet and high thermal stress of resonant inductor are the two critical issues in the SiC- mosfet ZVS-SVM inverter with high switching frequency. A power module including seven SiC- mosfet bare dies with low stray inductance is designed for ZVS-SVM inverter instead of the existing seven discrete TO-247 package SiC- mosfet s to reduce the voltage overshoots on the switches. Besides, to reduce the power loss of the resonant inductor caused by large amplitude of current at hundreds of kHz excitation frequency, design of the inductor with distributed air gap and optimal winding thickness are studied. A 20-kW SiC- mosfet ZVS-SVM grid inverter prototype is built to verify the proposed design.

Resonant DC link soft-switching inverter with low-loss auxiliary circuit

ABSTRACTAn auxiliary switching device is usually set on the DC bus of the resonant DC link inverter, which restricts the efficiency of the inverter and is also one of the reasons for its not extensive application and promotion in the high-power field. To solve the problem, auxiliary circuits and DC bus of the resonant DC link soft-switching inverter designed in this paper are connected in parallel, and auxiliary switching devices and resonant elements are not connected in series on the DC bus, which help to improve the efficiency and reduce the power losses of the auxiliary resonant circuits. Based on the equivalent circuits in different operating modes, the paper analyzes the working process of the soft-switching inverter, soft-switching realization conditions and design rules. A 10 kW laboratory prototype is built, and through the comparison of the experimental results from it and the hard-switching inverter, it is shown that the efficiency improvement value of the designed inverter at full load is higher than that at light load. Therefore, the soft-switching inverter designed in this paper is conductive to reducing the power losses of the auxiliary resonant circuits and ensuring the efficient use of the electric energy.

Comparative Experimental Evaluation of Zero-Voltage-Switching Si Inverters and Hard-Switching Si and SiC Inverters

Several efforts have been put in the reduction of the power losses of dc–ac converters by investigating soft-switching topologies, which have been reported to boost efficiencies of silicon inverters up to 99%. However, the auxiliary circuits of the switches significantly impact on the circuit complexity. Conversely, the use of wide bandgap devices offers an alternative for the reduction of the losses, while keeping the simple structure of a traditional inverter. This paper aims to experimentally evaluate the performance of four prototypes in terms of efficiency and costs. Two zero-voltage switching inverters, differing only in the power switches, and two comparable hard-switching inverters, mounting both silicon and silicon carbide devices, have been built and compared. Overall, the soft-switching inverters allow improving the efficiency at high output current in comparison with hard-switching Si inverters, but their efficiency is comparable to that of silicon carbide (SiC) inverters or even lower at low output currents. The economic analysis has shown that the cost of the power stage of the soft-switching inverters and the hard-switching SiC inverter is about 2.5 and 1.5 times that of the hard-switching inverter based on Si insulated gate bipolar transistors, respectively.

Efficient solution of the DC-link hard switching inverter of the PV system

Soft switching inverter alleviate and treat the negative impacts resulted from hard switching inverter. It provides many advantages such as low power losses, high efficiency, stress reduction during switching instants, and high reliability and lowering EMI generation. Soft switching is achieved in this paper by adding the LC resonant circuit to the voltage source inverters (VSI). This is the first time to achieve soft switching with the photovoltaic (PV) system. To demonstrate the effectiveness of this technique, the simulation of the PV system is using both switching techniques; the resonant dc-link soft switching inverter and the conventional hard switching inverter; is introduced, analyzed and compared. The total resonant dc-link soft switching losses are reduced dramatically to the half of the total hard switching losses in case of not using soft switching. To validate our work, the detailed comparisons between the proposed topology with another famous one is introduced, analyzed and evaluated. In addition, the resonant dc-link soft switching losses and the hard switching losses of the inverter are estimated. The total resonant dc-link soft switching losses and the total hard switching losses are calculated under similar operating conditions and the conduction losses are kept constant in both switching modes. The simulation results prove the superiority performance of the PV system based on the proposed resonant dc-link soft switching mode compared to the other ones based on the conventional hard switching mode and single transistor resonant dc-link soft switching inverter.

Design and implementation of single‐phase inverter without transformer for PV applications

For safety purposes, many photovoltaic (PV) systems are designed using galvanic isolation and transformers. The main problem in the existing topologies is that transformers are expensive, heavy and large. Another problem is that at conversion stage, the overall frequency is reduced. The efficiency of a PV inverter which is equipped with a transformer is usually between 91 and 94%. To tackle this issue, a transformerless (TL) PV system is proposed which has high efficiency and is lighter and cheaper. Due to stray capacitance, harmful leakage current will flow to the grid and PV array. H5, HERIC, H6 and oH5 are different types of existing TL inverter, and may be used to solve this problem. Each configuration has its drawbacks like shoot-through issues of switches, high conduction losses, metal-oxide-semiconductor field-effect transistor reverse recovery issues, or to avoid shoot-through fault when dead time requirements and grid voltage are nearly zero. The efficiency of the proposed TL inverter presented in this study is compared with other existing configurations. It shows that the proposed inverter efficiency is better than the conventional hard switching inverters. Moreover, to increase reliability, the inverters do not contain any shoot-through issues.

High-Frequency EMI Attenuation at Source With the Auxiliary Commutated Pole Inverter

Fast-switching power converters are a key enabling technology for the more electric aircraft (MEA), but the generated electromagnetic interference (EMI) poses significant challenges to the electrification effort. To meet the stringent aerospace EMI standards, passive filters are commonly employed, despite the weight and size constraints imposed by the MEA. Alternatively, the EMI source, i.e., the high $dv\text{/} dt$ and $di\text{/} dt$ slew rates, can be addressed through waveform-shaping techniques. For example, while most soft-switching converters can reduce switching loss, they do so by switching the semiconductor devices in a slower and smoother manner, resulting in the attenuation of high-frequency harmonics. This paper examines the auxiliary commutated pole inverter (ACPI) topology, and its first contribution is the attenuation of the high-frequency content of its EMI source, that is, the output voltage, in a predictable manner, through the active control of the resonant circuit. This is achieved by first, discussing the time-domain characteristics of trapezoidal and S-shaped pulse-trains that lead to attenuated high-frequency harmonic content, and second, by analyzing the equivalent LC circuit of the ACPI. The design of the inverter is then focused on the active control of the resonant parameters, for a predetermined and enhanced output voltage high-frequency response. The second contribution of this paper is the comparison of the EMI performance of hard switching and of three soft-switching modes, fixed-timing control, variable-timing control, and capacitive turn- off s, and how this informs important metrics such as power efficiency, current stress, and implementation complexity. Finally, the third contribution is on the trade-offs that arise when the primary design goal is enhanced EMI performance as opposed to switching loss reduction. A 5-kW, 3-phase ACPI prototype is used for validating the high-frequency content attenuation at source. It is shown that the ACPI can achieve a 37 dB harmonic attenuation of its output voltage at 4 MHz, compared to a hard-switched inverter.

Analysis and Compensation of Dead-Time Effect of a ZVT PWM Inverter Considering the Rise- and Fall-Times

The dead-time effect, as an intrinsic problem of the converters based on the half-bridge unit, leads to distortions in the converter output. Although several dead-time effect compensation or elimination methods have been proposed, they cannot fully remove the dead-time effect of blanking delay error, because the output current polarity is difficult detect accurately. This paper utilizes the zero-voltage-switching (ZVT) technique to eliminate the blanking delay error, which is the main drawback of the hard-switching inverter, although the technique initially aims to improve the efficiency. A typical ZVT inverter—the auxiliary resonant snubber inverter (ARSI) is analyzed. The blanking delay error is completely eliminated in the ARSI. Another error source caused by the finite rise- and fall-times of the voltage is analyzed, which was not considered in the hard-switching inverter. A compensation method based on the voltage error estimation is proposed to compensate the rise- and fall-error. A prototype was developed to verify the effectiveness of the proposed control. Both the simulation and experimental results demonstrate that the qualities of the output current and voltage in the ARSI are better than that in the hard-switching inverter due to the elimination of the blanking delay error. The total harmonic distortion (THD) of the output is further reduced by using the proposed compensation method in the ARSI.

Modelling and control of a novel zero‐current‐switching inverter with sinusoidal current output

This study presents a novel topology of charge-transferring zero-current-switching (CT-ZCS) inverter to improve the efficiency. Its operating principle, optimal zero-current-switching (ZCS) frequency and design guidelines are elucidated in detail. A reduced-order modelling method of time-charge discretisation, which treats a set of two separate ZCS as one combined switch cell, is put forward and the topology can be simplified to dual-buck half-bridge inverter (DBHBI) topology. Since the DBHBI-derived CT-ZCS inverter permits higher comparison frequency of hysteresis control than traditional hard-switching inverters, the three-level relay control with high-frequency pulse modulation is recommended. Compared with two-level and three-level hysteresis control, the proposed control can achieve effective output harmonic reduction, decreasing from 2.335 to 1.66%, and minimise the size of inverter under the same output condition. In addition, a current controller is designed to optimise the system and enhance its anti-disturbance performance. Finally, the experiment on a 35-V 2-A prototype verifies the validity of the proposed method.

A High-Precision Control for a ZVT PWM Soft-Switching Inverter to Eliminate the Dead-Time Effect

Attributing to the advantages of high efficiency, low electromagnetic interference (EMI) noise and closest to the pulse-width-modulation (PWM) converter counterpart, zero-voltage-transition (ZVT) PWM soft-switching inverters are very suitable for high-performance applications. However, the conventional control algorithms intended for high efficiency generally results in voltage distortion. Thus, this paper, for the first time, proposes a high-precision control method to eliminate the dead-time effect through controlling the auxiliary current in the auxiliary resonant snubber inverter (ARSI), which is a typical ZVT PWM inverter. The dead-time effect of ARSI is analyzed, which is distinguished from hard-switching inverters. The proposed high-precision control is introduced based on the investigation of dead-time effect. A prototype was developed to verify the effectiveness of the proposed control. The experimental results shows that the total harmonic distortion (THD) of the output current of the ARSI can be reduced compared with that of the hard-switching inverter, because the blanking delay error is eliminated. The quality of the output current and voltage can be further improved by utilizing the proposed control method.

Post Disaster Illumination for Underground Mines

Lighting systems provide mine workers improved visibility and contribute to improved safety, productivity, and morale. Lighting is critical to miners, since they depend heavily on visual cues to spot fall of ground, pinning & striking and slipping & tripping hazards. Most conventional systems of lighting are used in mines are extracting a lots of power and deal with major maintenance problems. Apart from the conventional grid-power lighting systems, additional emergency lighting system using green energy is mandatory in case of grid-power failure or in disaster situation of the underground mines. The luminous efficacy increases with switching frequency while providing eye comfort to user. Even though CFL has low power consumption for solar photovoltaic (SPV) power system, but CFL’s electrical requirements are not easily met by hard-switched inverters due to their higher switching losses at higher frequencies and preheat and ignition voltage of CFL results lower efficiency. This paper demands well suited high frequency inverter and a series interrupting type charge controller for illumination at remote areas. DOI: http://dx.doi.org/10.11591/telkomnika.v13i3.7069

Reducing Switching Losses in BLDC Motor Drives by Reducing Body Diode Conduction of MOSFETs

This paper presents a new power electronic topology that aims to reduce switching losses in hard-switched inverters for brushless dc (BLDC) motor drives. This is achieved by extending the benefits of synchronous rectification used in low-voltage switch-mode dc-dc conversion to high-voltage motor drive applications and by minimizing the reverse conduction behavior of the intrinsic body diode of the synchronous rectifier MOSFET. The proposed topology for reducing body diode conduction includes the addition of a MOSFET in series with the rectifying switch and a SiC Schottky diode around the series switch combination. This paper focuses on theory, simulations, and experimental results and validates the benefits of proposed new topology for BLDC motor drive applications. An extension of this topology for sinusoidal back electromotive force permanent-magnet motors is also presented.

Analysis, design and performance of a soft‐switching single‐phase inverter

A soft-switching pulse-width modulation (PWM) single-phase inverter using a voltage clamp soft-switching step-up/down dc link is proposed in this study. The proposed voltage clamp soft-switching step-up/down DC link not only provides the switches in the section of conventional PWM buck inverter operate at zero-voltage-switching (ZVS), but it has a step-up/down input voltage function and the switches in itself also operate at ZVS. Thus, except for the switch in the section of ZVS-PWM auxiliary circuit, all power semiconductor devices in proposed inverter operate at ZVS turn-on and turn-off. The switch in the section of ZVS-PWM auxiliary circuit operates at zero-current-switching (ZCS) turn-on and turn-off. Besides operating at constant frequency, the proposed inverter has no voltage stress and current stress on the main switch compared to the hard switching inverter counterpart. Auxiliary components rated at very small current are used. The principle of operation, theoretical analysis and experimental results of the proposed soft-switching inverter, rated 1 kW and operated at 40 kHz, are provided in this study to verify the performance.