Hard Real-time Systems Research Articles

Modeling, analysis and verification of real-time resource access control protocols: a formal approach

An important characteristic of real-time systems is to produce the expected results within the predefined time period. Efficient scheduling of multiple tasks and utilization of shared resources among these tasks for hard real-time systems is an important area of research. Due to the growing complexities and requirements of the present time, it is not easy to model such systems. Unified Modeling Language (UML) is a graphical modeling tool which is a very popular industry-standard visual language used for system design. However, due to the semi-formal representation, UML has its own shortcomings and cannot be called a complete modeling language for real-time systems. It lacks simulation and verification capabilities. Considering those drawbacks this research work formally analyzes two real-time resource access control protocols using CFG/BNF notation. Further, the formal notations are confirmed by ANother Tool for Language Recognition.

Towards optimal solutions for the low power hard real-time task allocation on multiple heterogeneous processors

The usage of heterogeneous multicore platforms is appealing for applications, e.g. hard real-time systems, due to the potential reduced energy consumption offered by such platforms. However, even in such platforms the power wall phenomena still imposes limits to performance. Hard real-time systems are part of life critical environments and reducing the energy consumption on such systems is an onerous and complex process. We tackle the problem from the perspective of different representative integer programming mathematical formulations and their interplay on the search for optimal solutions for Rate Monotonic (RM) and Earliest Deadline First (EDF) scheduling algorithms. The proposed models are based on a well-established formulation in the operational research literature, namely, the Multilevel Generalized Assignment Problem (MGAP). This paper, therefore, assesses the problem of finding optimal allocations and frequency assignments of hard real-time tasks among heterogeneous processors targeting low power consumption, but taking into account timing constraints. Computational experiments show that finding optimal solutions reduces the estimated energy consumption of the evaluated cases when compared to state-of-the-art algorithms. • Representative theoretical models of several hard real-time scheduling policies. • New application of well-known classical combinatorial optimization problem: MGAP. • Applicability on embedded systems with low power and hard real-time requirements. • Optimal workload partitioning on heterogeneous processors in project time. • Computational experiments on finding optimal solutions for the proposed models.

Enhanced EDCA with Deterministic Transmission Collision Resolution for Real-Time Communication in Vehicular Ad Hoc Networks

The collision prevention system is one of most important research issues on vehicle safety technology. Sending worming messages within the right time and reliable transmission will get prevention of a possible vehicle accident. The communication standards of vehicular networks (VANET) are unable to guarantee the delivery of critical messages within tight deadlines. Indeed, the transmission collisions are handled with probabilistic manner that can reduce the transmission latency; however, it is inept to predict an upper bound value of this delay to verify the deadline. In this paper, we propose a medium access protocol that ensures the delivery of critical messages within a deadline. It is a hard real-time system with delay constant guarantee. We are focusing on improving the EDCA medium access protocol to prioritize critical messages and to get access to the transmission channel within a predictable communication delay. We create a new enhanced access protocol that is compatible with the IEEE 802.11p VANET standards and adapted to real-time communication requirements related to the vehicle collision avoidance problem.

Multi-criteria resource allocation in modal hard real-time systems

In this paper, a novel resource allocation approach dedicated to hard real-time systems with distinctive operational modes is proposed. The aim of this approach is to reduce the energy dissipation of the computing cores by either powering them off or switching them into energy-saving states while still guaranteeing to meet all timing constraints. The approach is illustrated with two industrial applications, an engine control management and an engine control unit. Moreover, the amount of data to be migrated during the mode change is minimised. Since the number of processing cores and their energy dissipation are often negatively correlated with the amount of data to be migrated during the mode change, there is some trade-off between these values, which is also analysed in this paper.

An efficient approach for the multiprocessor non-preemptive strictly periodic task scheduling problem

Abstract Strict periodicity constraint is of great importance since it concerns some hard real-time systems where missing deadlines leads to catastrophic situations. However, the problem of schedulability analysis for non-preemptive strictly periodic tasks on a multiprocessor platform is even more intractable than the one with the common periodicity. In order to implement such systems, designers need effective tools based on fast and near-optimal solutions. This paper presents a schedulability analysis which results mainly in a, two versions, task assignment and start-time calculation algorithm. The first one targets the harmonic task periods case while the second one targets the non-harmonic task periods case. Each version is based on a sufficient uniprocessor schedulability test. In addition, for the non-harmonic case which is the most intractable, the uniprocessor sufficient schedulability test uses the strictly periodic task utilization factor. This factor stands for the fraction of time spent to execute a task while its strict periodicity and the ones of the already scheduled tasks are met. As a result, an efficient and easily implementable scheduling algorithm is proposed which begins by assigning tasks to processors then attributes a start-time to every task in such a way that strict periodicity and deadline constraints are met. The effectiveness of the proposed scheduling algorithm, in both versions, has been shown by a performance evaluation and comparisons with an optimal and a similar suboptimal solution.

Dynamic and Static Task Allocation for Hard Real-Time Video Stream Decoding on NoCs

Hard real-time (HRT) video systems require admission control decisions that rely on two factors. Firstly, schedulability analysis of the data-dependent, communicating tasks within the application need to be carried out in order to guarantee timing and predictability. Secondly, the allocation of the tasks to multi-core processing elements would generate different results in the schedulability analysis. Due to the conservative nature of the state-of-the-art schedulability analysis of tasks and message flows, and the unpredictability in the application, the system resources are often under-utilised. In this paper we propose two blocking-aware dynamic task allocation techniques that exploit application and platform characteristics, in order to increase the number of simultaneous, fully schedulable, video streams handled by the system. A novel, worst-case response time aware, search-based, static hard real-time task mapper is introduced to act as an upper-baseline to the proposed techniques. Further evaluations are carried out against existing heuristic-based dynamic mappers. Improvements to the admission rates and the system utilisation under a range of different workloads and platform sizes are explored.

Time Triggered Hybrid Scheduler with Dynamic Frequency Scaling for Distributed Real Time Embedded Systems

In this paper, the time triggered hybrid scheduler (TTH) is implemented in the distributed real time embedded systems along with the operation of dynamic frequency scaling (DFS) since it overcomes the problem of time triggered cooperative scheduler (TTC) for distributed systems and also the decreases the power consumption. This scheduler is implemented along with the token ring network protocol for the communication scheduling. In hard real time systems, ideally, no deadline may ever be missed and hence the co-operative and pre-emptive are combined in this paper to achieve optimum efficiency. DFS is used to provide robustness to the network and also reduces the power utilization. This TTH scheduler is more advantageous than TTC scheduler in distributed system, since long task problem can be overcome by means of this algorithm. The model is simulated using the TORSCHE toolbox of the MATLAB. Some of the applications of this scheduling are data acquisition and sampling in wireless sensor networks, control system engineering, patient monitoring using wireless sensor networking and so on.

Integration of Symbolic Execution into a Formal Abstract State Machines based Language

Hard real-time systems are embedded systems with a strong emphasis on the guaranty of safety-critical properties. In order to provide the necessary confidence level, with regard to the respect of functional and non-functional properties, a system analysis that accounts for all possible execution paths must be performed. Symbolic execution has been successfully used to explore and analyze reachable system states. In this paper, we formally define a symbolic execution semantics for an abstract state machine based model. The unification of the update semantics redefined in terms of symbolic moves, enable us to achieve reacher methods for path condition resolution and ultimately better scalability of the execution. The goal of this paper is to provide a formal ground for the integration of symbolic execution in existing timing analysis frameworks based on abstract state machines that will facilitate the computability of the analysis tools.

Energy-aware sporadic tasks scheduling with shared resources in hard real-time systems

We address the problem of minimizing overall energy consumption for sporadic tasks with shared resources in a real time system. Previous algorithms use the static speed to deal with this problem. However, we have proposed a novel scheduling algorithm, called DSSTS, for the sporadic tasks with shared resources. The DSSTS algorithm schedules the task at the dynamic low speed and the task switches to the high speed when it is blocked by another lower priority task. It assumes that each task is executed with its worst case execution time. For energy efficiency, we have proposed a dynamic reclaiming dynamic speed sporadic tasks scheduling algorithm, called DRDSSTS. The DRDSSTS algorithm is an extension of the DSSTS algorithm. It can reclaim the dynamic slack time generated from the early completion task to adjust to the processor speed. Moreover, it can use the DPM technique to put the processor into a dormant mode to save energy when the processor is in an idle mode. The experimental results show that the DRDSSTS algorithm can reduce the energy consumption up to 2.64%–37.16% over the DSSTS algorithm and it consumes 35.16%–71.15% less energy than that of the DS algorithm.

Reliability-aware scheduling for reducing system-wide energy consumption for weakly hard real-time systems

Abstract While energy consumption is the primary concern for the design of real-time embedded systems, reliability and Quality of Service (QoS) are becoming increasingly important in the development of today’s pervasive computing systems. In this paper, we present a reliability-aware energy management (RAEM) scheme for reducing the energy consumption for weakly hard real-time systems with (m, k)-constraints, which requires that at least m out of any k consecutive jobs of a task meet their deadlines. In order to ensure the (m, k)-constraints while preserving the system reliability, we propose to partition the real-time jobs into mandatory and optional ones as well as to reserve recovery space for mandatory ones in an adaptive way. Moreover, efficient on-line scheduling techniques are proposed to reduce the system-wide energy, which is consumed not only by the processor but also by other peripheral devices at run-time. Through extensive simulations, our experiment results demonstrate that the proposed techniques can significantly outperform the previous research in reducing system-wide energy consumption for weakly hard real-time systems while preserving the system reliability.

Design and Implementation of Task Reprocessing on Medium-large Multi-core Architecture

EDF-Based real-time scheduling approach is one of the efficient way of scheduling the recurrent real-time tasks in both soft real-time and hard real-time systems. EDF algorithms entile heavy overhead due to lower scheduling and huge migration. In this paper, an exploratory procedure has been presented for reprocessing of neglected task sets and also examine, whether an improved heuristic set attributed as Enhanced shared CAche Performance (ENCAP) can improve the shared cache performance which processes the task set based on Earliest-Deadline-First (EDF). An Object-Oriented real-time code reusable scheduling components which is designed from the scratch referred as LITMUSRT has been used to test the efficiency and average-case accomplishments where per task utilizations are shortened and overall utilization are not restricted. We also discuss the implementation and experimental evaluation of Task-Repo procedure for co-scheduling task sets, under the utilization of 50-60% (per-task) on small to medium-large multicore LINUX SYSTEM.

SPACE: Semi-Partitioned CachE for Energy Efficient, Hard Real-Time Systems

Multi-core processors are increasingly popular because they yield higher performance, but they also present new challenges for hard real-time systems in that they make it much more difficult to estimate a task's worst-case execution time (WCET). Partitioned cache architecture is being used to ease the problem by providing an isolated execution environment for each thread. Although simple to implement and use, this method may be sub-optimal with respect to both energy consumption and performance since it prevents taking advantage of information shared across threads for both instructions and data. This work presents a new cache architecture termed SPACE (Semi-Partitioned CachE) that makes it possible to leverage information sharing, yielding in turn a tighter WCET. The SPACE architecture together with our new WCET algorithm can be used to maintain the predictability of the execution time of the parallel threads while reducing the overall energy consumption of the system. The new proposed cache architecture was implemented using Verilog and deployed on a Xilinx MicroBlaze multi-core design for testing, validation and measurements. The application level experiments were conducted using the Chronos tool for estimation and the Wattch/SimpleScalar simulator for execution. Using three real-time programs–a radar tracker, a DES encryption algorithm, and an FM radio–we showed that SPACE together with the enhanced WCET algorithm reduce the average system WCET of these applications by 31 percent and reduce the actual energy consumption by 18 percent in comparison with other cache architectures.

Energy-Efficient Scheduling for Embedded Real-Time Systems Using Threshold Work-Demand Analysis

In this paper, we study the problem of reducing the energy consumption for hard real-time systems scheduled according to either fixed-priority (FP) or earliest-deadline-first (EDF) scheme. To balance the static and dynamic energy consumptions, the concept of critical speed was proposed in previous research. Moreover, when combined with the processor idle/shutdown state, the critical speed was widely used as the lower bound for voltage scaling in literature. In this paper, we show that this strategy might not always be more energy efficient than the traditional DVS strategy and there exists a dynamic tradeoff between these two strategies depending on the job’s work-demand to be finished within certain intervals. To effectively address this issue, we propose a unified approach that combines these two strategies to achieve better overall energy saving performance. Our approach determines the energy-efficient speeds for real-time jobs in their corresponding feasible intervals based on the threshold work-demand analysis. Our experimental results demonstrate that the proposed techniques significantly outperform previous approaches in the overall energy saving performance.

A Novel Constraint Specification of Weakly Hard Real-Time System with Time Constraint

A Novel Constraint Specification of Weakly Hard Real-Time System with Time Constraint

Interactive WCET Prediction with Warning for Timeout Risk

Worst case execution time (WCET) analysis is essential for exposing timeliness defects when developing hard real-time systems. However, it is too late to fix timeliness defects cheaply since developers generally perform WCET analysis in a final verification phase. To help developers quickly identify real timeliness defects in an early programming phase, a novel interactive WCET prediction with warning for timeout risk is proposed. The novelty is that the approach not only fast estimates WCET based on a control flow tree (CFT), but also assesses the estimated WCET with a trusted level by a lightweight false path analysis. According to the trusted levels, corresponding warnings will be triggered once the estimated WCET exceeds a preset safe threshold. Hence developers can identify real timeliness defects more timely and efficiently. To this end, we first analyze the reasons of the overestimation of CFT-based WCET calculation; then we propose a trusted level model of timeout risks; for recognizing the structural patterns of timeout risks, we develop a risk data counting algorithm; and we also give some tactics for applying our approach more effectively. Experimental results show that our approach has almost the same running speed compared with the fast and interactive WCET analysis, but it saves more time in identifying real timeliness defects.

A resource-efficient network interface supporting low latency reconfiguration of virtual circuits in time-division multiplexing networks-on-chip

This paper presents a resource-efficient time-division multiplexing network interface of a network-on-chip intended for use in a multicore platform for hard real-time systems. The network-on-chip provides virtual circuits to move data between core-local on-chip memories. In such a platform, a change of the application’s operating mode may require reconfiguration of virtual circuits that are setup by the network-on-chip. A unique feature of our network interface is the instantaneous reconfiguration between different time-division multiplexing schedules, containing sets of virtual circuits, without affecting virtual circuits that persist across the reconfiguration. The results show that the worst-case latency from triggering a reconfiguration until the new schedule is executing, is in the range of 300 clock cycles. Experiments show that new schedules can be transmitted from a single master to all slave nodes for a 16-core platform in between 500 and 3500 clock cycles. The results also show that the hardware cost for an FPGA implementation of our architecture is considerably smaller than other network-on-chips with similar reconfiguration functionalities, and that the worst-case time for a reconfiguration is smaller than that seen in functionally equivalent architectures.

Handling startling circumstances with IRM scheduler of real-time systems

There are many vital real-time systems such as avionics, mission-critical, industrial control, and space-mission, which cannot tolerate any request overruns. Safeness analysis of such systems is directly dependent on the scheduling strategy being used. Rate-monotonic and earliest deadline first are the leading scheduling strategies for these systems. Before deployment, it is essential to make sure no task misses occur for such hard real-time systems. This is usually done by formally proving the safeness of the system for the given set of tasks. Besides, a scheduler is preferred which performs better in unexpected situations such as when a transient fault occurs. The purpose of this paper is to first reveal some new behaviours of the intelligent rate-monotonic scheduler and then evaluate its performance in unexpected situations. Simulation results show that it performs better than both rate-monotonic and earliest deadline first in such situations.

DYNAMIC VOLTAGE AND FREQUENCY SCALING IN FAULT TOLERANT REAL-TIME SYSTEMS

In this paper, we analyze the faults tolerance capability of hard real-time systems under power consumption constraints. In particular, we are focused on real-time systems in which:1) the fault tolerance is achieved through time redundancy, which is used for re-executing tasks affected by transient faults, and 2) the dynamic voltage scaling used to manage power consumption. We propose a heuristic-based algorithm to find processor frequencies at which each real-time task should be executed so that: 1) the power consumption does not exceed the upper power limit; 2) the fault tolerance capability is maximized, and 3) all real-time requirements of individual tasks are met. Evaluations on synthetic task sets show that the proposed algorithm attains target power consumption level with minimum degradation in fault tolerance.

Reliability and performance enhancements for SSD RAID

NAND based solid state storage devices are almost ubiquitously used in safety-critical embedded devices, and recent advances have demonstrated RAID architectures specific to solid state storage devices resulting in increased data reliability, with architectural enhancements to solve the age convergence problem. However, these techniques require devices to be taken off-line while components are replaced—consequently these devices are of limited use in hard real time systems. There are further real time issues in that the conventional architectures ignore other characteristics of solid state devices such as garbage collection and meta data management. In this paper we investigate techniques that support the replacement of aged devices in the array in such a way that we provide continuous system reliability. We also improve the performance overhead of the reconstruction process using a novel data migration policy. The techniques are implemented and tested in a trace-driven simulator, and results demonstrate that average I/O response time is improved by up to 39% with improvement by up to 45% in its standard deviation, overheads in terms of device replacement time are negligible, and read performance is improved by an average of 8%.

Design optimization of secure message communication for energy-constrained distributed real-time systems

Modern Distributed Embedded Systems (DESs) tend to be more connected to other peers or external networks. This opens the gate for potential security attacks, although it is beneficial for embedded applications running on DESs. Security protections in DESs require significant time and energy overhead. Longer execution time rises the possibility of deadline violation of real-time applications, which may cause serious consequences in hard real-time systems. Energy efficiency is required since energy budget is usually very scarce under the context of DESs. Therefore, it is of critical importance to study the trade-off between security protection and corresponding timing and energy overheads so that the overall system performance can be maximally improved.In this paper, we approach the design of energy- and security-critical distributed real-time embedded systems from the early mapping and scheduling phases. We focus on providing the best confidentiality protection of internal communication in DESs under timing and energy constraints. The complexity of finding the optimal solution grows exponentially as the problem size increases. Therefore, we propose an efficient, genetic algorithm based heuristic to solve the problem. In the presented algorithm, solutions are evolved gradually so that good solutions can be obtained. Extensive experiments, including a real-life case study, demonstrate the efficiency of the proposed technique.