Hafnium Aluminum Research Articles

Boosting deep-ultraviolet photodetector performance via ferroelectric effect based on HfAlOx@PEI composite

In this study, hafnium-aluminum oxide (HfAlOx) was used as an effective active layer in a self-powered deep-ultraviolet (UV) photodetector. For the first time, we exploited the ferroelectric properties of crystalline HfAlOx to enhance device performance. The HfAlOx powder obtained at an annealing temperature of 850 °C exhibited the highest-intensity peak for the orthorhombic phase (o-phase), representing the ferroelectric property of the material. The HfAlOx particles were reduced to a small size using mechanical treatment to facilitate the preparation of a composite thin film with a polyethyleneimine (PEI) polymer matrix. First, the HfAlOx@PEI composite film-based photodetector demonstrated a remarkable on/off ratio of more than 103 and a rapid response (trise/tfall of 0.127/2.7 s) at zero bias under 254-nm UV illumination. Second, the photocurrent of the device was dramatically boosted under an external bias owing to the injection of carriers, supported by the ferroelectric effect of the o-phase HfAlOx. As a result, the external quantum efficiency and responsivity approached 2628 % and 5.37 A/W at −1 V bias, respectively. Furthermore, the device exhibited excellent photostability, demonstrating almost no change in the photocurrent after 1000 s of UVC irradiation. Our findings provide guidance for the preparation of optoelectronic devices, particularly self-powered high-performance UV photodetectors.

Performance Comparison of SONOS-Type UV TD Sensor Using Indium Tin Oxide-Aluminum Oxide-Zirconia Aluminum Oxide-Silicon Oxide-Silicon and Indium Tin Oxide-Aluminum Oxide-Hafnium Aluminum Oxide-Silicon Oxide-Silicon

This study compares the performance of two types of capacitive devices, indium tin oxide-aluminum oxide-zirconia aluminum oxide-silicon oxide-silicon (IAZAOS) and indium tin oxide-aluminum oxide-hafnium aluminum oxide-silicon oxide-silicon (IAHAOS), as silicon-oxide-nitride-oxide-silicon (SONOS) non-volatile memory (NVM) total dose of ultraviolet radiation (UV TD) sensors. Results show that IAZAOS with zirconia aluminum oxide as the charge-trapping layer outperforms IAHAOS with hafnium aluminum oxide for a UV TD sensor. After exposure to UV TD irradiation of 100 mW·s/cm2, the threshold voltage (VT) change of IAZAOS is almost 1.25 times that of IAHAOS. The study also found that annealing can significantly improve the response performance of IAZAOS UV TD sensors. Furthermore, IAZAOS devices with partially smaller nanocrystals in the charge-trapping layer greatly enhance the response of SONOS-type UV TD sensors. The study also compared the constant voltage stress-induced leakage current (CVSILC) and found that the CVSILC for annealed IAZAOS devices is 1000 times smaller than that of IAHAOS devices. Moreover, the IAZAOS-I2Z2 exhibits a superior performance regarding irradiation/refresh cycle endurance as compared to the IAHAOS-I2H1 device. These findings suggest that IAZAOS capacitive devices have superior performance and potential for use in SONOS-type UV TD sensors.

Performance enhancement of solution-processed amorphous WZTO TFT with HAO gate dielectric via power ultrasound technology

In this paper, power ultrasound technology (PUT) is employed to prepare the high-k hafnium-aluminum oxide (HAO) dielectric and thin film transistor (TFT). The continuous propagation of high-intensity ultrasonic waves in the metal oxide precursor solution can improve the dissolution efficiency of the solute and speed up the formation of the HAO precursor solution. The prepared HAO films have a smooth surface roughness of 0.36 nm and high optical transmittance of 85 %. Moreover, HAO films obtain excellent electrical properties with a relative permittivity of 15.9 and a leakage current density of 9.1 × 10−8 A/cm2 at 2 MV/cm as well. Finally, we successfully fabricate TFT with HAO dielectric using PUT, these TFTs exhibit switch characteristics with field effect mobility of 18.7 cm2v−1s−1, threshold voltage (Vth) of −0.47 V, and Vth shift of 0.35 V under positive gate bias stress. The results show that the PUT is a promising method that can remarkably decrease the preparation time of the precursor solution and improve the TFT performance.

Optimizing Photonic Annealing Technique for High-k Dielectric of Full-Solution-Processed Oxide Thin Film Transistor

In this article, it is demonstrated that the photonic annealing process of ultraviolet (UV) irradiation or rapid thermal annealing (RTA)-assisted LA technique can effectively enhance the bias and illumination stability of full-solution-processed oxide thin film transistor (TFT). Although both post-annealing treatments have comparable effects, UV irradiation has relatively less heat loss and time consumption of only 3 min, compared to the RTA process that heats at a temperature of 400 °C and holds 10 min. Depending on the laser annealing (LA)/UV technique, the amorphous hafnium-aluminum oxide (HAO) dielectric thin film exhibits a smooth surface with an rms value of 0.293 nm, a high optical bandgap of 6.19 eV, and good dielectric performance with high dielectric constants of 12.9, low leakage current densities, and high breakdown field of about 4 MV/cm. Moreover, full-solution-processed indium-tin-oxide (ITO)–HAO–tungsten-zinc-tin-oxide (WZTO) TFT shows excellent overall properties with the mobility ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula> ) of 10.65 cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{{2}}\cdot \text{V}^{-{1}}\cdot \text{s}^{-{1}}$ </tex-math></inline-formula> , subthreshold swing (SS) of 198 mV/dec. And the device has good bias and illumination stability, especially the threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{T}$ </tex-math></inline-formula> ) shifts are all less than 3 V under positive bias illumination stress (PBIS) and negative bias illumination stress (NBIS) testing for 10000 s. These indicate the potential for the photonic annealing process of the UV-assisted LA technique on improving the stability of the full-solution-processed TFTs, which is attributed to high-throughput fabrication for large-area, transparent, and flexible electronics.

Improved Subthreshold Swing of MoS₂ Negative-Capacitance Transistor by Using HfZrAlO as Ferroelectric Layer of Gate-Stack

In this work, a hafnium–zirconium–aluminum–oxide (HZAO) is proposed and atomic layer deposition (ALD), and its ferroelectricity is shown to be stronger than hafnium–zirconium–oxide (HZO) by measuring polarization versus electric field ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${P} - {E}$ </tex-math></inline-formula> ) loop. Also, a large sharp peak of capacitance–voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C} - {V}$ </tex-math></inline-formula> ) curve is observed in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C} - {V}$ </tex-math></inline-formula> measurement to confirm the strong negative-capacitance (NC) effect. The fabricated MoS2 NCFET using HZAO as a ferroelectric layer of gate-stack exhibits a significantly reduced subthreshold swing (SS) (17 mV/dec almost over four orders of drain current magnitude, with a minimal SS of 12.8 mV/dec) as compared to its counterpart with the HZO ferroelectric layer (a minimal SS of 38.5 mV/dec). The involved mechanisms lie in that incorporation of Al atoms into the HZO film can form the additional hafnium–aluminum–oxide (HAO) and zirconium–aluminum–oxide with ferroelectricity, and as a result, the formed composite HZAO film can convert more monoclinic phases to orthorhombic phase than the HZO film, leading to stronger ferroelectricity for the former than the latter and, thus, smaller SS for its relevant NCFET.

Electrical Characteristics of Solution-processed Hafnium-aluminum Oxide Gate Insulator with Addition of Hydrochloric Acid for a-IGZO Thin-Film Transistors

The 29th International Display Workshops (IDW '22),Electrical Characteristics of Solution-processed Hafnium-aluminum Oxide Gate Insulator with Addition of Hydrochloric Acid for a-IGZO Thin-Film Transistors

High‐Performance Full‐Solution‐Processed Oxide Thin‐Film Transistor Arrays Fabricated by Ultrafast Scanning Diode Laser

AbstractThe full‐solution‐processed oxide thin‐film transistor (TFT) array is successfully realized by using ultrafast scanning diode laser annealing (USDLA). It integrates all solution‐processed functional thin films well, including low‐electrical‐resistivity transparent conductive indium‐tin‐oxide (ITO) thin film, high‐k dielectric hafnium‐aluminum‐oxide (HAO) thin film, and high‐quality semiconductor tungsten‐zinc‐tin‐oxide (WZTO) thin film. And the stacked multilayer thin films as a whole exhibit a smooth surface with the root mean square (RMS) roughness of 0.293 nm. The full‐solution‐processed TFT array exhibits a uniform overall TFT device performance, the average values including subthreshold swing of 118 mV dec−1, threshold voltage of −0.45 V, and mobility of 12 cm2 V−1 s−1. Moreover, the full‐solution‐processed TFTs have good bias illumination stability, especially the VT shift of the PBIS and NBIS are only 0.09 and 0.4 V, respectively. The result implies that the USDLA technique can meet the large‐scale fabrication of full‐solution‐processed TFTs and provide a solid path to low‐cost high‐performance and large‐scale electronics.

Sol-gel indium-zinc-tin-oxide thin film transistor pixel array with superior stabilityunder negative bias illumination stress

In this paper, we fabricate a back channel etched structure thin film transistor (TFT) pixel array with hafnium-aluminum oxide dielectric and indium-zinc-tin-oxide (IZTO) semiconductor using a solution process. The electrical characteristics of IZTO TFT are modified by N&lt;sub&gt;2&lt;/sub&gt;O plasma treatment. In comparison with the subthreshold swing and saturation mobility of the device untreated by plasma , the subthreshold swing decreases from 204 to 137 mV·dec&lt;sup&gt;–1&lt;/sup&gt;, and the saturation mobility increases from 29.12 to 51.52 cm&lt;sup&gt;2&lt;/sup&gt;·V&lt;sup&gt;–1&lt;/sup&gt;·s&lt;sup&gt;–1&lt;/sup&gt;. Improvement in the mobility and the subthreshold swing (SS) demonstrate that interface states may be passivated by reactive O radicals that are generated by N&lt;sub&gt;2&lt;/sub&gt;O plasma, which is confirmed by the result of X-ray photoelectron spectrum analysis. In addition, the stability of negative bias illumination stress (NBIS) shift is only 0.1V for 3600 s with an illumination intensity of 10000 lux. This result indicates that its superior stability meets the requirements for the display driver. Therefore, N&lt;sub&gt;2&lt;/sub&gt;O plasma treatment is verified to be an effective method to improve device performance and light stability for IZTO TFT pixel array.

Improve the Performance of SONOS Type UV TD Sensors Using IOHAOS with Enhanced UV Transparency ITO Gate

This research demonstrates that an indium tin oxide–silicon oxide–hafnium aluminum oxide‒silicon oxide–silicon device with enhanced UV transparency ITO gate (hereafter E-IOHAOS) can greatly increase the sensing response performance of a SONOS type ultraviolet radiation total dose (hereafter UV TD) sensor. Post annealing process is used to optimize UV optical transmission and electrical resistivity characterization in ITO film. Via nano-columns (NCols) crystalline transformation of ITO film, UV transparency of ITO film can be enhanced. UV radiation causes the threshold voltage VT of the E-IOHAOS device to increase, and the increase of the VT of E-IOHAOS device is also related to the UV TD. The experimental results show that under UV TD irradiation of 100 mW·s/cm2, ultraviolet light can change the threshold voltage VT of E-IOHAOS to 12.5 V. Moreover, the VT fading rate of ten-years retention on E-IOHAOS is below 10%. The VT change of E-IOHAOS is almost 1.25 times that of poly silicon–aluminum oxide–hafnium aluminum oxide–silicon oxide–silicon with poly silicon gate device (hereafter SAHAOS). The sensing response performance of an E-IOHAOS UV TD sensor is greatly improved by annealed ITO gate.

Performance Enhancement in N2 Plasma Modified AlGaN/AlN/GaN MOS-HEMT Using HfAlOX Gate Dielectric with Γ-Shaped Gate Engineering.

In this paper, we have demonstrated the optimized device performance in the Γ-shaped gate AlGaN/AlN/GaN metal oxide semiconductor high electron mobility transistor (MOS-HEMT) by incorporating aluminum into atomic layer deposited (ALD) HfO2 and comparing it with the commonly used HfO2 gate dielectric with the N2 surface plasma treatment. The inclusion of Al in the HfO2 increased the crystalline temperature (~1000 °C) of hafnium aluminate (HfAlOX) and kept the material in the amorphous stage even at very high annealing temperature (>800 °C), which subsequently improved the device performance. The gate leakage current (IG) was significantly reduced with the increasing post deposition annealing (PDA) temperature from 300 to 600 °C in HfAlOX-based MOS-HEMT, compared to the HfO2-based device. In comparison with HfO2 gate dielectric, the interface state density (Dit) can be reduced significantly using HfAlOX due to the effective passivation of the dangling bond. The greater band offset of the HfAlOX than HfO2 reduces the tunneling current through the gate dielectric at room temperature (RT), which resulted in the lower IG in Γ-gate HfAlOX MOS-HEMT. Moreover, IG was reduced more than one order of magnitude in HfAlOX MOS-HEMT by the N2 surface plasma treatment, due to reduction of N2 vacancies which were created by ICP dry etching. The N2 plasma treated Γ-shaped gate HfAlOX-based MOS-HEMT exhibited a decent performance with IDMAX of 870 mA/mm, GMMAX of 118 mS/mm, threshold voltage (VTH) of −3.55 V, higher ION/IOFF ratio of approximately 1.8 × 109, subthreshold slope (SS) of 90 mV/dec, and a high VBR of 195 V with reduced gate leakage current of 1.3 × 10−10 A/mm.

Physical characterization of hafnium aluminates dielectrics deposited by atomic layer deposition

Hafnium aluminates films with 50 mol% of Hf were deposited onto Si(100) using atomic layer deposition. The films were annealed by RTP at 1000 oC for 60 s in pure N2 or N2+5%O2 and by LASER at 1200oC for 1ms in pure N2. Then, they were characterized by X-ray spectroscopies, ellipsometry, Rutherford backscattering and scanning electron microscopy. For thin films annealed by RTP in N2, phase separation takes place, promoting the formation of HfO2 and Al2.4 O3.6 crystalline phases. In contrast, the films annealed by LASER remain predominantly amorphous with crystalline facets of Al2.4O3.6. Also, non-homogeneous distribution of the chemical elements within the dielectrics gave rise to the formation of several regions which can be viewed as sub-layers, each of them with arbitrary electron density and thickness. As a result, Kratky curves pointed out to the coexistence of different features described by different gyration radius yielding GISAXS scattering profiles with polydispersive characteristics. Finally, the samples annealed by RTP were interpreted as agglomerates of spheroids with different sizes (1.1-2.2 nm) and with different crystalline phases whereas the samples annealed by LASER were interpreted as larger spheroids of crystalline Al2.4O3.6 (1.7-2.7nm) embedded in a matrix predominantly amorphous.

Performance Improvement of a Nonvolatile UV TD Sensor Using SAHAOS with a High Temperature Annealed, Partially Nano-Crystallized Trapping Layer.

This study shows that a silicon–aluminum oxide–hafnium aluminum oxide-silicon oxide–silicon capacitor device with a high temperature pre-metal-anneal-treated and partially-nanocrystallized hafnium aluminum oxide, (hereafter PNC-SAHAOS) can successfully increase the performance of a nonvolatile ultraviolet radiation total dose (hereafter UV TD) sensor. The experimental results show that the UV-induced threshold voltage VT shift of PNC-SAHAOS was 10 V after UV TD 100 mW·s/cm2 irradiation. The UV-induced charge density of PNC-SAHAOS is almost eight times that of amorphous silicon–aluminum oxide–silicon nitride–silicon dioxide–silicon SANOS. Moreover, the charge fading rate of ten-years retention on PNC-SAHAOS, even at 85 °C, is below 10%. At 85 °C, the charge fading rate of ten-years retention on amorphous SANOS is almost twice that on PNC-SAHAOS. These results strongly suggest that PNC-SAHAOS could be the most promising candidate for next-generation nonvolatile UV TD sensor technology.

Role of hydrogen, oxygen and composite formation in relaxational polarization of hafnium oxide and aluminum oxide

Metal-insulator-metal MIM devices of Al 2 O 3 were annealed to various temperatures, 366, 411 and 455 K. Their capacitance measurements were conducted at room temperature. It is illustrated that the annealing process reduces the polarization nonlinearity in high DC bias fields. This way the nonlinearity can be decreased up to 75% of its initial value. Al 2 O 3 was also prepared under O 2 atmosphere. This leads to a drastic suppression of the previously observed electrode polarization for the low frequency region and for high temperatures in the case of samples without O 2 treatments. With O 2 treatments also the nonlinearity decreases. Due to the electrode polarization the relaxational polarization of Al 2 O 3 above 300 K could not be interpreted by the asymmetric double well potential (ADWP) model. It is shown that the capacitance behavior of oxygen treated samples can be interpreted in a wide temperature range by our model. Furthermore, it is found that the charge injection in the case of HfO2 and the loss are much stronger than for Al 2 O 3 Preparing a composite of the two oxides this charge injection as well as the loss was highly suppressed. The composite yields a higher permittivity than that for Al2O3. The capacitance measurements are also conducted for Al 2 O 3 MIM samples consisting of Pd and Au as electrodes after exposing them to hydrogen gas. These and the annealing experiments exhibit an important role of hydrogen in contributing to the relaxational polarization of metal oxides.

Quantum Dot Channel (QDC) Field Effect Transistors (FETs) Configured as Floating Gate Nonvolatile Memories (NVMs)

This paper presents quantum dot channel (QDC) Field Effect Transistors (FETs) which are configured as nonvolatile memories (NVMs) by incorporating cladded GeOx-Ge quantum dots in the floating gates as well as the transport channels. The current flow and the threshold characteristics were significantly improved when the gate dielectric was changed from silicon dioxide (SiO2) to hafnium aluminum oxide (HfAlO2), and the control dielectric was changed from silicon nitride (Si3N4) to hafnium aluminum oxide (HfAlO2). The device operations are explained by carrier transport in narrow energy mini-bands which are manifested in a quantum dot transport channel.

Enhanced resistive switching and multilevel behavior in bilayered HfAlO/HfAlOx structures for non-volatile memory applications

In this work, hafnium aluminum oxide (HfAlO) thin films were deposited by ion beam sputtering deposition technique on Si substrate. The presence of oxygen vacancies in the HfAlOx layer deposited in oxygen deficient environment is evidenced from the photoluminescence spectra. Furthermore, HfAlO(oxygen rich)/HfAlOx(oxygen poor) bilayer structures exhibit multilevel resistive switching (RS), and the switching ratio becomes more prominent with increasing the HfAlO layer thickness. The bilayer structure with HfAlO/HfAlOx thickness of 30/40 nm displays the enhanced multilevel resistive switching characteristics, where the high resistance state/intermediate resistance state (IRS) and IRS/low resistance state resistance ratios are ≈102 and ≈5 × 105, respectively. The switching mechanisms in the bilayer structures were investigated by the temperature dependence of the three resistance states. This study revealed that the multilevel RS is attributed to the coupling of ionic conduction and the metallic conduction, being the first associated to the formation and rupture of conductive filaments related to oxygen vacancies and the second with the formation of a metallic filament. Moreover, the bilayer structures exhibit good endurance and stability in time.

Oxide Structure-Dependent Interfacial Layer Defects of HfAlO/SiO2/Si Stack Analyzed by Conductance Method

Aggressive downscaling of effective oxide thickness (EOT) requires improvement in gate leakage current and interfacial characteristics. Recently other materials like Al, Zr, and La are introduced into HfO2 to further reduce the EOT and improve the reliability. Since the structure of the HfO2-based dielectric changes with addition such materials it is required that the impact of structural change on the interface needs to be investigated. In addition, the effect series resistance（R s）associated with the substrate and contact needs to be excluded. In this work we have used metal oxide semiconductor capacitor (MOS-C) devices of 3nm HfAlO/ 0.5nm SiO2/Si gate stack by different preparation methods (different Al doping, post annealing temperatures, deposition stacks) to characterize the quality of interface. Interface defect densities were evaluated by conductance method (1) while excluding any series resistance effect. 13 samples were prepared with 5 angstrom of interfacial layer SiOx, intentionally deposited on the Si substrate by vapor ozone treatment prior to depositing the high-k layer by atomic layer deposition (ALD) in a 300 mm TEL Trias™ cleanroom tool at TEL Technology Center. The metal gate was prepared by 5nm ALD TiN followed by 50nm physical vapor deposition (PVD) TiN. The substrate was of p-type Si (001) orientation with a.doping concentration of approximately 1015cm-3. Small signal capacitance and conductance measurements were investigated by HP4284 LCR analyzer. It is known that depending on the post-deposition annealing (PDA) temperatures Al doped HfO2 changes its structure from amorphous to tetragonal reducing its EOT (2). It was observed that D it is dependent on the EOT of hafnium aluminum oxide. The amorphous structure has the lowest D it (2.76) whereas tetragonal HfO2 (t-HfO2) has the highest D it (1.27). The Dit values of other EOT are within the range of observed highest and lowest values as EOT, as shown in Fig.1. It is expected that D it value are affected both by the oxide phase structure and interfacial layer thickness since Aluminum doping could impede the growth of the interfacial layer. The decrease in interfacial layer will significantly impact the interface defects as they are closer to interface, this was observed when annealing temperature was 800°C (3). However, in the low annealing temperature with addition of Al the dielectric constant of oxide decreases insignificantly to changed EOT without reducing Dit . E. H. Nicollian and A. Goetzberger, Bell Syst. Tech. J. 46, 1055 (1967).K. Tapily, S. Consiglio, R. Clark, R. Vasic, C. Wajda, J. Jordan-Sweet, G. Leusink, and A.C Diebold, ECS Trans., 64 (9), 123 (2014).Y.Sugimotoa, H.Adachia, K.Yamamotoa, D.Wangb,H. Nakashimaa, H. Nakashima, Material Sci. in Semicon. Process.,9, 1031 (2006). Figure 1

Oxide Structure-Dependent Interfacial Layer Defects of HfAlO/SiO2/Si Stack Analyzed by Conductance Method

This work investigates the interface properties in a metal oxide semiconductor capacitor (MOS-C) device with a 3 nm HfAlO/0.5 nm SiO2/Si stacks prepared by various processing conditions. The impact of different Al doping, different post annealing temperatures and different deposition steps and stacks was studied. Equivalent oxide thickness (EOT) and flat band voltage (V FB) were obtained from capacitance-voltage measurements. A simple approach was used to address the error introduced by the series resistance（R s）associated with the substrate and contact while carefully monitoring the impact of the tunneling current. The interface state density (D it) was calculated by the conductance method. The observed D it seems to be dependent on the structure of hafnium aluminum oxide film. The amorphous structure has the lowest D it tetragonal HfO2 (t-HfO2) has the highest D it and the D it values of other structures are within the highest and lowest values.

Characterization of the semi-insulating properties of AlHfO3.5 for power devices

Physical and electrical characterization of hafnium aluminates gate dielectrics was carried out to investigate their semi-insulating characteristics as passivating layer for power devices. The deposited films were annealed in pure nitrogen to simulate the thermal budget during a conventional CMOS processing. C-V measurements were performed having as a result a high-frequency behavior of the flat band voltage (VFB) and values greater than or equal to zero. On the other hand, the leakage phenomenon was modeled with a simplified electrical model using a leakage admittance YC whose influence was predominant at the accumulation region. Using X-ray reflectometry (XRR), the average thickness obtained was 15.5nm and a leakage process was inferred to occur for AlHfO3.5 due to the observed phase separation and crystallization that occurs after annealing in pure N2.

Solution-Processed Low-Operating-Voltage Thin-Film Transistors With Bottom-Gate Top-Contact Structure

It was demonstrated that low-operating-voltage bottom-gate top-contact (BGTC) structure thin-film transistors (TFTs) were fabricated using solution-processed amorphous zinc indium tin oxide (ZITO) and hafnium aluminum oxide (HAO) films. Due to the excellent chemical stability of ZITO film and high etching selectivity between ZITO and indium tin oxide (or between ZITO and Mo), the manufacture of BGTC structure requires only traditional lithography and wet etching. The usage of high- $k$ HAO films lowered the operating voltage (below 2 V) of the TFT devices. TFT devices based on ZITO and HAO films annealing at 500 °C showed a saturated field-effect mobility of 13.5 cm $^{\mathrm {\mathbf {2}}}$ V $^{\mathrm {\mathbf {-1}}}$ s $^{\mathrm {\mathbf {-1}}}$ , a $^{^{^{^{}}}}$ small subthreshold swing of 87 mV/decade, a large ON-to-OFF current ratio of $7.2\times 10^{\mathrm {\mathbf {6}}}$ , and a threshold voltage of −0.6 V. The hysteresis (0.14 V) of TFT devices confirmed further that the ZITO and HAO films could be the promising candidates for TFT devices.

Oxide structure-dependent interfacial layer defects of HfAlO/SiO2/Si stack analyzed by conductance method

This work investigates the interface properties in a metal oxide semiconductor capacitor device with a 3 nm HfAlO/0.5 nm SiO2/Si stacks prepared by various processing conditions. Different Al doping, different postannealing temperatures, and different deposition steps and stacks were considered. Equivalent oxide thickness and flat band voltage (VFB) were obtained from capacitance–voltage measurements. After the measurement, a simple approach was used to correct the error introduced by the series resistance Rs associated with the substrate and contact while carefully monitoring the impact of the tunneling current. The interface state density (Dit) was calculated by the conductance method, and it was observed that the Dit is dependent on the structure of hafnium aluminum oxide film. The amorphous structure has the lowest Dit (2.76×1011 eV−1cm−2) whereas tetragonal HfO2 has the highest Dit (1.27×1012 eV−1cm−2). The Dit values of other structures are within the range of observed highest and lowest values.