Graphics Processing Units Architecture Research Articles

A GPU‐based real‐time processing system for frequency division multiple‐input‐multiple‐output radar

AbstractMultiple‐Input‐Multiple‐Output (MIMO) radar has the characteristic of multiple antenna channels, bringing on a big data volume for signal processing. Therefore, the trade‐off between detection ability and computational efficiency is always considered. In this article, an optimisation system is proposed to enhance the real‐time performance of frequency division MIMO radar without compromising accuracy. For the scenario of low‐altitude small target detection, a signal processing acceleration method is proposed and a MIMO radar optimisation system based on graphics processing unit (GPU) architecture is built. The signal model of frequency division MIMO radar is first established, improving the classical signal processing flow efficiency from the perspective of reducing fast Fourier transform (FFT) times and windowing operation times. To achieve an advanced acceleration, the parallel architecture of ArrayFire‐library in GPU is then employed. Distinct minimum parallel units are extracted by analysing the principle of digital beamforming (DBF), pulse compression, moving target detection (MTD), and constant false‐alarm rate (CFAR) algorithms. And the corresponding parallel algorithms are designed to constitute a parallel acceleration system of frequency division MIMO. Simulation results indicate that the proposed method significantly improves the efficiency of MIMO system with a maximum acceleration ratio of 65 times, meeting the real‐time processing requirements.

Improved Parallel Implementation of 1D Discrete Wavelet Transform Using CPU-GPU

This work describes a data-level parallelization strategy to accelerate the discrete wavelet transform (DWT) which was implemented and compared in two multi-threaded architectures, both with shared memory. The first considered architecture was a multi-core server and the second one was a graphics processing unit (GPU). The main goal of the research is to improve the computation times for popular DWT algorithms for representative modern GPU architectures. Comparisons were based on performance metrics (i.e., execution time, speedup, efficiency, and cost) for five decomposition levels of the DWT Daubechies db6 over random arrays of lengths 103, 104, 105, 106, 107, 108, and 109. The execution times in our proposed GPU strategy were around 1.2×10−5 s, compared to 3501×10−5 s for the sequential implementation. On the other hand, the maximum achievable speedup and efficiency were reached by our proposed multi-core strategy for a number of assigned threads equal to 32.

Program Analysis and Machine Learning–based Approach to Predict Power Consumption of CUDA Kernel

The General Purpose Graphics Processing Unit has secured a prominent position in the High-Performance Computing world due to its performance gain and programmability. Understanding the relationship between Graphics Processing Unit (GPU) power consumption and program features can aid developers in building energy-efficient sustainable applications. In this work, we propose a static analysis-based power model built using machine learning techniques. We have investigated six machine learning models across three NVIDIA GPU architectures: Kepler, Maxwell, and Volta with Random Forest, Extra Trees, Gradient Boosting, CatBoost, and XGBoost reporting favorable results. We observed that the XGBoost technique-based prediction model is the most efficient technique with an R 2 value of 0.9646 on Volta Architecture. The dataset used for these techniques includes kernels from different benchmarks suits, sizes, nature (e.g., compute-bound, memory-bound), and complexity (e.g., control divergence, memory access patterns). Experimental results suggest that the proposed solution can help developers precisely predict GPU applications power consumption using program analysis across GPU architectures. Developers can use this approach to refactor their code to build energy-efficient GPU applications.

Subspace recursive Fermi-operator expansion strategies for large-scale DFT eigenvalue problems on HPC architectures.

Quantum mechanical calculations for material modeling using Kohn-Sham density functional theory (DFT) involve the solution of a nonlinear eigenvalue problem for N smallest eigenvector-eigenvalue pairs, with N proportional to the number of electrons in the material system. These calculations are computationally demanding and have asymptotic cubic scaling complexity with the number of electrons. Large-scale matrix eigenvalue problems arising from the discretization of the Kohn-Sham DFT equations employing a systematically convergent basis traditionally rely on iterative orthogonal projection methods, which are shown to be computationally efficient and scalable on massively parallel computing architectures. However, as the size of the material system increases, these methods are known to incur dominant computational costs through the Rayleigh-Ritz projection step of the discretized Kohn-Sham Hamiltonian matrix and the subsequent subspace diagonalization of the projected matrix. This work explores the potential of polynomial expansion approaches based on recursive Fermi-operator expansion as an alternative to the subspace diagonalization of the projected Hamiltonian matrix to reduce the computational cost. Subsequently, we perform a detailed comparison of various recursive polynomial expansion approaches to the traditional approach of explicit diagonalization on both multi-node central processing unit and graphics processing unit architectures and assess their relative performance in terms of accuracy, computational efficiency, scaling behavior, and energy efficiency.

An automated and portable method for selecting an optimal GPU frequency

Power consumption poses a significant challenge in current and emerging graphics processing unit (GPU) enabled high-performance computing systems. In modern GPUs, dynamic voltage frequency scaling (DVFS) appears to be a reliable control to regulate power consumption and performance. However, the DVFS design space is large - hence, brute-force approaches are infeasible to select the optimal frequency. Furthermore, no single frequency can be universally optimal for applications with varying computational intensities. Thus, the application’s complexity and the availability of a wide range of frequency settings are a challenge in selecting the optimal frequency configuration for a given GPU workload. To that end, this paper proposes a systematic approach that consists of three steps. The feature characterization study identifies the fine-grain GPU utilization metrics that influence the power consumption and execution time of a given workload. To understand the performance, power, and energy consumption behaviors of a workload across GPU’s DVFS design space, we derived analytical power and performance models using the identified fine-grain features. It is shown that the same set of GPU utilization metrics can estimate both the power consumption and execution time while being agnostic of changes to frequency and input sizes. Applying a power control with the single objective of reducing power may cause performance degradation, leading to more energy consumption. A multi-objective approach is proposed to select the optimal GPU DVFS configuration for a workload that reduces power consumption with negligible degradation in performance. The evaluation was conducted using SPEC ACCEL benchmarks and three real applications - NAMD LAMMPS, and LSTM on NVIDIA GV100, GA100, and AMD MI210 GPUs. On average, real applications showed 29.6% energy savings with a performance loss of 5.2% on GA100 and 22.6% energy savings with a performance loss of 4.7% on GV100. Moreover, the proposed models are portable to real applications, GPU architectures, and vendors, and require metric collection at only the default frequency rather than all supported DVFS configurations. Additionally, we conducted a comparison between our models and the GPU assembly instructions (PTX)-based static models. The results revealed a significant reduction in the average error rates, with a decrease from 19.7% to 3.1% for power models and from 29.4% to 5.2% for performance models.

Numerical solution to phase-field model of solidification: A review

Recent advances in improving the computational efficiency of the phase-field simulations of solidification microstructures are reviewed. The parallel progress of four typical approaches, namely, multigrid, adaptive mesh refinement method, semi-implicit Fourier spectral method, and graphical processing units (GPUs) architecture, is highlighted. Large-scale spatiotemporal simulations are successfully performed to cover essential aspects of multiphysics with the capability of these algorithms. Focus is put on the principles, applications, and comparison of the four algorithms, while solidification theories and discretization methods are outlined.

Accelerating 4D image reconstruction for magnetic resonance-guided radiotherapy.

Physiological motion impacts the dose delivered to tumours and vital organs in external beam radiotherapy and particularly in particle therapy. The excellent soft-tissue demarcation of 4D magnetic resonance imaging (4D-MRI) could inform on intra-fractional motion, but long image reconstruction times hinder its use in online treatment adaptation. Here we employ techniques from high-performance computing to reduce 4D-MRI reconstruction times below two minutes to facilitate their use in MR-guided radiotherapy. Four patients with pancreatic adenocarcinoma were scanned with a radial stack-of-stars gradient echo sequence on a 1.5T MR-Linac. Fast parallelised open-source implementations of the extra-dimensional golden-angle radial sparse parallel algorithm were developed for central processing unit (CPU) and graphics processing unit (GPU) architectures. We assessed the impact of architecture, oversampling and respiratory binning strategy on 4D-MRI reconstruction time and compared images using the structural similarity (SSIM) index against a MATLAB reference implementation. Scaling and bottlenecks for the different architectures were studied using multi-GPU systems. All reconstructed 4D-MRI were identical to the reference implementation (SSIM 0.99). Images reconstructed with overlapping respiratory bins were sharper at the cost of longer reconstruction times. The CPU +GPU implementation was over 17 times faster than the reference implementation, reconstructing images in 60 1 s and hyper-scaled using multiple GPUs. Respiratory-resolved 4D-MRI reconstruction times can be reduced using high-performance computing methods for online workflows in MR-guided radiotherapy with potential applications in particle therapy.

CUDA-bigPSF: An optimized version of bigPSF accelerated with graphics processing Unit

Accurate and fast short-term load forecasting is crucial in efficiently managing energy production and distribution. As such, many different algorithms have been proposed to address this topic, including hybrid models that combine clustering with other forecasting techniques. One of these algorithms is bigPSF, an algorithm that combines K-means clustering and a similarity search optimized for its use in distributed environments. The work presented in this paper aims to improve the time required to execute the algorithm with two main contributions. First, some of the issues of the original proposal that limited the number of cores simultaneously used are studied and highlighted. Second, a version of the algorithm optimized for Graphics Processing Unit (GPU) is proposed, solving the previously mentioned issues while taking into account the GPU architecture and memory structure. Experimentation was done with seven years of real-world electric demand data from Uruguay. Results show that the proposed algorithm executed consistently faster than the original version, achieving speedups up to 500 times faster during the training phase.

Performance Portable Batched Sparse Linear Solvers

Solving large number of small linear systems is increasingly becoming a bottleneck in computational science applications. While dense linear solvers for such systems have been studied before, batched sparse linear solvers are just starting to emerge. In this paper, we discuss algorithms for solving batched sparse linear systems and their implementation in the Kokkos Kernels library. The new algorithms are performance portable and map well to the hierarchical parallelism available in modern accelerator architectures. The sparse matrix vector product (SPMV) kernel is the main performance bottleneck of the Krylov solvers we implement in this work. The implementation of the batched SPMV and its performance are therefore discussed thoroughly in this paper. The implemented kernels are tested on different Central Processing Unit (CPU) and Graphic Processing Unit (GPU) architectures. We also develop batched Conjugate Gradient (CG) and batched Generalized Minimum Residual (GMRES) solvers using the batched SPMV. Our proposed solver was able to solve 20,000 sparse linear systems on V100 GPUs with a mean speedup of 76x and 924x compared to using a parallel sparse solver with a block diagonal system with all the small linear systems, and compared to solving the small systems one at a time, respectively. We see mean speedup of 0.51 compared to dense batched solver of cuSOLVER on V100, while using lot less memory. Thorough performance evaluation on three different architectures and analysis of the performance are presented.

Photonic Network-on-Wafer for Multichiplet GPUs

This article introduces the photonic network-on-wafer graphics processing unit (GPU) architecture to overcome fundamental limitations in electrical interconnect scaling by implementing the inter-GPU network in a wafer-scale optical interposer. We argue that the photonic-NoW GPU is a scalable architecture, delivering significant performance benefits in a power-efficient manner.

Deep convolutional surrogates and freedom in thermal design

A deep learning approach is presented for heat transfer and pressure drop prediction of complex fin geometries generated using composite Bézier curves. Thermal design process includes iterative high fidelity simulation which is complex, computationally expensive, and time-consuming. With the advancement in machine learning algorithms as well as Graphics Processing Units (GPUs), parallel processing architecture of GPUs can be used to accelerate thermo-fluid simulation. In this study, Convolutional Neural Networks (CNNs) are used to predict results of Computational Fluid Dynamics (CFD) directly from topologies saved as images. A design space with a single fin as well as multiple morphable fins are studied. A comparison of Xception network and regular CNN is presented for the case with a single fin design. Results show that high accuracy in prediction is observed for single fin design particularly using Xception network. Xception network provides 98 percent accuracy in heat transfer and pressure drop prediction of the single fin design. Increasing the design freedom to multiple fins increases the error in prediction. This error, however, remains within three percent of the ground truth values which is valuable for design purpose. The presented predictive model can be used for innovative BREP-based fin design optimization in compact and high efficiency heat exchangers.

APPROACH FOR CODE ANALYSIS TO ESTIMATE POWER CONSUMPTION OF CUDA CORE

The graphics processing unit is a popular computing device for achieving exascale performance in high-performance computing programs, which is used not only in graphics tasks, but also in computational tasks such as machine learning, scientific computing, and cryptography. With the help of a graphics processor, you can achieve significant speed and performance compared to the central processing unit. CUDA, Compute Unified Device Architecture, a graphics processing unit software development platform, allows developers to use the high-performance computing capabilities of graphics processing units to solve problems traditionally handled by central processing units. Even though the graphics processing unit has a relatively high power to performance ratio, it consumes a significant amount of power during computing. The paper proposes an approach for code analysis to estimate power consumption of CUDA core to improve the power efficiency of applications focused on computing on graphics processing units. The proposed approach makes it possible to estimate the power consumption of such applications without the need to run them on physical devices. The proposed approach is based on static analysis of the CUDA program and machine learning methods. To evaluate the effectiveness of the proposed approach, three graphics processing unit architectures were used: NVIDIA PASCAL, NVIDIA TURING, and NVIDIA AMPERE. The results of the experiments showed that for the NVIDIA AMPERE architecture, the proposed approach using decision trees makes it possible to achieve a determination coefficient of 0.9173. The results obtained confirm the effectiveness of the proposed code analysis method for estimating the power consumption of the CUDA core. This method can be useful for CUDA developers who want to improve the efficiency and power efficiency of their programs.

Vulkan all the way: Transitioning to a modern low-level graphics API in academia

For over two decades, the OpenGL API provided users with the means for implementing versatile, feature-rich, and portable real-time graphics applications. Consequently, it has been widely adopted by practitioners and educators alike and is deeply ingrained in many curricula that teach real-time graphics for higher education. Over the years, the architecture of graphics processing units (GPUs) incrementally diverged from OpenGL’s conceptual design. The more recently introduced Vulkan API provides a more modern, fine-grained approach for interfacing with the GPU, which allows a high level of controllability and, thereby, deep insights into the inner workings of modern GPUs. This property makes the Vulkan API especially well suitable for teaching graphics programming in university education, where fundamental knowledge shall be conveyed. Hence, it stands to reason that educators who have their students’ best interests at heart should provide them with corresponding lecture material. However, Vulkan is notoriously verbose and rather challenging for first-time users, thus transitioning to this new API bears a considerable risk of failing to achieve expected teaching goals. In this paper, we document our experiences after teaching Vulkan in both introductory and advanced graphics courses side-by-side with conventional OpenGL. A collection of surveys enables us to draw conclusions about perceived workload, difficulty, and students’ acceptance of either approach. In doing so, we identify suitable conditions and recommendations for teaching Vulkan to both undergraduate and graduate students.

GPU-Based Cellular Automata Model for Multi-Orient Dendrite Growth and the Application on Binary Alloy

To simulate dendrite growth with different orientations more efficiently, a high-performance cellular automata (CA) model based on heterogenous central processing unit (CPU)+ graphics processing unit (GPU) architecture has been proposed in this paper. Firstly, the decentered square algorithm (DCSA) is used to simulate the morphology of dendrite with different orientations. Secondly, parallel algorithms are proposed to take full advantage of many cores by maximizing computational parallelism. Thirdly, in order to further improve the calculation efficiency, the task scheduling scheme using multi-stream is designed to solve the waiting problem among independent tasks, improving task parallelism. Then, the present model was validated by comparing its steady dendrite tip velocity with the Lipton–Glicksman–Kurz (LGK) analytical model, which shows great agreement. Finally, it is applied to simulate the dendrite growth of the binary alloy, which proves that the present model can not only simulate the clear dendrite morphology with different orientations and secondary arms, but also show a good agreement with the in situ experiment. In addition, compared with the traditional CPU model, the speedup of this model is up to 158×, which provides a great acceleration.

Shared Memory Semi-Implicit Solver for Hydrodynamical Instability Processes

The Advection-Diffusion Reaction (ADR) equation appears in many problems in nature. This constitutes a general model that is useful in various scenarios, from porous media to atmospheric processes. Particularly, it is used at the interface between two fluids where different types of instabilities due to surface mobility may appear. Together with the ADR equation, the Darcy-Brinkman model describes the phenomena known as fingering that appear in different contexts. The study of this type of system gains in complexity when the number of chemical species dissolved in both fluids increases. With more solutes, the increasing complexity of this phenomenon generally requires much computational power. To face the need for more computational resources, we build a solver tool based on an Alternating Direction Implicit (ADI) scheme that can be run in Central Processing Unit (CPU) and Graphic Processing Unit (GPU) architectures on any notebook. The implementation is done using the MATLAB platform to compare both versions. It is shown that using the GPU version strongly saves both resources and calculation times.

GPU-Accelerated Infill Criterion for Multi-Objective Efficient Global Optimization Algorithm and Its Applications

In this work, a novel multi-objective efficient global optimization (EGO) algorithm, namely GMOEGO, is presented by proposing an approach of available threads’ multi-objective infill criterion. The work applies the outstanding hypervolume-based expected improvement criterion to enhance the Pareto solutions in view of the accuracy and their distribution on the Pareto front, and the values of sophisticated hypervolume improvement (HVI) are technically approximated by counting the Monte Carlo sampling points under the modern GPU (graphics processing unit) architecture. As compared with traditional methods, such as slice-based hypervolume integration, the programing complexity of the present approach is greatly reduced due to such counting-like simple operations. That is, the calculation of the sophisticated HVI, which has proven to be the most time-consuming part with many objectives, can be light in programed implementation. Meanwhile, the time consumption of massive computing associated with such Monte Carlo-based HVI approximation (MCHVI) is greatly alleviated by parallelizing in the GPU. A set of mathematical function cases and a real engineering airfoil shape optimization problem that appeared in the literature are taken to validate the proposed approach. All the results show that, less time-consuming, up to around 13.734 times the speedup is achieved when appropriate Pareto solutions are captured.

A Scheme of Full Kinetic Particle-in-cell Algorithms for GPU Acceleration Using CUDA Fortran Programming

The emerging computable devices, graphical processing units (GPUs), are gradually applied in the simulations of space physics. In this paper, we introduce an approach that implements full kinetic particle-in-cell simulations on GPU architecture devices using the CUDA Fortran language programming for the first time. Using the latest high-performance computing NVIDIA GPUs, this program, which follows the second-order leap-frog iteration method, can speed up the computing process by a factor of 150–285 on a single device compared with the time cost of running with a single core of an Intel Xeon Gold processor. Our scheme improves fast accessibility to the simulation results and provides valuable assistance in studying the physical process.

Efficient vectorised kernels for unstructured high-order finite element fluid solvers on GPU architectures in two dimensions

We develop efficient kernels for elemental operators of matrix-free solvers of the Helmholtz equation, which are the core operations for incompressible Navier-Stokes solvers, for use on graphics-processing units (GPUs). Our primary concern in this work is the extension of matrix-free routines to efficiently evaluate this elliptic operator on regular and curvilinear triangular elements in a tensor-product manner. We investigate two types of efficient CUDA kernels for a range of polynomial orders and thus varying arithmetic intensities: the first maps each elemental operation to a CUDA-thread for a completely vectorised kernel, whilst the second maps each element to a CUDA-block for nested parallelism. Our results show that the first option is beneficial for elements with low polynomial order, whereas the second option is beneficial for elements of higher order. The crossover point between these two schemes for the hardware used in this study corresponds to polynomial orders at around P=4−5, depending on element type. For both options, we highlight the importance of the layout of data structures, which necessitates the development of interleaved elemental data for vectorised kernels, and analyse the effect of selecting different memory spaces on the GPU. As the considered kernels are foremost memory-bandwidth bound, we develop kernels for curved elements that trade memory bandwidth against additional arithmetic operations, and demonstrate improved throughput in selected cases. We further compare our optimised CUDA kernels against optimised OpenACC kernels, to contrast the performance between a native and a portable programming model for GPUs.

Parallel tool-path generation for Additive Manufacturing: A GPU-based zigzag filling

This paper presents a parallel zigzag (raster) tool-path generation method for Additive Manufacturing (AM). Based on the analysis of some ordinary serial algorithms, it was observed that some compute-intensive operations could be parallelized by using a Graphics Processing Unit (GPU) architecture. However, to achieve this, many challenges were faced and solved by designing a method to work concurrently with individual contour segments on multiple layers while keeping the data organized. The method’s ability to solve the zigzag generation problem was verified, and its performance was measured by running an exhaustive search for optimal raster angles to reduce manufacturing time. The results showed that the method was effective and generated relevant computational gain, being up to 9 times faster than its serial counterpart. In the tool-path optimization, the simulations found configurations yielding an average length of raster lines up to 38% longer, which, in turn, can reduce manufacturing time.

Task offloading using GPU-based particle swarm optimization for high-performance vehicular edge computing

With mobile edge computing, vehicles can obtain nearby network resources and computability and meet the growing demand for vehicular service at large scales. However, as a result of vehicle mobility and offloading of an extensive number of tasks, the congestion in wireless networks and the insufficient computing resources of edge servers make it difficult to maintain good service quality for users. Moreover, network access point selection is not often considered a factor in task execution latency. In this paper, we propose a smart metaheuristic optimization model to address the problem of low service quality due to vehicle movements and limited edge coverage. Then, the proposed model is used to characterize the overall latency of vehicle task offloading by considering resource utilization, workload at edge servers and vehicle movement characteristics. There are two advantages of our proposed framework. First, the design of the optimization model offers an adaptive task offloading strategy by automatically providing preallocation decisions with respect to the edge server workload state. Second, the proposed metaheuristic approach benefits from recent advances in graphics processing unit (GPU) architectures. In fact, the design of the PSO on a GPU shifts the optimization of the task offloading process to a promising area in terms of time and precision. Extensive experimental results are presented to demonstrate the effectiveness of the proposed framework.