GPU Modules Research Articles

RouteReplies: Alleviating Long Latency in Many-Chip-Module GPUs

GPU chip module count is expected to keep increasing to meet the strong scaling demands of parallel applications. In many-chip-module GPUs, memory access latency seriously limits the performance since the transferring latency between different GPU modules is very high, which cannot be easily hidden by switching between different ready threads. To handle this problem, we propose RouteReplies, which enables a GPU module to fetch data from other GPU modules in the routing path. Leveraging the data locality between different GPU modules, RouteReplies significantly reduces the memory access latency since the memory request does not need to fetch data from the faraway memory partition. For a set of applications exhibiting varying degrees of inter-module locality, RouteReplies reduces memory access latency and increases performance by 54.8% on average (up to 364.8%).

Parallel VINS-Mono algorithm based on GPUs in embedded devices

Traditional visual-inertial simultaneous localization and mapping algorithms are usually designed based on CPUs, and they cannot effectively utilize the parallel computing function of GPUs if they are directly transplanted to an embedded board with a GPU module. However, the computing power of embedded devices is limited. It is unreasonable for the visual-inertial simultaneous localization and mapping algorithm to occupy most CPU computing resources while the GPU is idle. In this article, a parallelization scheme for the VINS-Mono algorithm based on GPU parallel computing technology is proposed. Based on the compute unified device architecture, the construction and solution of the incremental equation are parallelized in the nonlinear optimization process of the algorithm, and the parallelization methods provided by cuSOLVER and cuBLAS are used to carry out the marginalization of the algorithm. In addition, the program for the detection and matching of image feature points in the process of optical flow tracking is rewritten in the algorithm to realize the parallelization of optical flow tracking. After parallelization, the algorithm is found to run well on a heterogeneous computing model composed of a CPU and GPU and can fully exploit the parallel computing power of the GPU. The proposed method was tested on an NVIDIA’s Jetson TX2 module and compared with the VINS-Mono algorithm; the speeds of the construction and solution of the incremental equation were found to be the same, but the optical flow tracking and marginalization speed of the proposed scheme exhibited improvements of about 1.5–1.7 times and 1.9 times, respectively.

Evaluating softcore GPU in SRAM-based FPGA under radiation-induced effects

This work investigates selective mitigation techniques to improve the reliability of a configurable open-source softcore GPU implemented in an SRAM-based FPGA against configuration memory faults. It explores the unhardened and hardened reliability curves of isolated groups of the target GPU's modules to guide the decision of the best candidates for selective hardening. Fault injection campaigns are performed on the target GPU running three case-study applications by accumulating radiation-induced effects in the FPGA's configuration memory. Individual modules' reliability curves are combined with their resource usages to selectively harden a larger area of the target GPU and increase reliability/area effectiveness. Results can help designers in hardening configurable GPUs for a given application more effectively.

Искусственный интеллект в задачах распознавания динамических жестов

The development of effective methods for recognizing human hand gestures is an urgent task, both from a scientific and an applied point of view. Gesture recognition methods are the basis of contactless interfaces for managing technical systems. The most significant areas of application of gesture recognition systems are automatic sign language translation and contactless control of technical systems. Almost all existing implementations of recognition methods work confidently when the hand is on a uniform background. But in reality, such a case of using such implementations is unlikely. The likelihood of correct recognition drops sharply against a complex background when the hand in the image crosses the face or body parts with exposed skin. Additional restrictions on algorithms impose requirements for their hardware implementation. These should be compact devices on a chip (SoC) with low consumption, size and price, and, therefore, with low computing power. Taking into account the above, it should be recognized that it is relevant to solve the problem of increasing the efficiency of algorithms and methods of gesture recognition. Two approaches to solving the problem of recognizing dynamic hand gestures are considered - analytical and neural network. It is shown that the use of artificial intelligence techniques can increase the reliability of gesture recognition in complex video surveillance conditions. However, the use of neural network algorithms cannot show high performance on single-board computers if they do not have an NPU or a powerful GPU module.

Deep Convolutional Network for Stereo Depth Mapping in Binocular Endoscopy

Depth mapping from binocular endoscopy images plays an important role in stereoscopic surgical treatment. Owing to the development of deep convolutional neural networks (CNNs), binocular depth estimation models have achieved many exciting results in the fields of autonomous driving and machine vision. However, the application of these methods to endoscopic imaging is greatly limited by the fact that binocular endoscopic images not only are rare, but also have unsatisfying features such as no texture, no ground truth, bad contrast, and high gloss. Aiming at solving the above-mentioned problems, we have built a precise gastrointestinal environment by the open-source software blender to simulate abundant binocular endoscopy data and proposed a 23-layer deep CNNs method to generate real-time stereo depth mapping. An efficient scale-invariant loss function is introduced in this paper to accommodate the characteristics of endoscope images, which improves the accuracy of achieved depth mapping results. Regarding the considerable training data for typical CNNs, our method requires only a few images ($960\times 720$ resolution) at 45 frames per second on an NVIDIA GTX 1080 GPU module, then the depth mapping information is generated in real-time with satisfactory accuracy. The effectiveness of the developed method is validated by comparing with state-of-the-art methods on processing the same datasets, demonstrating a faster and more accurate performance than other model frames.

What is driving the TSV business: Market & Technology Trends

TSV interconnect based 3D/2.5D packaging has gained significant attention since its introduction in FPGA (for die partitioning) and HBM integrated GPU module (for gaming application). The performance potential offered by this technology is unequalled by any other packaging platform today. High-end applications like deep learning, datacenter networking, AR/VR, and autonomous driving are becoming real, thereby pushing the limits of other current packaging platforms. Fueled by increasing bandwidth needs for moving data in cloud-computing and supercomputing applications, performance-driven markets have adopted 3D stacked technologies in a row. Imaging, as the first market adopter of 3D integration, is propelling the market with an increasing number of sensors in smartphones and tablets, including 3D imaging. TSV-based products can be classified in three ranges: low, middle, and high-end. The middle and high-end product markets like CMOS image sensor, memory cube, and interposer are based on a via-middle process. In low-end products, we can also find TSV based on via-middle (i.e. in Apple's fingerprint sensor), but for cost reasons the MEMS industry is using essentially a via-last process, which is cheaper than a via-middle process. TSV's penetration rate in low-end products will remain stable, with the main source of growth due to RF filters in smartphone front-end modules, which keep increasing in order to support the different frequency bands used in 5G mobile communications protocol. This presentation will discuss about the market and technology trends of the TSV based 3D/2.5D packaging.

METHODS FOR PROTECTED CONDUCTIVE-COOLING HARDWARE-COMPUTING PLATFORMS DEVELOPMENT FOR VIDEO IMAGE PROCESSING TASKS

The article contains materials on methods for designing protected high-performance heterogeneous computing platforms (VGVP) based on the modular architecture of the CompactPCI Serial standard. A review of the development of Intel’s x86 processor technology, a review of common video interfaces is given. The requirements for the projected heterogeneous hardware-computing platforms for solving video processing tasks are determined. Platforms that organize parallel processing of digital video images using GPU modules, FPGA modules and CPU modules are described. It is shown that the implementation of linear filtering algorithms on FPGAs allows processing images up to 10 times faster than using GPU modules and even more CPU modules. The maximum power consumption and the capacity of the VGVP with conductive cooling are estimated.

MCM-GPU

Historically, improvements in GPU-based high performance computing have been tightly coupled to transistor scaling. As Moore's law slows down, and the number of transistors per die no longer grows at historical rates, the performance curve of single monolithic GPUs will ultimately plateau. However, the need for higher performing GPUs continues to exist in many domains. To address this need, in this paper we demonstrate that package-level integration of multiple GPU modules to build larger logical GPUs can enable continuous performance scaling beyond Moore's law. Specifically, we propose partitioning GPUs into easily manufacturable basic GPU Modules (GPMs), and integrating them on package using high bandwidth and power efficient signaling technologies. We lay out the details and evaluate the feasibility of a basic Multi-Chip-Module GPU (MCM-GPU) design. We then propose three architectural optimizations that significantly improve GPM data locality and minimize the sensitivity on inter-GPM bandwidth. Our evaluation shows that the optimized MCM-GPU achieves 22.8% speedup and 5x inter-GPM bandwidth reduction when compared to the basic MCM-GPU architecture. Most importantly, the optimized MCM-GPU design is 45.5% faster than the largest implementable monolithic GPU, and performs within 10% of a hypothetical (and unbuildable) monolithic GPU. Lastly we show that our optimized MCM-GPU is 26.8% faster than an equally equipped Multi-GPU system with the same total number of SMs and DRAM bandwidth.

Expérimentation du principe de délégation GPU pour la simulation multiagent. Les boids de Reynolds comme cas d'étude

General-Purpose Computing on Graphics Processing Units (GPGPU) allows to extend the scalability and performances of Multi-Agent Based Simulations (MABS). However, GPGPU requires the underlying program to be compliant with the specific architecture of GPU devices, which is very constraining. In this context, the GPU Environmental Delegation of Agent Perceptions principle has been proposed to ease the use of GPGPU for MABS. The idea is to identify in the model some computations which can be transformed into environmental dynamics and then translated into GPU modules. In this paper, we further trial this principle by testing its feasibility and genericness on a classic ABM, namely Reynolds's boids. The paper then shows that applying GPU delegation not only speeds up boids simulations but also produces an ABM which is easy to understand, thanks to a clear separation of concerns.