Good Error Correction Performance Research Articles

Neural layered min-sum decoders for cyclic codes

This paper proposes a low-complexity neural network decoder based on the layered min-sum algorithm to decode cyclic codes. By generalizing the layered min-sum algorithm to its neural network counterpart, the number of network weights decreases while retaining a good error correction performance. The Bose–Chaudhuri–Hocquenghem (BCH) codes, quadratic residue (QR) codes, and punctured Reed–Muller (RM) codes are selected as three exemplary binary cyclic codes. Simulation results show that the proposed neural decoder achieves superior performance with less computational complexity compared with the state-of-the-art neural network decoder. Further, a neural decoder incorporating the modified random redundant decoding (mRRD) algorithm is investigated to approach the performance of maximum-likelihood decoding for some short codes.

Symbol-level iterative information set decoding of RS codes

This paper presents the implementation of a low-complex iterative symbol-level decoding scheme for Reed-Solomon codes. Most soft-decision iterative decoders for Reed-Solomon codes work on a bit level due to the efficient passing of soft information due to the sparsity of the binary parity check matrix. These decoders yield a good error correction performance, but this comes at the cost of an increased computational complexity resulting from working at a bit-level. This study aims to lower the computational complexity of iterative decoding of Reed-Solomon codes by introducing a high-performance soft-decision iterative Reed-Solomon decoder that works on a symbol-level, in contrast to the bit-level implementation used in most iterative Reed-Solomon decoders. The proposed algorithm utilises soft information to decode while applying information set decoding techniques to an extended parity check matrix. The use of the extended parity check matrix provides additional parity check equations which assist the algorithm in determining the correct information set of symbols used in the decoding process. For a given (n,k) Reed-Solomon code, the algorithm converges to a valid codeword by correctly decoding a specified information set of k symbols from the received vector. Simulations run show the proposed algorithm performs favourably when compared to other symbol-level iterative decoders while working at a relatively lower complexity.

Efficiency of two decoders based on hash techniques and syndrome calculation over a Rayleigh channel

The explosive growth of connected devices demands high quality and reliability in data transmission and storage. Error correction codes (ECCs) contribute to this in ways that are not very apparent to the end user, yet indispensable and effective at the most basic level of transmission. This paper presents an investigation of the performance and analysis of two decoders that are based on hash techniques and syndrome calculation over a Rayleigh channel. These decoders under study consist of two main features: a reduced complexity compared to other competitors and good error correction performance over an additive white gaussian noise (AWGN) channel. When applied to decode some linear block codes such as Bose, Ray-Chaudhuri, and Hocquenghem (BCH) and quadratic residue (QR) codes over a Rayleigh channel, the experiment and comparison results of these decoders have shown their efficiency in terms of guaranteed performance measured in bit error rate (BER). For example, the coding gain obtained by syndrome decoding and hash techniques (SDHT) when it is applied to decode BCH (31, 11, 11) equals 34.5 dB, i.e., a reduction rate of 75% compared to the case where the exchange is carried out without coding and decoding process.

Node-Wise Scheduling Algorithm of ADMM Decoding Based on Line Segment Projection

In order to simplify the node-wise scheduling algorithm of the alternating direction method of multipliers (NS-ADMM) decoding, approximate line segment projection algorithm (LSA) is adopted to perform the projection in the node-wise scheduling algorithm. Experimental results show that using approximate line segment projection instead of precise projection in node-wise scheduling algorithm will yield a poor frame error rate (FER) performance. To solve this problem, dynamic scheduling strategy that selects the message-passing schedule according to the convergence status of the check node is proposed. Simulation results demonstrate that the modified node-wise scheduling algorithm based on line segment projection outperforms existing decoding algorithms in terms of FER performance and convergence speed, while it has good error correction performance with a lower computational complexity.

A Novel Flip-List-Enabled Belief Propagation Decoder for Polar Codes

Due to the design principle of parallel processing, belief propagation (BP) decoding is attractive, and it provides good error-correction performance compared with successive cancellation (SC) decoding. However, its error-correction performance is still inferior to that of successive cancellation list (SCL) decoding. Consequently, this paper proposes a novel flip-list- (FL)-enabled belief propagation (BP) method to improve the error-correction performance of BP decoding for polar codes with low computational complexity. The proposed technique identifies the vulnerable channel log-likelihood ratio (LLR) that deteriorates the BP decoding result. The FL is utilized to efficiently identify the erroneous channel LLRs and correct them for the next BP decoding attempt. The preprocessed channel LLR through FL improves the error-correction performance with minimal flipping attempts and reduces the computational complexity. The proposed technique was compared with the state-of-the-art BP, i.e., BP bit-flip (BP-BF), generalized BP-flip (GBPF), cyclic redundancy check (CRC)-aided (CA-SCL) decoding, and ordered statistic decoding (OSD), algorithms. Simulation results showed that the FL-BP had an excellent block error rate (BLER) performance gain up to 0.7 dB compared with BP, BP-BF, and GBPF decoder. Besides, the computational complexity was reduced considerably in the high signal-to-noise ratio (SNR) regime compared with the BP-BF and GBPF decoding methods.

Iterative Soft-Input Soft-Output Bit-Level Reed-Solomon Decoder Based on Information Set Decoding

In this paper, a bit-level decoder is presented for soft-input soft-output iterative decoding of Reed-Solomon (RS) codes. The main aim for the development of the proposed algorithm is to reduce the complexity of the decoding process, while yielding a relatively good error correction performance, for the efficient use of RS codes. The decoder utilises information set decoding techniques to reduce the computational complexity cost by lowering the iterative convergence rate during the decoding process. As opposed to most iterative bit-level soft-decision decoders for RS codes, the proposed algorithm is also able to avoid the use of belief propagation in the iterative decoding of the soft bit information, which also contributes to the reduction in the computational complexity cost of the decoding process. The performance of the proposed decoder is investigated when applied to short RS codes. The error correction simulations show the proposed algorithm is able to yield a similar performance to that of the Adaptive Belief Propagation (ABP) algorithm, while being a less complex decoder.

Input-Distribution-Aware Successive Cancellation List Decoding of Polar Codes

Polar codes are linear block codes that can achieve channel capacity at infinite code length. Successive cancellation list (SCL) decoding relies on a set of parallel decoders; it yields good error-correction performance at finite code length, at the cost of increased implementation complexity and power consumption. Current efforts in literature focus on design-time decoder complexity reduction, while lacking practical run-time power reduction methods. In this work, input-distribution-aware SCL (IDA-SCL) decoding is proposed, that allows to determine the parallelism to adopt by performing simple observations on the input of the decoder. This technique guarantees fixed, short latency and allows hardware SCL decoders to dynamically shut down part of the internal parallelism before each decoding process. It can be combined with existing complexity- and power- reduction techniques. Simulation results show that IDA-SCL can reduce the run-time complexity of SCL of up to 50%.

Bidirekciono stek dekodovanje polarnih kodova

Introduction/purpose: The paper introduces a reduced latency stack decoding algorithm of polar codes, inspired by the bidirectional stack decoding of convolutional codes and based on the folding technique. Methods: The stack decoding algorithm (also known as stack search) that is useful for decoding tree codes, the list decoding technique introduced by Peter Elias and the folding technique for polar codes which is used to reduce the latency of the decoding algorithm. The simulation was done using the Monte Carlo procedure. Results: A new polar code decoding algorithm, suitable for parallel implementation, is developed and the simulation results are presented. Conclusions: Polar codes are a class of capacity achieving codes that have been adopted as the main coding scheme for control channels in 5G New Radio. The main decoding algorithm for polar codes is the successive cancellation decoder. This algorithm performs well at large blocklengths with a low complexity, but has very low reliability at short and medium blocklengths. Several decoding algorithms have been proposed in order to improve the error correcting performance of polar codes. The successive cancellation list decoder, in conjunction with a cyclic redundancy check, provides very good error-correction performance, but at the cost of a high implementation complexity. The successive cancellation stack decoder provides similar error-correction performance at a lower complexity. Future machine-type and ultra reliable low latency communication applications require high-speed low latency decoding algorithms with good error correcting performance. In this paper, we propose a novel decoding algorithm, inspired by the bidirectional stack decoding of classical convolutional codes, with reduced latency that achieves similar performance as the classical successive cancellation list and successive cancellation stack decoding algorithms. The results are presented analytically and verified by simulation.

Large-Small Sorting for Successive Cancellation List Decoding of Polar Codes

The successive cancellation list (SCL) decoding is used to achieve good error-correcting performance for practical finite-length polar codes. However, the metric sorting that is repeatedly performed in SCL decoding increases the overall decoding latency as the list size increases, making it difficult to apply the SCL decoding to the applications with limited processing time. To reduce the latency of the metric sorting, this paper proposes a new sorting method derived by analyzing path extension cases encountered in SCL decoding. The proposed method can avoid unnecessary sorting operations by adaptively determining the sorting size, and can be combined with other metric sorting methods. Simulation results show that the proposed method significantly reduces the decoding latency for various list sizes and code rates without degrading the error-correcting performance. The proposed method also becomes more effective as the code rate or the list size increases. Combined with the state-of-the-art sorting method, the proposed method reduces the average SCL decoding latency for a (1024, 512) polar code by 33.1% when the list size is 8.

Turbo Decoder Design based on an LUT-Normalized Log-MAP Algorithm.

Turbo codes have been widely used in wireless communication systems due to their good error correction performance. Under time division long term evolution (TD-LTE) of the 3rd generation partnership project (3GPP) wireless communication standard, a Log maximum a posteriori (Log-MAP) decoding algorithm with high complexity is usually approximated as a lookup-table Log-MAP (LUT-Log-MAP) algorithm and Max-Log-MAP algorithm, but these two algorithms have high complexity and high bit error rate, respectively. In this paper, we propose a normalized Log-MAP (Nor-Log-MAP) decoding algorithm in which the function max* is approximated by using a fixed normalized factor multiplied by the max function. Combining a Nor-Log-MAP algorithm with a LUT-Log-MAP algorithm creates a new kind of LUT-Nor-Log-MAP algorithm. Compared with the LUT-Log-MAP algorithm, the decoding performance of the LUT-Nor-Log-MAP algorithm is close to that of the LUT-Log-MAP algorithm. Based on the decoding method of the Nor-Log-MAP algorithm, we also put forward a normalization functional unit (NFU) for a soft-input soft-output (SISO) decoder computing unit. The simulation results show that the LUT-Nor-Log-MAP algorithm can save about 2.1% of logic resources compared with the LUT-Log-MAP algorithm. Compared with the Max-Log-MAP algorithm, the LUT-Nor-Log-MAP algorithm shows a gain of 0.25~0.5 dB in decoding performance. Using the Cyclone IV platform, the designed Turbo decoder can achieve a throughput of 36 Mbit/s under a maximum clock frequency of 44 MHz.

Construction of Rate-Compatible Physical Layer Network Coding in Two-Way Relay Systems

The existing physical-layer network coding (PNC) only considers channel codes of a constant coding rate. In this paper, we propose a rate-compatible (RC) channel coding scheme for PNC in two-way relay systems. Our contributions are as follows. First, we propose a two-edge-type-low-density-paritycheck-aided PNC (JTNC) scheme due to its simple implementation and excellent performance. Second, we design an RC scheme, i.e., choice of locations and symbols, for the proposed JTNC in the relay. The simulation results show that the proposed RC-JTNC has good error correction performance and achieves large gains over the existing puncturing algorithms aided PNC over a wide range of rates.

Hash-Polar Codes With Application to 5G

This paper presents a kind of concatenated polar codes called hash-polar codes with flexible outer code lengths, in which a hash function-based encoder is used as an outer encoder. A partial hash-polar code is also proposed to enhance the error-correcting performance at high signal-to-noise ratios. Since polar codes have been recommended by 3GPP as the channel coding scheme for the 5G enhanced mobile broadband control channel, the design of hash-polar codes for 5G is considered, where both good error-correcting performance and low false alarm rate (FAR) are required. The simulation results show that, under the 5G FAR requirement, the proposed hash-polar codes have similar frame error rate performance to cyclic redundancy check (CRC)-polar codes and perform better than parity check polar codes. In order to support early termination (ET) for 5G coding, we then propose segmented hash-polar codes, which exhibit the advantages of the ET gain compared with both CRC-polar codes and distributed CRC-polar codes.

Informed Decoding Algorithms of LDPC Codes Based on Dynamic Selection Strategy

Among most of the message scheduling strategies for low-density parity-check (LDPC) codes, the dynamic scheduling strategy behaves best in error correction performance. Dynamic selection is an integral part of dynamic scheduling decoding, which plays a decisive role throughout the decoding process. Usually, the dynamic selection strategy based on the message residuals only is employed in dynamic decoding algorithms, while other potentials of the dynamic selection strategy are rarely cared about. In this paper, we propose the triple judgment dynamic selection strategy combined with a Stability Criterion . Interestingly, the new strategy can be well applied to two different dynamic algorithms, namely, the V-VCRBP and the V-CVRBP algorithms. The proposed strategy has a great advantage: locating the message to be preferentially updated is extremely quick and accurate. Simulation results demonstrate that the V-VCRBP algorithm outperforms existing decoding algorithms in terms of BER performance and convergence speed, while the V-CVRBP algorithm has good error correction performance with a lower computational complexity.

CodeHop: physical layer error correction and encryption with LDPC-based code hopping

This paper proposes a novel scheme named CodeHop, which provides both information reliability and security using code hop ping based on low-density parity-check (LDPC) codes. In contrast to traditional systems that perform error correction and encryption at different layers, CodeHop combines these two operations into a single step at physical layer, such that each plaintext message is jointly encoded and encrypted by a hopping parity-check matrix. According to a pseudo-random number generator (PRNG), the hopping matrix may rapidly switch among a sequence of LDPC parity-check matrices, which is randomly generated by a structured-random protograph expanding technique. Simulations show that reliable communication can be achieved by CodeHop with good error-correcting performance. In the meantime, CodeHop may improve the security of traditional systems such as GSM. Taking the A5/1 stream cipher used in GSM as the PRNG, it is shown that CodeHop is resistant to existing chosen-plaintext attacks that break A5/1 cipher already. Moreover, the security of CodeHop will be enhanced in the presence of channel errors as well.

A Low-Latency List Successive-Cancellation Decoding Implementation for Polar Codes

Due to their provably capacity-achieving performance, polar codes have attracted a lot of research interest recently. For a good error-correcting performance, list successive-cancellation decoding (LSCD) with large list size is used to decode polar codes. However, as the complexity and delay of the list management operation rapidly increase with the list size, the overall latency of LSCD becomes large and limits the applicability of polar codes in high-throughput and latency-sensitive applications. Therefore, in this work, the low-latency implementation for LSCD with large list size is studied. Specifically, at the system level, a selective expansion method is proposed such that some of the reliable bits are not expanded to reduce the computation and latency. At the algorithmic level, a double thresholding scheme is proposed as a fast approximate-sorting method for the list management operation to reduce the LSCD latency for large list size. A VLSI architecture of the LSCD implementing the selective expansion and double thresholding scheme is then developed, and implemented using a UMC 90 nm CMOS technology. Experimental results show that, even for a large list size of 16, the proposed LSCD achieves a decoding throughput of 460 Mbps at a clock frequency of 658 MHz.

Searching for Binary and Nonbinary Block and Convolutional LDPC Codes

A unified approach to search for and optimize codes determined by their sparse parity-check matrices is presented. Replacing the nonzero elements of a binary parity-check matrix (the base or parent matrix) either by circulants or by companion matrices of elements from a finite field GF $(2^{m})$ , we obtain quasi-cyclic low-density parity-check (LDPC) block codes and binary images of nonbinary LDPC block codes, respectively. By substituting monomials of a formal variable $D$ , we obtain the polynomial description of an LDPC convolutional code. A set of performance measures applicable to different classes of LDPC codes is considered, and a greedy algorithm for code performance optimization is presented. The heart of the new optimization algorithm is a fast procedure for searching for LDPC codes with large girth of their Tanner graphs. For a few classes of LDPC codes, examples of codes combining good error-correcting performance with compact representation are obtained. In particular, we present optimized convolutional LDPC codes and conclude that the LDPC block codes are still superior to their convolutional counterparts if both decoding complexity and coding delay are considered. Moreover, a specific channel model can easily be embedded into the optimization loop. Thereby, the code can be optimized for a specific channel. The efficiency of such an optimization is demonstrated via an example of faster than Nyquist (FTN) signaling using LDPC codes. The FTN strategy combined with a rate $R=1/2$ LDPC code of length 64 800 optimized for effective data rate $R=3/4$ gains more than 0.5 dB compared with the standard LDPC codes of the same rate and length. The obtained gain corresponds to transmission at the capacity of the binary input additive white Gaussian noise channel. In most numerical examples, we consider codes with bidiagonal structure of the parity-check matrix. This restriction preserves low encoding complexity and allows fair comparison with codes selected for communication standards.

ACK based partial random selection encoding for uplink distributed LDPC network codes

An ACK based partial random selection (ACK-PRS) encoding algorithm for the uplink distributed low-density parity check network code of the generalised adaptive network coded cooperation is proposed. The proposed algorithm achieves good error correction performance and high system throughput, while maintaining the low complexity of the random selection algorithm. This good performance is achieved by a minor increase in the down link signalling. Simulation results for 5 and 20 uplink users verify the good performance of the proposed ACK-PRS.

Invertible Subset QC-LDPC Codes for PAPR Reduction of OFDM Signals

A type of invertible subset low density parity-check (IS-LDPC) codes was proposed to reduce the peak-to-average power ratio for orthogonal frequency-division multiplexing systems with low complexity recently, where the key idea is that each invertible subset can be independently inverted to generate other valid codewords of the LDPC code. In this paper, we firstly extend the idea of invertible subsets to quasi-cyclic LDPC (QC-LDPC) codes, and this new family of QC-LDPC codes is called as invertible subset QC-LDPC (IS-QC-LDPC) codes. Moreover, we propose two types of subset partitioning and deeply discuss the properties of IS-QC-LDPC codes with different subset partitioning. After declaring that interleaved partitioning is more appropriate for IS-QC-LDPC codes than the block partitioning, we propose a novel progressive edge graph-like algorithm to construct good IS-QC-LDPC codes with interleaved partitioning. The simulation results show that the IS-QC-LDPC codes exhibit good error-correcting performance, which is very close to that of the corresponding QC-LDPC codes of the IEEE 802.16e, for a wide range of subset number.

Partially Parallel Encoder Architecture for Long Polar Codes

Due to the channel achieving property, the polar code has become one of the most favorable error-correcting codes. As the polar code achieves the property asymptotically, however, it should be long enough to have a good error-correcting performance. Although the previous fully parallel encoder is intuitive and easy to implement, it is not suitable for long polar codes because of the huge hardware complexity required. In this brief, we analyze the encoding process in the viewpoint of very-large-scale integration implementation and propose a new efficient encoder architecture that is adequate for long polar codes and effective in alleviating the hardware complexity. As the proposed encoder allows high-throughput encoding with small hardware complexity, it can be systematically applied to the design of any polar code and to any level of parallelism.

Invertible Subset LDPC Code for PAPR Reduction in OFDM Systems with Low Complexity

In this paper, we introduce a new family of low-density parity-check (LDPC) codes, called as invertible subset LDPC (IS-LDPC) code, for peak-to-average power ratio (PAPR) reduction in OFDM systems with low complexity. An IS-LDPC code has a number of disjoint invertible subsets, and each invertible subset can be independently inverted to generate other valid codewords of the LDPC code. To construct IS-LDPC codes with good error-correcting performance, we propose a modified progressive edge-growth construction algorithm and verify its effectiveness by analyzing the constructed Tanner graphs. Both theoretical analysis and numerical results show that the IS-LDPC codes exhibit good error-correcting performance and the proposed PAPR reduction scheme based on IS-LDPC codes significantly reduces the PAPR. Compared with the existing coding-based candidate generation schemes, the proposed scheme has a much lower searching complexity when the codeword is transmitted by multiple OFDM symbols. With all mentioned advantages, the proposed PAPR reduction scheme based on IS-LDPC codes could serve as an attractive PAPR reduction solution for future multicarrier communication systems.