GHz Wireless Applications Research Articles

Compact and Closely Spaced Metamaterial MIMO Antenna With High Isolation for Wireless Applications

This letter presents a design of a two-element multiple-input-multiple-output (MIMO) metamaterial-based antenna. The two antenna elements operate at 5.8 GHz for wireless applications. The two antenna elements are designed employing only one left-handed unit cell. The reduction of mutual coupling between the two antenna elements is achieved by using a simple defected ground structure between them to limit the surface waves between them. The distance between the two antenna elements is only 1.8 mm (0.034 λ0). The designed antenna elements have better than -45 dB coupling isolation between the two inputs. Moreover, the proposed MIMO antenna has the advantage of compactness (its size is only 2.36 × 2.6 cm2). The design represents size reduction of more than 50% compared to conventional patch antennas operating at the same frequency. The proposed MIMO system has -55 dB correlation coefficient between its two elements.

Study on Performance Analysis of CMOS RF front-end circuits for 2.4GHz Wireless Applications

In this paper, low voltage design concepts and new CMOS front-end circuits for 2.4GHz wireless applications are presented. The performances of these circuits are analysed and compared with other existing structures using TSMC 0.18-μm CMOS technology scale. The design trade-offs between impedance matching, power gain and noise figure of low-noise amplifiers are highlighted. The advantage of the introduced mixer topology is expressed in terms of conversion gain, noise figure and linearity. At a supply voltage of 1.8V, the design and performance analysis have been performed using Agilent’s Advanced Design System (ADS2009) software.

Linearity improvement of 5.2-GHz CMOS up-conversion mixer for wireless applications

This letter presents linearity improvement up-conversion mixer at 5.2 GHz for wireless applications. The design is based on Gilbert-cell active double-balanced mixer using derivative superposition method for linearity improvement. The design improvement is proposed in TSMC 0.18-μm CMOS process. The linearity of the designed mixer is further improved using source degeneration inductors at transconductors stage. The measurement results indicate that the proposed method shows the third-order intercept point (IIP3) of 13.5-dBm, which is higher than previously published mixers. The mixer achieves the conversion gain of 2 dBm, and consumes 3.0 mA at 1.8 V power supply. The size of the whole chip is 0.56 mm2. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:923–925, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.26711

Compact Multiband Multifolded-Slot Antenna Loaded With Printed-IFA

Compact multiband coplanar waveguide-fed L-loaded printed-inverted-F antennas (printed-IFAs) with multiple-folded-slots (MFS) transmission line is proposed in this letter. The proposed antenna is designed for the transmission and reception of the digital video broadcasting signal DVB (470-860 MHz) frequency band and DVB-L (1452-1492 MHz) band. The proposed antenna is suitable for use in the global system for mobile communication (GSM 850/900), all bands of long term evolution (LTE), covering from 800 MHz to 2.6 GHz, industrial, scientific and medical (ISM) 2.45 GHz, Wi-Max bands at 3.5 GHz and 5.7 GHz, WLAN 5.2 GHz and other wireless communication applications. Multiband behavior is achieved by loading folded slots CPW-fed with L-loaded printed-IFA. Capacitive loads are added at the open end of the L-loaded printed-IFA for additional reduction of the antenna size. The proposed antenna possesses the properties of good performance, compact size, low profile, and low cost. Hence, it is suitable for implementation in wireless applications.

A low-voltage low-power CMOS transmitter front-end using current mode approach for 2.4 GHz wireless communications

This paper presents a low-voltage low-power transmitter front-end using current mode approach for 2.4GHz wireless communication applications, which is fabricated in a chartered 0.18μm CMOS technology. The direct up-conversion is implemented with a current mode mixer employing a novel input driver stage, which can significantly improve the linearity and consume a small amount of DC current. The driver amplifier utilizes a transimpedance amplifier as the first stage and employs an inter-stage capacitive cross-coupling technique, which enhances the power conversion gain as well as high linearity. The measured results show that at 2.4GHz, the transmitter front-end provides 15.5dB of power conversion gain, output P−1dB of 3dBm, and the output-referred third-order intercept point (OIP3) of 13.8dBm, while drawing only 6mA from the transmitter front-end under a supply voltage of 1.2V. The chip area including the testing pads is only 0.9mm×1.1mm.

CMOS Phased Array Transceiver Technology for 60 GHz Wireless Applications

Based on the indoor radio-wave propagation analysis, and the fundamental limits of CMOS technology it is shown that phased array technology is the ultimate solution for the radio and physical layer of the millimeter wave multi-Gb/s wireless networks. A low-cost, single-receiver array architecture with RF phase-shifting is proposed and design, analysis and measurements of its key components are presented. A high-gain, two-stage, low noise amplifier in 90 nm-CMOS technology with more than 20 dB gain over the 60 GHz spectrum is designed. Furthermore, a broadband analog phase shifter with a linear phase and low insertion loss variation is designed, and its measured characteristics are presented. Moreover, two novel beamforming techniques for millimeter wave phased array receivers are developed in this paper. The performance of these methods for line-of-sight and multipath signal propagation conditions is studied. It is shown that one of the proposed beamforming methods has an excess gain of up to 14 dB when the line of sight link is obstructed by a human.

Design, Analysis, and Measurements of an Antenna Structure for 2.4 GHz Wireless Applications

This paper reports measured results of a multielement antenna implementation, we constructed, that performs at 2.4 GHz ISM band. Particular emphasis was given to the scattering parameters and validation characterization of this antenna structure. The constructed multielement antenna that was studied in both azimuth and elevation planes consists of a number of printed dipoles with integrated baluns. Due to its multielement construction, the proposed antenna structure is suitable for applications that require multielements nature such as MIMO, channel sounder, and digital beamforming.

A Low-Voltage CMOS Current Mode Integrated Transmitter Front-end for 2.4-GHz Wireless Communications

This paper presents a low-voltage low-power current mode transmitter front-end for 2.4 GHz wireless communication applications, which is fabricated in a chartered 0.18-mm CMOS technology. The direct up-conversion is implemented with a current mode mixer employing a novel input driver stage, which can significantly improve the linearity and consume a small amount of DC current. The driver amplifier utilizes a transimpedance amplifier as the first stage and employs an inter-stage capacitive cross-coupling technique which enhances the power conversion gain as well as high linearity. The measured results show that at 2.4GHz, the transmitter front-end provides 15.5dB of power conversion gain, output P-1dB of 3dBm, and the output-referred third-order intercept point (OIP3) of 13.8dBm, while drawing only 6 mA from the transmitter front-end under a supply voltage of 1.2 V. The chip area including testing pads is only 0.9 mm 1.1 mm. Index Terms –CMOS, up-conversion mixer, driver amplifier, transmitter, current mode, high linearity, low-power

A Microstrip Fed Patch Antenna with Two Parasitic Invert L Stubs for Dual-Band WLAN Applications

A novel microstrip fed dual-band design patch antenna with two parasitic invert L stubs for 2.4/5- GHz wireless applications is presented in this paper. Printed on a dielectric substrate of FR4 with relative permittivity of 4.4 and thickness of 1 mm, and fed by a 50? microstrip line, the patch antenna with two parasitic invert L stubs is demonstrated to generate three resonant modes to cover 2.4/5.2/5.8- GHz wireless local area network (WLAN) bands with satisfactory radiation characteristics. Experimental and simulated S parameters are presented. Parameters sweep and simulated radiation patterns are demonstrated.

A LOW-LOSS PATCH LTCC BPF FOR 60 GHZ SYSTEM-ON-PACKAGE (SoP) APPLICATIONS

In this paper, a three-dimensional (3-D) low-loss and wideband BPF based on lowtemperature co-flred ceramic (LTCC) has been presented for 60GHz wireless communication applications. Via pads in the vertical via transitions are designed as an additional resonator for lowloss and wide-bandwidth of the BPF. The proposed BPF has been designed by investigating its characteristics as a function of dimensions of the resonators such as a single-mode patch and via pads and also a length of feed lines are optimized for efiective coupling. The designed BPF was fabricated in a 6-layer LTCC dielectric. The fabricated BPF shows a centre frequency (fc) of 61.46GHz and a 3dB bandwidth of 10.5% from 58.2 to 64.7GHz (6.47GHz). An insertion loss of i2.88dB at fc and return losses below i10dB are achieved. Its whole size is 4:72 £ 1:7 £ 0:684mm 3 .

A Low-Power Fully Monolithic Subthreshold CMOS Receiver With Integrated LO Generation for 2.4 GHz Wireless PAN Applications

This paper reports a fully monolithic subthreshold CMOS receiver with integrated subthreshold quadrature LO chain for 2.4 GHz WPAN applications. Subthreshold operation, passive voltage boosting, and various low-power circuit techniques such as current reuse, stacking, and differential cross coupling have been combined to lower the total power consumption. The subthreshold receiver, consisting of the switched-gain low noise amplifier, the quadrature mixers, and the variable gain amplifiers, consumes only 1.4 mW of power and has a gain of 43 dB and a noise figure of 5 dB. The entire quadrature LO chain, including a stacked quadrature VCO and differential cross-coupled buffers, also operates in the subthreshold region and consumes a total power of 1.2 mW. The subthreshold receiver with integrated LO generation is implemented in a 0.18 mum CMOS process. The receiver has a 3-dB IF bandwidth of 95 MHz.

Circular Axe-Shaped Patch Antenna for Compact and Dual Band Wireless Applications

A compact circular AXE-shaped patch antenna is presented for miniaturized application. The proposed design is further modified for dual band 2.4/5.5 GHz wireless application. The measured return loss is from 2.38∼2.42 GHz and 5.41∼5.59 GHz suitable for dual band WLAN application. Same design procedure can also be applied for miniaturized applications. The miniaturization process shifts the resonance at 1.71 GHz instead of 2.5 GHz in case of simple circular patch. The radiation pattern and gain for dual band wireless antenna is also measured and presented.

60 GHz wireless communications: Emerging requirements and design recommendations

Multiple GHz of internationally available, unlicensed spectrum surrounding the 60 GHz carrier frequency has the ability to accommodate high-throughput wireless communications. While the size and availability of this free spectrum make it very attractive for wireless applications, 60 GHz implementations must overcome many challenges. For example, the high attenuation and directional nature of the 60 GHz wireless channel as well as limited gain amplifiers and excessive phase noise in 60 GHz transceivers are explicit implementation difficulties. The challenges associated with this channel motivate commercial deployment of short-range wireless local area networks, wireless personal area networks, and vehicular networks. In this paper we detail design tradeoffs for algorithms in the 60 GHz physical layer including modulation, equalization, and space-time processing. The discussion is enhanced by considering the limitations in circuit design, characteristics of the effective wireless channel (including antennas), and performance requirements to support current and next generation 60 GHz wireless communication applications.

Integrated frequency synthesiser in SiGe BiCMOS technology for 60 and 24 GHz wireless applications

A fully integrated silicon-based frequency synthesiser for 60 and 24 GHz applications is presented. The relative frequency tuning range is 5%, and the total power dissipation is 135 mW at 2.3 V supply voltage. Phase noise at 48 GHz is lower than −98 dBc/Hz at 1 MHz offset over the whole tuning range, which is 8 dB lower than in all previous silicon-based solutions.

Compact CPW-fed monopole antenna for 5 GHz wireless application

A compact and simple coplanar waveguide (CPW)-fed monopole antenna for 5 GHz wireless communication is proposed. By properly adjusting the lengths of both the monopole strip and the inverted L-shaped ground, the designed antenna, with, including ground plane, only 9×9.5 mm2, can operate at the desired 5.2 or 5.8 GHz band. The electromagnetic coupling effect between the radiating strip and the ground on excitation of the resonant mode has been studied. Prototypes of the proposed antenna have been constructed and experimentally studied. Measured results show a −10 dB impedance bandwidth and an average antenna gain of 400 MHz and >6 dBi, respectively.

Asymmetric Teflon-based Schiffman phase shifter

Novel asymmetric 45° Schiffman phase shifters having 1-coupling and 2-coupling for 2.3 GHz applications are presented along with measurement results. The proposed phase shifters with a Teflon substrate are fabricated in a smaller area and cost-effective way compared to the conventional Schiffman phase shifter. In addition, the characteristics of the fabricated phase shifters were extracted and compared. The proposed phase shifters appear to be very promising and useful, particularly for the future 2.3 GHz wireless applications.

High power density of AlGaAs/InGaAs doped-channelFETs with low DC power supply

High power density Al0.3Ga0.7As/In0.15Ga0.85As doped-channel FETs (modified DCFETs) biased at 3 V for 2.4 GHz wireless communication applications are proposed. A planar Si δ-doped layer is inserted inside the wide-bandgap undoped AlGaAs layer to reduce parasitic resistances and enhance the device microwave power performance. The modified DCFETs (M-DCFETs) exhibit an output power density of 302 mW/mm, a power-added efficiency of 52%, and a linear power gain of 19 dB under 2.4 GHz operation for a 1 mm gate-width device. These characteristics suggest that doped-channel FETs with a planar Si δ-doped layer can be used in high linearity and high power microwave device applications.