Stacking faults are generated by sequential wet thermal oxidation of damage-free silicon surfaces. The concentration of stacking faults is dependent upon the nature of the back surface, upon the rate of cooling from the first oxidation, and upon whether the thermal oxide is removed between oxidations. A model is presented in which stacking-fault nuclei are generated during cooling from the first oxidation. On the basis of etching behavior, it is suggested that while the defects generated on 〈111〉 wafers are stacking faults, 95% of the defects for 〈100〉 wafers are prismatic dislocation loops. A model is presented for the creation of stacking faults on thermally oxidized mechanically damaged surfaces based on the effect of surface tensile stress in stabilizing dislocation loops generated at elevated temperatures.